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Commit | Line | Data |
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64dbbd40 GVB |
1 | /* |
2 | * (C) Copyright 2007 | |
3 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com | |
4 | * | |
2a523f52 | 5 | * Copyright 2010-2011 Freescale Semiconductor, Inc. |
a0342c08 | 6 | * |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
64dbbd40 GVB |
8 | */ |
9 | ||
10 | #include <common.h> | |
3e303f74 | 11 | #include <stdio_dev.h> |
64dbbd40 GVB |
12 | #include <linux/ctype.h> |
13 | #include <linux/types.h> | |
64dbbd40 | 14 | #include <asm/global_data.h> |
64dbbd40 GVB |
15 | #include <libfdt.h> |
16 | #include <fdt_support.h> | |
151c8b09 | 17 | #include <exports.h> |
64dbbd40 | 18 | |
f77a606a DF |
19 | /* |
20 | * Get cells len in bytes | |
21 | * if #NNNN-cells property is 2 then len is 8 | |
22 | * otherwise len is 4 | |
23 | */ | |
24 | static int get_cells_len(void *blob, char *nr_cells_name) | |
25 | { | |
26 | const fdt32_t *cell; | |
27 | ||
28 | cell = fdt_getprop(blob, 0, nr_cells_name, NULL); | |
29 | if (cell && fdt32_to_cpu(*cell) == 2) | |
30 | return 8; | |
31 | ||
32 | return 4; | |
33 | } | |
34 | ||
35 | /* | |
36 | * Write a 4 or 8 byte big endian cell | |
37 | */ | |
38 | static void write_cell(u8 *addr, u64 val, int size) | |
39 | { | |
40 | int shift = (size - 1) * 8; | |
41 | while (size-- > 0) { | |
42 | *addr++ = (val >> shift) & 0xff; | |
43 | shift -= 8; | |
44 | } | |
45 | } | |
46 | ||
94fb182c AG |
47 | /** |
48 | * fdt_getprop_u32_default_node - Return a node's property or a default | |
49 | * | |
50 | * @fdt: ptr to device tree | |
51 | * @off: offset of node | |
52 | * @cell: cell offset in property | |
53 | * @prop: property name | |
54 | * @dflt: default value if the property isn't found | |
55 | * | |
56 | * Convenience function to return a node's property or a default value if | |
57 | * the property doesn't exist. | |
58 | */ | |
59 | u32 fdt_getprop_u32_default_node(const void *fdt, int off, int cell, | |
60 | const char *prop, const u32 dflt) | |
61 | { | |
62 | const fdt32_t *val; | |
63 | int len; | |
64 | ||
65 | val = fdt_getprop(fdt, off, prop, &len); | |
66 | ||
67 | /* Check if property exists */ | |
68 | if (!val) | |
69 | return dflt; | |
70 | ||
71 | /* Check if property is long enough */ | |
72 | if (len < ((cell + 1) * sizeof(uint32_t))) | |
73 | return dflt; | |
74 | ||
75 | return fdt32_to_cpu(*val); | |
76 | } | |
77 | ||
3bed2aaf KG |
78 | /** |
79 | * fdt_getprop_u32_default - Find a node and return it's property or a default | |
80 | * | |
81 | * @fdt: ptr to device tree | |
82 | * @path: path of node | |
83 | * @prop: property name | |
84 | * @dflt: default value if the property isn't found | |
85 | * | |
86 | * Convenience function to find a node and return it's property or a | |
87 | * default value if it doesn't exist. | |
88 | */ | |
07e12784 GB |
89 | u32 fdt_getprop_u32_default(const void *fdt, const char *path, |
90 | const char *prop, const u32 dflt) | |
3bed2aaf | 91 | { |
3bed2aaf KG |
92 | int off; |
93 | ||
94 | off = fdt_path_offset(fdt, path); | |
95 | if (off < 0) | |
96 | return dflt; | |
97 | ||
94fb182c | 98 | return fdt_getprop_u32_default_node(fdt, off, 0, prop, dflt); |
3bed2aaf | 99 | } |
64dbbd40 | 100 | |
a3c2933e KG |
101 | /** |
102 | * fdt_find_and_setprop: Find a node and set it's property | |
103 | * | |
104 | * @fdt: ptr to device tree | |
105 | * @node: path of node | |
106 | * @prop: property name | |
107 | * @val: ptr to new value | |
108 | * @len: length of new property value | |
109 | * @create: flag to create the property if it doesn't exist | |
110 | * | |
111 | * Convenience function to directly set a property given the path to the node. | |
112 | */ | |
113 | int fdt_find_and_setprop(void *fdt, const char *node, const char *prop, | |
114 | const void *val, int len, int create) | |
115 | { | |
8d04f02f | 116 | int nodeoff = fdt_path_offset(fdt, node); |
a3c2933e KG |
117 | |
118 | if (nodeoff < 0) | |
119 | return nodeoff; | |
120 | ||
8aa5ec6e | 121 | if ((!create) && (fdt_get_property(fdt, nodeoff, prop, NULL) == NULL)) |
a3c2933e KG |
122 | return 0; /* create flag not set; so exit quietly */ |
123 | ||
124 | return fdt_setprop(fdt, nodeoff, prop, val, len); | |
125 | } | |
126 | ||
151c8b09 | 127 | #ifdef CONFIG_OF_STDOUT_VIA_ALIAS |
3e303f74 | 128 | |
036036d7 | 129 | #ifdef CONFIG_CONS_INDEX |
3e303f74 AV |
130 | static void fdt_fill_multisername(char *sername, size_t maxlen) |
131 | { | |
132 | const char *outname = stdio_devices[stdout]->name; | |
133 | ||
134 | if (strcmp(outname, "serial") > 0) | |
135 | strncpy(sername, outname, maxlen); | |
136 | ||
137 | /* eserial? */ | |
138 | if (strcmp(outname + 1, "serial") > 0) | |
139 | strncpy(sername, outname + 1, maxlen); | |
140 | } | |
036036d7 | 141 | #endif |
3e303f74 | 142 | |
40777812 | 143 | static int fdt_fixup_stdout(void *fdt, int chosenoff) |
151c8b09 KG |
144 | { |
145 | int err = 0; | |
146 | #ifdef CONFIG_CONS_INDEX | |
147 | int node; | |
148 | char sername[9] = { 0 }; | |
149 | const char *path; | |
150 | ||
3e303f74 AV |
151 | fdt_fill_multisername(sername, sizeof(sername) - 1); |
152 | if (!sername[0]) | |
153 | sprintf(sername, "serial%d", CONFIG_CONS_INDEX - 1); | |
151c8b09 KG |
154 | |
155 | err = node = fdt_path_offset(fdt, "/aliases"); | |
156 | if (node >= 0) { | |
157 | int len; | |
158 | path = fdt_getprop(fdt, node, sername, &len); | |
159 | if (path) { | |
160 | char *p = malloc(len); | |
161 | err = -FDT_ERR_NOSPACE; | |
162 | if (p) { | |
163 | memcpy(p, path, len); | |
40777812 | 164 | err = fdt_setprop(fdt, chosenoff, |
151c8b09 KG |
165 | "linux,stdout-path", p, len); |
166 | free(p); | |
167 | } | |
168 | } else { | |
169 | err = len; | |
170 | } | |
171 | } | |
172 | #endif | |
173 | if (err < 0) | |
174 | printf("WARNING: could not set linux,stdout-path %s.\n", | |
175 | fdt_strerror(err)); | |
176 | ||
177 | return err; | |
178 | } | |
179 | #endif | |
180 | ||
2a1a2cb6 | 181 | int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int force) |
64dbbd40 | 182 | { |
f77a606a | 183 | int nodeoffset, addr_cell_len; |
2a1a2cb6 | 184 | int err, j, total; |
f77a606a | 185 | fdt64_t tmp; |
b60af3d4 | 186 | const char *path; |
2a1a2cb6 | 187 | uint64_t addr, size; |
64dbbd40 | 188 | |
2a1a2cb6 KG |
189 | /* Find the "chosen" node. */ |
190 | nodeoffset = fdt_path_offset (fdt, "/chosen"); | |
191 | ||
192 | /* If there is no "chosen" node in the blob return */ | |
193 | if (nodeoffset < 0) { | |
194 | printf("fdt_initrd: %s\n", fdt_strerror(nodeoffset)); | |
195 | return nodeoffset; | |
64dbbd40 GVB |
196 | } |
197 | ||
2a1a2cb6 KG |
198 | /* just return if initrd_start/end aren't valid */ |
199 | if ((initrd_start == 0) || (initrd_end == 0)) | |
200 | return 0; | |
c28abb9c | 201 | |
2a1a2cb6 KG |
202 | total = fdt_num_mem_rsv(fdt); |
203 | ||
204 | /* | |
205 | * Look for an existing entry and update it. If we don't find | |
206 | * the entry, we will j be the next available slot. | |
207 | */ | |
208 | for (j = 0; j < total; j++) { | |
209 | err = fdt_get_mem_rsv(fdt, j, &addr, &size); | |
210 | if (addr == initrd_start) { | |
211 | fdt_del_mem_rsv(fdt, j); | |
212 | break; | |
c28abb9c | 213 | } |
2a1a2cb6 | 214 | } |
8d04f02f | 215 | |
ce6b27a8 | 216 | err = fdt_add_mem_rsv(fdt, initrd_start, initrd_end - initrd_start); |
2a1a2cb6 KG |
217 | if (err < 0) { |
218 | printf("fdt_initrd: %s\n", fdt_strerror(err)); | |
219 | return err; | |
220 | } | |
221 | ||
f77a606a DF |
222 | addr_cell_len = get_cells_len(fdt, "#address-cells"); |
223 | ||
2a1a2cb6 KG |
224 | path = fdt_getprop(fdt, nodeoffset, "linux,initrd-start", NULL); |
225 | if ((path == NULL) || force) { | |
f77a606a | 226 | write_cell((u8 *)&tmp, initrd_start, addr_cell_len); |
2a1a2cb6 | 227 | err = fdt_setprop(fdt, nodeoffset, |
be6d4266 | 228 | "linux,initrd-start", &tmp, addr_cell_len); |
2a1a2cb6 KG |
229 | if (err < 0) { |
230 | printf("WARNING: " | |
231 | "could not set linux,initrd-start %s.\n", | |
232 | fdt_strerror(err)); | |
233 | return err; | |
234 | } | |
f77a606a | 235 | write_cell((u8 *)&tmp, initrd_end, addr_cell_len); |
2a1a2cb6 | 236 | err = fdt_setprop(fdt, nodeoffset, |
be6d4266 | 237 | "linux,initrd-end", &tmp, addr_cell_len); |
64dbbd40 | 238 | if (err < 0) { |
2a1a2cb6 KG |
239 | printf("WARNING: could not set linux,initrd-end %s.\n", |
240 | fdt_strerror(err)); | |
241 | ||
64dbbd40 GVB |
242 | return err; |
243 | } | |
244 | } | |
245 | ||
2a1a2cb6 KG |
246 | return 0; |
247 | } | |
248 | ||
56844a22 | 249 | int fdt_chosen(void *fdt, int force) |
2a1a2cb6 KG |
250 | { |
251 | int nodeoffset; | |
252 | int err; | |
253 | char *str; /* used to set string properties */ | |
254 | const char *path; | |
255 | ||
256 | err = fdt_check_header(fdt); | |
257 | if (err < 0) { | |
258 | printf("fdt_chosen: %s\n", fdt_strerror(err)); | |
259 | return err; | |
260 | } | |
261 | ||
64dbbd40 GVB |
262 | /* |
263 | * Find the "chosen" node. | |
264 | */ | |
8d04f02f | 265 | nodeoffset = fdt_path_offset (fdt, "/chosen"); |
64dbbd40 GVB |
266 | |
267 | /* | |
b60af3d4 | 268 | * If there is no "chosen" node in the blob, create it. |
64dbbd40 GVB |
269 | */ |
270 | if (nodeoffset < 0) { | |
271 | /* | |
272 | * Create a new node "/chosen" (offset 0 is root level) | |
273 | */ | |
274 | nodeoffset = fdt_add_subnode(fdt, 0, "chosen"); | |
275 | if (nodeoffset < 0) { | |
5fe6be62 | 276 | printf("WARNING: could not create /chosen %s.\n", |
35ec398f | 277 | fdt_strerror(nodeoffset)); |
64dbbd40 GVB |
278 | return nodeoffset; |
279 | } | |
280 | } | |
281 | ||
282 | /* | |
b60af3d4 GVB |
283 | * Create /chosen properites that don't exist in the fdt. |
284 | * If the property exists, update it only if the "force" parameter | |
285 | * is true. | |
64dbbd40 GVB |
286 | */ |
287 | str = getenv("bootargs"); | |
288 | if (str != NULL) { | |
b60af3d4 GVB |
289 | path = fdt_getprop(fdt, nodeoffset, "bootargs", NULL); |
290 | if ((path == NULL) || force) { | |
291 | err = fdt_setprop(fdt, nodeoffset, | |
292 | "bootargs", str, strlen(str)+1); | |
293 | if (err < 0) | |
294 | printf("WARNING: could not set bootargs %s.\n", | |
295 | fdt_strerror(err)); | |
296 | } | |
64dbbd40 | 297 | } |
2a1a2cb6 | 298 | |
151c8b09 | 299 | #ifdef CONFIG_OF_STDOUT_VIA_ALIAS |
b60af3d4 GVB |
300 | path = fdt_getprop(fdt, nodeoffset, "linux,stdout-path", NULL); |
301 | if ((path == NULL) || force) | |
302 | err = fdt_fixup_stdout(fdt, nodeoffset); | |
151c8b09 KG |
303 | #endif |
304 | ||
64dbbd40 | 305 | #ifdef OF_STDOUT_PATH |
b60af3d4 GVB |
306 | path = fdt_getprop(fdt, nodeoffset, "linux,stdout-path", NULL); |
307 | if ((path == NULL) || force) { | |
308 | err = fdt_setprop(fdt, nodeoffset, | |
309 | "linux,stdout-path", OF_STDOUT_PATH, strlen(OF_STDOUT_PATH)+1); | |
310 | if (err < 0) | |
311 | printf("WARNING: could not set linux,stdout-path %s.\n", | |
312 | fdt_strerror(err)); | |
313 | } | |
64dbbd40 GVB |
314 | #endif |
315 | ||
64dbbd40 GVB |
316 | return err; |
317 | } | |
318 | ||
e93becf8 KG |
319 | void do_fixup_by_path(void *fdt, const char *path, const char *prop, |
320 | const void *val, int len, int create) | |
321 | { | |
322 | #if defined(DEBUG) | |
323 | int i; | |
d9ad115b | 324 | debug("Updating property '%s/%s' = ", path, prop); |
e93becf8 KG |
325 | for (i = 0; i < len; i++) |
326 | debug(" %.2x", *(u8*)(val+i)); | |
327 | debug("\n"); | |
328 | #endif | |
329 | int rc = fdt_find_and_setprop(fdt, path, prop, val, len, create); | |
330 | if (rc) | |
331 | printf("Unable to update property %s:%s, err=%s\n", | |
332 | path, prop, fdt_strerror(rc)); | |
333 | } | |
334 | ||
335 | void do_fixup_by_path_u32(void *fdt, const char *path, const char *prop, | |
336 | u32 val, int create) | |
337 | { | |
8aa5ec6e KP |
338 | fdt32_t tmp = cpu_to_fdt32(val); |
339 | do_fixup_by_path(fdt, path, prop, &tmp, sizeof(tmp), create); | |
e93becf8 KG |
340 | } |
341 | ||
9eb77cea KG |
342 | void do_fixup_by_prop(void *fdt, |
343 | const char *pname, const void *pval, int plen, | |
344 | const char *prop, const void *val, int len, | |
345 | int create) | |
346 | { | |
347 | int off; | |
348 | #if defined(DEBUG) | |
349 | int i; | |
d9ad115b | 350 | debug("Updating property '%s' = ", prop); |
9eb77cea KG |
351 | for (i = 0; i < len; i++) |
352 | debug(" %.2x", *(u8*)(val+i)); | |
353 | debug("\n"); | |
354 | #endif | |
355 | off = fdt_node_offset_by_prop_value(fdt, -1, pname, pval, plen); | |
356 | while (off != -FDT_ERR_NOTFOUND) { | |
8aa5ec6e | 357 | if (create || (fdt_get_property(fdt, off, prop, NULL) != NULL)) |
9eb77cea KG |
358 | fdt_setprop(fdt, off, prop, val, len); |
359 | off = fdt_node_offset_by_prop_value(fdt, off, pname, pval, plen); | |
360 | } | |
361 | } | |
362 | ||
363 | void do_fixup_by_prop_u32(void *fdt, | |
364 | const char *pname, const void *pval, int plen, | |
365 | const char *prop, u32 val, int create) | |
366 | { | |
8aa5ec6e KP |
367 | fdt32_t tmp = cpu_to_fdt32(val); |
368 | do_fixup_by_prop(fdt, pname, pval, plen, prop, &tmp, 4, create); | |
9eb77cea KG |
369 | } |
370 | ||
371 | void do_fixup_by_compat(void *fdt, const char *compat, | |
372 | const char *prop, const void *val, int len, int create) | |
373 | { | |
374 | int off = -1; | |
375 | #if defined(DEBUG) | |
376 | int i; | |
d9ad115b | 377 | debug("Updating property '%s' = ", prop); |
9eb77cea KG |
378 | for (i = 0; i < len; i++) |
379 | debug(" %.2x", *(u8*)(val+i)); | |
380 | debug("\n"); | |
381 | #endif | |
382 | off = fdt_node_offset_by_compatible(fdt, -1, compat); | |
383 | while (off != -FDT_ERR_NOTFOUND) { | |
8aa5ec6e | 384 | if (create || (fdt_get_property(fdt, off, prop, NULL) != NULL)) |
9eb77cea KG |
385 | fdt_setprop(fdt, off, prop, val, len); |
386 | off = fdt_node_offset_by_compatible(fdt, off, compat); | |
387 | } | |
388 | } | |
389 | ||
390 | void do_fixup_by_compat_u32(void *fdt, const char *compat, | |
391 | const char *prop, u32 val, int create) | |
392 | { | |
8aa5ec6e KP |
393 | fdt32_t tmp = cpu_to_fdt32(val); |
394 | do_fixup_by_compat(fdt, compat, prop, &tmp, 4, create); | |
9eb77cea KG |
395 | } |
396 | ||
5e574546 DA |
397 | #ifdef CONFIG_NR_DRAM_BANKS |
398 | #define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS | |
399 | #else | |
8aa5ec6e | 400 | #define MEMORY_BANKS_MAX 4 |
5e574546 | 401 | #endif |
a6bd9e83 JR |
402 | int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks) |
403 | { | |
404 | int err, nodeoffset; | |
405 | int addr_cell_len, size_cell_len, len; | |
8aa5ec6e | 406 | u8 tmp[MEMORY_BANKS_MAX * 16]; /* Up to 64-bit address + 64-bit size */ |
a6bd9e83 | 407 | int bank; |
3c927281 | 408 | |
8aa5ec6e KP |
409 | if (banks > MEMORY_BANKS_MAX) { |
410 | printf("%s: num banks %d exceeds hardcoded limit %d." | |
411 | " Recompile with higher MEMORY_BANKS_MAX?\n", | |
412 | __FUNCTION__, banks, MEMORY_BANKS_MAX); | |
413 | return -1; | |
414 | } | |
415 | ||
3c927281 KG |
416 | err = fdt_check_header(blob); |
417 | if (err < 0) { | |
418 | printf("%s: %s\n", __FUNCTION__, fdt_strerror(err)); | |
419 | return err; | |
420 | } | |
421 | ||
422 | /* update, or add and update /memory node */ | |
423 | nodeoffset = fdt_path_offset(blob, "/memory"); | |
424 | if (nodeoffset < 0) { | |
425 | nodeoffset = fdt_add_subnode(blob, 0, "memory"); | |
35940de1 | 426 | if (nodeoffset < 0) { |
3c927281 KG |
427 | printf("WARNING: could not create /memory: %s.\n", |
428 | fdt_strerror(nodeoffset)); | |
35940de1 MY |
429 | return nodeoffset; |
430 | } | |
3c927281 KG |
431 | } |
432 | err = fdt_setprop(blob, nodeoffset, "device_type", "memory", | |
433 | sizeof("memory")); | |
434 | if (err < 0) { | |
435 | printf("WARNING: could not set %s %s.\n", "device_type", | |
436 | fdt_strerror(err)); | |
437 | return err; | |
438 | } | |
439 | ||
a6bd9e83 JR |
440 | addr_cell_len = get_cells_len(blob, "#address-cells"); |
441 | size_cell_len = get_cells_len(blob, "#size-cells"); | |
3c927281 | 442 | |
a6bd9e83 JR |
443 | for (bank = 0, len = 0; bank < banks; bank++) { |
444 | write_cell(tmp + len, start[bank], addr_cell_len); | |
445 | len += addr_cell_len; | |
446 | ||
447 | write_cell(tmp + len, size[bank], size_cell_len); | |
448 | len += size_cell_len; | |
3c927281 KG |
449 | } |
450 | ||
451 | err = fdt_setprop(blob, nodeoffset, "reg", tmp, len); | |
452 | if (err < 0) { | |
453 | printf("WARNING: could not set %s %s.\n", | |
454 | "reg", fdt_strerror(err)); | |
455 | return err; | |
456 | } | |
457 | return 0; | |
458 | } | |
459 | ||
a6bd9e83 JR |
460 | int fdt_fixup_memory(void *blob, u64 start, u64 size) |
461 | { | |
462 | return fdt_fixup_memory_banks(blob, &start, &size, 1); | |
463 | } | |
464 | ||
ba37aa03 | 465 | void fdt_fixup_ethernet(void *fdt) |
ab544633 | 466 | { |
ba37aa03 KG |
467 | int node, i, j; |
468 | char enet[16], *tmp, *end; | |
064d55f8 | 469 | char mac[16]; |
ab544633 | 470 | const char *path; |
ba37aa03 | 471 | unsigned char mac_addr[6]; |
ab544633 KG |
472 | |
473 | node = fdt_path_offset(fdt, "/aliases"); | |
ba37aa03 KG |
474 | if (node < 0) |
475 | return; | |
476 | ||
b1f49ab8 DM |
477 | if (!getenv("ethaddr")) { |
478 | if (getenv("usbethaddr")) { | |
479 | strcpy(mac, "usbethaddr"); | |
480 | } else { | |
481 | debug("No ethernet MAC Address defined\n"); | |
482 | return; | |
483 | } | |
484 | } else { | |
485 | strcpy(mac, "ethaddr"); | |
486 | } | |
487 | ||
ba37aa03 KG |
488 | i = 0; |
489 | while ((tmp = getenv(mac)) != NULL) { | |
490 | sprintf(enet, "ethernet%d", i); | |
491 | path = fdt_getprop(fdt, node, enet, NULL); | |
492 | if (!path) { | |
493 | debug("No alias for %s\n", enet); | |
494 | sprintf(mac, "eth%daddr", ++i); | |
495 | continue; | |
ab544633 | 496 | } |
ba37aa03 KG |
497 | |
498 | for (j = 0; j < 6; j++) { | |
499 | mac_addr[j] = tmp ? simple_strtoul(tmp, &end, 16) : 0; | |
500 | if (tmp) | |
501 | tmp = (*end) ? end+1 : end; | |
ab544633 | 502 | } |
ba37aa03 KG |
503 | |
504 | do_fixup_by_path(fdt, path, "mac-address", &mac_addr, 6, 0); | |
505 | do_fixup_by_path(fdt, path, "local-mac-address", | |
506 | &mac_addr, 6, 1); | |
507 | ||
508 | sprintf(mac, "eth%daddr", ++i); | |
ab544633 KG |
509 | } |
510 | } | |
18e69a35 | 511 | |
3082d234 KG |
512 | /* Resize the fdt to its actual size + a bit of padding */ |
513 | int fdt_resize(void *blob) | |
514 | { | |
515 | int i; | |
516 | uint64_t addr, size; | |
517 | int total, ret; | |
518 | uint actualsize; | |
519 | ||
520 | if (!blob) | |
521 | return 0; | |
522 | ||
523 | total = fdt_num_mem_rsv(blob); | |
524 | for (i = 0; i < total; i++) { | |
525 | fdt_get_mem_rsv(blob, i, &addr, &size); | |
92549358 | 526 | if (addr == (uintptr_t)blob) { |
3082d234 KG |
527 | fdt_del_mem_rsv(blob, i); |
528 | break; | |
529 | } | |
530 | } | |
531 | ||
f242a088 PK |
532 | /* |
533 | * Calculate the actual size of the fdt | |
3840ebfa FW |
534 | * plus the size needed for 5 fdt_add_mem_rsv, one |
535 | * for the fdt itself and 4 for a possible initrd | |
536 | * ((initrd-start + initrd-end) * 2 (name & value)) | |
f242a088 | 537 | */ |
3082d234 | 538 | actualsize = fdt_off_dt_strings(blob) + |
3840ebfa | 539 | fdt_size_dt_strings(blob) + 5 * sizeof(struct fdt_reserve_entry); |
3082d234 KG |
540 | |
541 | /* Make it so the fdt ends on a page boundary */ | |
92549358 SG |
542 | actualsize = ALIGN(actualsize + ((uintptr_t)blob & 0xfff), 0x1000); |
543 | actualsize = actualsize - ((uintptr_t)blob & 0xfff); | |
3082d234 KG |
544 | |
545 | /* Change the fdt header to reflect the correct size */ | |
546 | fdt_set_totalsize(blob, actualsize); | |
547 | ||
548 | /* Add the new reservation */ | |
92549358 | 549 | ret = fdt_add_mem_rsv(blob, (uintptr_t)blob, actualsize); |
3082d234 KG |
550 | if (ret < 0) |
551 | return ret; | |
552 | ||
553 | return actualsize; | |
554 | } | |
8ab451c4 KG |
555 | |
556 | #ifdef CONFIG_PCI | |
cfd700be | 557 | #define CONFIG_SYS_PCI_NR_INBOUND_WIN 4 |
8ab451c4 KG |
558 | |
559 | #define FDT_PCI_PREFETCH (0x40000000) | |
560 | #define FDT_PCI_MEM32 (0x02000000) | |
561 | #define FDT_PCI_IO (0x01000000) | |
562 | #define FDT_PCI_MEM64 (0x03000000) | |
563 | ||
564 | int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose) { | |
565 | ||
566 | int addrcell, sizecell, len, r; | |
567 | u32 *dma_range; | |
568 | /* sized based on pci addr cells, size-cells, & address-cells */ | |
569 | u32 dma_ranges[(3 + 2 + 2) * CONFIG_SYS_PCI_NR_INBOUND_WIN]; | |
570 | ||
571 | addrcell = fdt_getprop_u32_default(blob, "/", "#address-cells", 1); | |
572 | sizecell = fdt_getprop_u32_default(blob, "/", "#size-cells", 1); | |
573 | ||
574 | dma_range = &dma_ranges[0]; | |
575 | for (r = 0; r < hose->region_count; r++) { | |
576 | u64 bus_start, phys_start, size; | |
577 | ||
ff4e66e9 KG |
578 | /* skip if !PCI_REGION_SYS_MEMORY */ |
579 | if (!(hose->regions[r].flags & PCI_REGION_SYS_MEMORY)) | |
8ab451c4 KG |
580 | continue; |
581 | ||
582 | bus_start = (u64)hose->regions[r].bus_start; | |
583 | phys_start = (u64)hose->regions[r].phys_start; | |
584 | size = (u64)hose->regions[r].size; | |
585 | ||
586 | dma_range[0] = 0; | |
cfd700be | 587 | if (size >= 0x100000000ull) |
8ab451c4 KG |
588 | dma_range[0] |= FDT_PCI_MEM64; |
589 | else | |
590 | dma_range[0] |= FDT_PCI_MEM32; | |
591 | if (hose->regions[r].flags & PCI_REGION_PREFETCH) | |
592 | dma_range[0] |= FDT_PCI_PREFETCH; | |
593 | #ifdef CONFIG_SYS_PCI_64BIT | |
594 | dma_range[1] = bus_start >> 32; | |
595 | #else | |
596 | dma_range[1] = 0; | |
597 | #endif | |
598 | dma_range[2] = bus_start & 0xffffffff; | |
599 | ||
600 | if (addrcell == 2) { | |
601 | dma_range[3] = phys_start >> 32; | |
602 | dma_range[4] = phys_start & 0xffffffff; | |
603 | } else { | |
604 | dma_range[3] = phys_start & 0xffffffff; | |
605 | } | |
606 | ||
607 | if (sizecell == 2) { | |
608 | dma_range[3 + addrcell + 0] = size >> 32; | |
609 | dma_range[3 + addrcell + 1] = size & 0xffffffff; | |
610 | } else { | |
611 | dma_range[3 + addrcell + 0] = size & 0xffffffff; | |
612 | } | |
613 | ||
614 | dma_range += (3 + addrcell + sizecell); | |
615 | } | |
616 | ||
617 | len = dma_range - &dma_ranges[0]; | |
618 | if (len) | |
619 | fdt_setprop(blob, phb_off, "dma-ranges", &dma_ranges[0], len*4); | |
620 | ||
621 | return 0; | |
622 | } | |
623 | #endif | |
30d45c0d SR |
624 | |
625 | #ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE | |
8a805df1 SR |
626 | /* |
627 | * Provide a weak default function to return the flash bank size. | |
628 | * There might be multiple non-identical flash chips connected to one | |
629 | * chip-select, so we need to pass an index as well. | |
630 | */ | |
631 | u32 __flash_get_bank_size(int cs, int idx) | |
632 | { | |
633 | extern flash_info_t flash_info[]; | |
634 | ||
635 | /* | |
636 | * As default, a simple 1:1 mapping is provided. Boards with | |
637 | * a different mapping need to supply a board specific mapping | |
638 | * routine. | |
639 | */ | |
640 | return flash_info[cs].size; | |
641 | } | |
642 | u32 flash_get_bank_size(int cs, int idx) | |
643 | __attribute__((weak, alias("__flash_get_bank_size"))); | |
644 | ||
30d45c0d SR |
645 | /* |
646 | * This function can be used to update the size in the "reg" property | |
8a805df1 | 647 | * of all NOR FLASH device nodes. This is necessary for boards with |
30d45c0d SR |
648 | * non-fixed NOR FLASH sizes. |
649 | */ | |
8a805df1 | 650 | int fdt_fixup_nor_flash_size(void *blob) |
30d45c0d SR |
651 | { |
652 | char compat[][16] = { "cfi-flash", "jedec-flash" }; | |
653 | int off; | |
654 | int len; | |
655 | struct fdt_property *prop; | |
2778a014 | 656 | u32 *reg, *reg2; |
30d45c0d SR |
657 | int i; |
658 | ||
659 | for (i = 0; i < 2; i++) { | |
660 | off = fdt_node_offset_by_compatible(blob, -1, compat[i]); | |
661 | while (off != -FDT_ERR_NOTFOUND) { | |
8a805df1 SR |
662 | int idx; |
663 | ||
30d45c0d | 664 | /* |
8a805df1 SR |
665 | * Found one compatible node, so fixup the size |
666 | * int its reg properties | |
30d45c0d SR |
667 | */ |
668 | prop = fdt_get_property_w(blob, off, "reg", &len); | |
669 | if (prop) { | |
8a805df1 SR |
670 | int tuple_size = 3 * sizeof(reg); |
671 | ||
672 | /* | |
673 | * There might be multiple reg-tuples, | |
674 | * so loop through them all | |
675 | */ | |
2778a014 SR |
676 | reg = reg2 = (u32 *)&prop->data[0]; |
677 | for (idx = 0; idx < (len / tuple_size); idx++) { | |
8a805df1 SR |
678 | /* |
679 | * Update size in reg property | |
680 | */ | |
681 | reg[2] = flash_get_bank_size(reg[0], | |
682 | idx); | |
2778a014 SR |
683 | |
684 | /* | |
685 | * Point to next reg tuple | |
686 | */ | |
687 | reg += 3; | |
30d45c0d | 688 | } |
2778a014 SR |
689 | |
690 | fdt_setprop(blob, off, "reg", reg2, len); | |
30d45c0d SR |
691 | } |
692 | ||
693 | /* Move to next compatible node */ | |
694 | off = fdt_node_offset_by_compatible(blob, off, | |
695 | compat[i]); | |
696 | } | |
697 | } | |
698 | ||
8a805df1 | 699 | return 0; |
30d45c0d SR |
700 | } |
701 | #endif | |
3c950e2e | 702 | |
cb2707af MM |
703 | int fdt_increase_size(void *fdt, int add_len) |
704 | { | |
705 | int newlen; | |
706 | ||
707 | newlen = fdt_totalsize(fdt) + add_len; | |
708 | ||
709 | /* Open in place with a new len */ | |
710 | return fdt_open_into(fdt, fdt, newlen); | |
711 | } | |
712 | ||
3c950e2e AG |
713 | #ifdef CONFIG_FDT_FIXUP_PARTITIONS |
714 | #include <jffs2/load_kernel.h> | |
715 | #include <mtd_node.h> | |
716 | ||
717 | struct reg_cell { | |
718 | unsigned int r0; | |
719 | unsigned int r1; | |
720 | }; | |
721 | ||
722 | int fdt_del_subnodes(const void *blob, int parent_offset) | |
723 | { | |
724 | int off, ndepth; | |
725 | int ret; | |
726 | ||
727 | for (ndepth = 0, off = fdt_next_node(blob, parent_offset, &ndepth); | |
728 | (off >= 0) && (ndepth > 0); | |
729 | off = fdt_next_node(blob, off, &ndepth)) { | |
730 | if (ndepth == 1) { | |
731 | debug("delete %s: offset: %x\n", | |
732 | fdt_get_name(blob, off, 0), off); | |
733 | ret = fdt_del_node((void *)blob, off); | |
734 | if (ret < 0) { | |
735 | printf("Can't delete node: %s\n", | |
736 | fdt_strerror(ret)); | |
737 | return ret; | |
738 | } else { | |
739 | ndepth = 0; | |
740 | off = parent_offset; | |
741 | } | |
742 | } | |
743 | } | |
744 | return 0; | |
745 | } | |
746 | ||
3c950e2e AG |
747 | int fdt_del_partitions(void *blob, int parent_offset) |
748 | { | |
749 | const void *prop; | |
750 | int ndepth = 0; | |
751 | int off; | |
752 | int ret; | |
753 | ||
754 | off = fdt_next_node(blob, parent_offset, &ndepth); | |
755 | if (off > 0 && ndepth == 1) { | |
756 | prop = fdt_getprop(blob, off, "label", NULL); | |
757 | if (prop == NULL) { | |
758 | /* | |
759 | * Could not find label property, nand {}; node? | |
760 | * Check subnode, delete partitions there if any. | |
761 | */ | |
762 | return fdt_del_partitions(blob, off); | |
763 | } else { | |
764 | ret = fdt_del_subnodes(blob, parent_offset); | |
765 | if (ret < 0) { | |
766 | printf("Can't remove subnodes: %s\n", | |
767 | fdt_strerror(ret)); | |
768 | return ret; | |
769 | } | |
770 | } | |
771 | } | |
772 | return 0; | |
773 | } | |
774 | ||
775 | int fdt_node_set_part_info(void *blob, int parent_offset, | |
776 | struct mtd_device *dev) | |
777 | { | |
778 | struct list_head *pentry; | |
779 | struct part_info *part; | |
780 | struct reg_cell cell; | |
781 | int off, ndepth = 0; | |
782 | int part_num, ret; | |
783 | char buf[64]; | |
784 | ||
785 | ret = fdt_del_partitions(blob, parent_offset); | |
786 | if (ret < 0) | |
787 | return ret; | |
788 | ||
789 | /* | |
790 | * Check if it is nand {}; subnode, adjust | |
791 | * the offset in this case | |
792 | */ | |
793 | off = fdt_next_node(blob, parent_offset, &ndepth); | |
794 | if (off > 0 && ndepth == 1) | |
795 | parent_offset = off; | |
796 | ||
797 | part_num = 0; | |
798 | list_for_each_prev(pentry, &dev->parts) { | |
799 | int newoff; | |
800 | ||
801 | part = list_entry(pentry, struct part_info, link); | |
802 | ||
06503f16 | 803 | debug("%2d: %-20s0x%08llx\t0x%08llx\t%d\n", |
3c950e2e AG |
804 | part_num, part->name, part->size, |
805 | part->offset, part->mask_flags); | |
806 | ||
06503f16 | 807 | sprintf(buf, "partition@%llx", part->offset); |
3c950e2e AG |
808 | add_sub: |
809 | ret = fdt_add_subnode(blob, parent_offset, buf); | |
810 | if (ret == -FDT_ERR_NOSPACE) { | |
811 | ret = fdt_increase_size(blob, 512); | |
812 | if (!ret) | |
813 | goto add_sub; | |
814 | else | |
815 | goto err_size; | |
816 | } else if (ret < 0) { | |
817 | printf("Can't add partition node: %s\n", | |
818 | fdt_strerror(ret)); | |
819 | return ret; | |
820 | } | |
821 | newoff = ret; | |
822 | ||
823 | /* Check MTD_WRITEABLE_CMD flag */ | |
824 | if (part->mask_flags & 1) { | |
825 | add_ro: | |
826 | ret = fdt_setprop(blob, newoff, "read_only", NULL, 0); | |
827 | if (ret == -FDT_ERR_NOSPACE) { | |
828 | ret = fdt_increase_size(blob, 512); | |
829 | if (!ret) | |
830 | goto add_ro; | |
831 | else | |
832 | goto err_size; | |
833 | } else if (ret < 0) | |
834 | goto err_prop; | |
835 | } | |
836 | ||
837 | cell.r0 = cpu_to_fdt32(part->offset); | |
838 | cell.r1 = cpu_to_fdt32(part->size); | |
839 | add_reg: | |
840 | ret = fdt_setprop(blob, newoff, "reg", &cell, sizeof(cell)); | |
841 | if (ret == -FDT_ERR_NOSPACE) { | |
842 | ret = fdt_increase_size(blob, 512); | |
843 | if (!ret) | |
844 | goto add_reg; | |
845 | else | |
846 | goto err_size; | |
847 | } else if (ret < 0) | |
848 | goto err_prop; | |
849 | ||
850 | add_label: | |
851 | ret = fdt_setprop_string(blob, newoff, "label", part->name); | |
852 | if (ret == -FDT_ERR_NOSPACE) { | |
853 | ret = fdt_increase_size(blob, 512); | |
854 | if (!ret) | |
855 | goto add_label; | |
856 | else | |
857 | goto err_size; | |
858 | } else if (ret < 0) | |
859 | goto err_prop; | |
860 | ||
861 | part_num++; | |
862 | } | |
863 | return 0; | |
864 | err_size: | |
865 | printf("Can't increase blob size: %s\n", fdt_strerror(ret)); | |
866 | return ret; | |
867 | err_prop: | |
868 | printf("Can't add property: %s\n", fdt_strerror(ret)); | |
869 | return ret; | |
870 | } | |
871 | ||
872 | /* | |
873 | * Update partitions in nor/nand nodes using info from | |
874 | * mtdparts environment variable. The nodes to update are | |
875 | * specified by node_info structure which contains mtd device | |
876 | * type and compatible string: E. g. the board code in | |
877 | * ft_board_setup() could use: | |
878 | * | |
879 | * struct node_info nodes[] = { | |
880 | * { "fsl,mpc5121-nfc", MTD_DEV_TYPE_NAND, }, | |
881 | * { "cfi-flash", MTD_DEV_TYPE_NOR, }, | |
882 | * }; | |
883 | * | |
884 | * fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); | |
885 | */ | |
886 | void fdt_fixup_mtdparts(void *blob, void *node_info, int node_info_size) | |
887 | { | |
888 | struct node_info *ni = node_info; | |
889 | struct mtd_device *dev; | |
890 | char *parts; | |
891 | int i, idx; | |
892 | int noff; | |
893 | ||
894 | parts = getenv("mtdparts"); | |
895 | if (!parts) | |
896 | return; | |
897 | ||
898 | if (mtdparts_init() != 0) | |
899 | return; | |
900 | ||
901 | for (i = 0; i < node_info_size; i++) { | |
902 | idx = 0; | |
903 | noff = fdt_node_offset_by_compatible(blob, -1, ni[i].compat); | |
904 | while (noff != -FDT_ERR_NOTFOUND) { | |
905 | debug("%s: %s, mtd dev type %d\n", | |
906 | fdt_get_name(blob, noff, 0), | |
907 | ni[i].compat, ni[i].type); | |
908 | dev = device_find(ni[i].type, idx++); | |
909 | if (dev) { | |
910 | if (fdt_node_set_part_info(blob, noff, dev)) | |
911 | return; /* return on error */ | |
912 | } | |
913 | ||
914 | /* Jump to next flash node */ | |
915 | noff = fdt_node_offset_by_compatible(blob, noff, | |
916 | ni[i].compat); | |
917 | } | |
918 | } | |
919 | } | |
920 | #endif | |
49b97d9c KG |
921 | |
922 | void fdt_del_node_and_alias(void *blob, const char *alias) | |
923 | { | |
924 | int off = fdt_path_offset(blob, alias); | |
925 | ||
926 | if (off < 0) | |
927 | return; | |
928 | ||
929 | fdt_del_node(blob, off); | |
930 | ||
931 | off = fdt_path_offset(blob, "/aliases"); | |
932 | fdt_delprop(blob, off, alias); | |
933 | } | |
a0342c08 KG |
934 | |
935 | /* Helper to read a big number; size is in cells (not bytes) */ | |
8aa5ec6e | 936 | static inline u64 of_read_number(const fdt32_t *cell, int size) |
a0342c08 KG |
937 | { |
938 | u64 r = 0; | |
939 | while (size--) | |
8aa5ec6e | 940 | r = (r << 32) | fdt32_to_cpu(*(cell++)); |
a0342c08 KG |
941 | return r; |
942 | } | |
943 | ||
a0342c08 KG |
944 | #define PRu64 "%llx" |
945 | ||
946 | /* Max address size we deal with */ | |
947 | #define OF_MAX_ADDR_CELLS 4 | |
948 | #define OF_BAD_ADDR ((u64)-1) | |
949 | #define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \ | |
950 | (ns) > 0) | |
951 | ||
952 | /* Debug utility */ | |
953 | #ifdef DEBUG | |
8aa5ec6e | 954 | static void of_dump_addr(const char *s, const fdt32_t *addr, int na) |
a0342c08 KG |
955 | { |
956 | printf("%s", s); | |
957 | while(na--) | |
958 | printf(" %08x", *(addr++)); | |
959 | printf("\n"); | |
960 | } | |
961 | #else | |
8aa5ec6e | 962 | static void of_dump_addr(const char *s, const fdt32_t *addr, int na) { } |
a0342c08 KG |
963 | #endif |
964 | ||
965 | /* Callbacks for bus specific translators */ | |
966 | struct of_bus { | |
967 | const char *name; | |
968 | const char *addresses; | |
6395f318 | 969 | void (*count_cells)(void *blob, int parentoffset, |
a0342c08 | 970 | int *addrc, int *sizec); |
8aa5ec6e | 971 | u64 (*map)(fdt32_t *addr, const fdt32_t *range, |
a0342c08 | 972 | int na, int ns, int pna); |
8aa5ec6e | 973 | int (*translate)(fdt32_t *addr, u64 offset, int na); |
a0342c08 KG |
974 | }; |
975 | ||
976 | /* Default translator (generic bus) */ | |
6395f318 | 977 | static void of_bus_default_count_cells(void *blob, int parentoffset, |
a0342c08 KG |
978 | int *addrc, int *sizec) |
979 | { | |
8aa5ec6e | 980 | const fdt32_t *prop; |
6395f318 SW |
981 | |
982 | if (addrc) { | |
983 | prop = fdt_getprop(blob, parentoffset, "#address-cells", NULL); | |
984 | if (prop) | |
8aa5ec6e | 985 | *addrc = be32_to_cpup(prop); |
6395f318 SW |
986 | else |
987 | *addrc = 2; | |
988 | } | |
989 | ||
990 | if (sizec) { | |
991 | prop = fdt_getprop(blob, parentoffset, "#size-cells", NULL); | |
992 | if (prop) | |
8aa5ec6e | 993 | *sizec = be32_to_cpup(prop); |
6395f318 SW |
994 | else |
995 | *sizec = 1; | |
996 | } | |
a0342c08 KG |
997 | } |
998 | ||
8aa5ec6e | 999 | static u64 of_bus_default_map(fdt32_t *addr, const fdt32_t *range, |
a0342c08 KG |
1000 | int na, int ns, int pna) |
1001 | { | |
1002 | u64 cp, s, da; | |
1003 | ||
1004 | cp = of_read_number(range, na); | |
1005 | s = of_read_number(range + na + pna, ns); | |
1006 | da = of_read_number(addr, na); | |
1007 | ||
1008 | debug("OF: default map, cp="PRu64", s="PRu64", da="PRu64"\n", | |
1009 | cp, s, da); | |
1010 | ||
1011 | if (da < cp || da >= (cp + s)) | |
1012 | return OF_BAD_ADDR; | |
1013 | return da - cp; | |
1014 | } | |
1015 | ||
8aa5ec6e | 1016 | static int of_bus_default_translate(fdt32_t *addr, u64 offset, int na) |
a0342c08 KG |
1017 | { |
1018 | u64 a = of_read_number(addr, na); | |
1019 | memset(addr, 0, na * 4); | |
1020 | a += offset; | |
1021 | if (na > 1) | |
8aa5ec6e KP |
1022 | addr[na - 2] = cpu_to_fdt32(a >> 32); |
1023 | addr[na - 1] = cpu_to_fdt32(a & 0xffffffffu); | |
a0342c08 KG |
1024 | |
1025 | return 0; | |
1026 | } | |
1027 | ||
1028 | /* Array of bus specific translators */ | |
1029 | static struct of_bus of_busses[] = { | |
1030 | /* Default */ | |
1031 | { | |
1032 | .name = "default", | |
1033 | .addresses = "reg", | |
1034 | .count_cells = of_bus_default_count_cells, | |
1035 | .map = of_bus_default_map, | |
1036 | .translate = of_bus_default_translate, | |
1037 | }, | |
1038 | }; | |
1039 | ||
1040 | static int of_translate_one(void * blob, int parent, struct of_bus *bus, | |
8aa5ec6e | 1041 | struct of_bus *pbus, fdt32_t *addr, |
a0342c08 KG |
1042 | int na, int ns, int pna, const char *rprop) |
1043 | { | |
8aa5ec6e | 1044 | const fdt32_t *ranges; |
a0342c08 KG |
1045 | int rlen; |
1046 | int rone; | |
1047 | u64 offset = OF_BAD_ADDR; | |
1048 | ||
1049 | /* Normally, an absence of a "ranges" property means we are | |
1050 | * crossing a non-translatable boundary, and thus the addresses | |
1051 | * below the current not cannot be converted to CPU physical ones. | |
1052 | * Unfortunately, while this is very clear in the spec, it's not | |
1053 | * what Apple understood, and they do have things like /uni-n or | |
1054 | * /ht nodes with no "ranges" property and a lot of perfectly | |
1055 | * useable mapped devices below them. Thus we treat the absence of | |
1056 | * "ranges" as equivalent to an empty "ranges" property which means | |
1057 | * a 1:1 translation at that level. It's up to the caller not to try | |
1058 | * to translate addresses that aren't supposed to be translated in | |
1059 | * the first place. --BenH. | |
1060 | */ | |
8aa5ec6e | 1061 | ranges = fdt_getprop(blob, parent, rprop, &rlen); |
a0342c08 KG |
1062 | if (ranges == NULL || rlen == 0) { |
1063 | offset = of_read_number(addr, na); | |
1064 | memset(addr, 0, pna * 4); | |
1065 | debug("OF: no ranges, 1:1 translation\n"); | |
1066 | goto finish; | |
1067 | } | |
1068 | ||
1069 | debug("OF: walking ranges...\n"); | |
1070 | ||
1071 | /* Now walk through the ranges */ | |
1072 | rlen /= 4; | |
1073 | rone = na + pna + ns; | |
1074 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
1075 | offset = bus->map(addr, ranges, na, ns, pna); | |
1076 | if (offset != OF_BAD_ADDR) | |
1077 | break; | |
1078 | } | |
1079 | if (offset == OF_BAD_ADDR) { | |
1080 | debug("OF: not found !\n"); | |
1081 | return 1; | |
1082 | } | |
1083 | memcpy(addr, ranges + na, 4 * pna); | |
1084 | ||
1085 | finish: | |
1086 | of_dump_addr("OF: parent translation for:", addr, pna); | |
1087 | debug("OF: with offset: "PRu64"\n", offset); | |
1088 | ||
1089 | /* Translate it into parent bus space */ | |
1090 | return pbus->translate(addr, offset, pna); | |
1091 | } | |
1092 | ||
1093 | /* | |
1094 | * Translate an address from the device-tree into a CPU physical address, | |
1095 | * this walks up the tree and applies the various bus mappings on the | |
1096 | * way. | |
1097 | * | |
1098 | * Note: We consider that crossing any level with #size-cells == 0 to mean | |
1099 | * that translation is impossible (that is we are not dealing with a value | |
1100 | * that can be mapped to a cpu physical address). This is not really specified | |
1101 | * that way, but this is traditionally the way IBM at least do things | |
1102 | */ | |
8aa5ec6e KP |
1103 | static u64 __of_translate_address(void *blob, int node_offset, const fdt32_t *in_addr, |
1104 | const char *rprop) | |
a0342c08 KG |
1105 | { |
1106 | int parent; | |
1107 | struct of_bus *bus, *pbus; | |
8aa5ec6e | 1108 | fdt32_t addr[OF_MAX_ADDR_CELLS]; |
a0342c08 KG |
1109 | int na, ns, pna, pns; |
1110 | u64 result = OF_BAD_ADDR; | |
1111 | ||
1112 | debug("OF: ** translation for device %s **\n", | |
1113 | fdt_get_name(blob, node_offset, NULL)); | |
1114 | ||
1115 | /* Get parent & match bus type */ | |
1116 | parent = fdt_parent_offset(blob, node_offset); | |
1117 | if (parent < 0) | |
1118 | goto bail; | |
1119 | bus = &of_busses[0]; | |
1120 | ||
1121 | /* Cound address cells & copy address locally */ | |
6395f318 | 1122 | bus->count_cells(blob, parent, &na, &ns); |
a0342c08 KG |
1123 | if (!OF_CHECK_COUNTS(na, ns)) { |
1124 | printf("%s: Bad cell count for %s\n", __FUNCTION__, | |
1125 | fdt_get_name(blob, node_offset, NULL)); | |
1126 | goto bail; | |
1127 | } | |
1128 | memcpy(addr, in_addr, na * 4); | |
1129 | ||
1130 | debug("OF: bus is %s (na=%d, ns=%d) on %s\n", | |
1131 | bus->name, na, ns, fdt_get_name(blob, parent, NULL)); | |
1132 | of_dump_addr("OF: translating address:", addr, na); | |
1133 | ||
1134 | /* Translate */ | |
1135 | for (;;) { | |
1136 | /* Switch to parent bus */ | |
1137 | node_offset = parent; | |
1138 | parent = fdt_parent_offset(blob, node_offset); | |
1139 | ||
1140 | /* If root, we have finished */ | |
1141 | if (parent < 0) { | |
1142 | debug("OF: reached root node\n"); | |
1143 | result = of_read_number(addr, na); | |
1144 | break; | |
1145 | } | |
1146 | ||
1147 | /* Get new parent bus and counts */ | |
1148 | pbus = &of_busses[0]; | |
6395f318 | 1149 | pbus->count_cells(blob, parent, &pna, &pns); |
a0342c08 KG |
1150 | if (!OF_CHECK_COUNTS(pna, pns)) { |
1151 | printf("%s: Bad cell count for %s\n", __FUNCTION__, | |
1152 | fdt_get_name(blob, node_offset, NULL)); | |
1153 | break; | |
1154 | } | |
1155 | ||
1156 | debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n", | |
1157 | pbus->name, pna, pns, fdt_get_name(blob, parent, NULL)); | |
1158 | ||
1159 | /* Apply bus translation */ | |
1160 | if (of_translate_one(blob, node_offset, bus, pbus, | |
1161 | addr, na, ns, pna, rprop)) | |
1162 | break; | |
1163 | ||
1164 | /* Complete the move up one level */ | |
1165 | na = pna; | |
1166 | ns = pns; | |
1167 | bus = pbus; | |
1168 | ||
1169 | of_dump_addr("OF: one level translation:", addr, na); | |
1170 | } | |
1171 | bail: | |
1172 | ||
1173 | return result; | |
1174 | } | |
1175 | ||
8aa5ec6e | 1176 | u64 fdt_translate_address(void *blob, int node_offset, const fdt32_t *in_addr) |
a0342c08 KG |
1177 | { |
1178 | return __of_translate_address(blob, node_offset, in_addr, "ranges"); | |
1179 | } | |
75e73afd KG |
1180 | |
1181 | /** | |
1182 | * fdt_node_offset_by_compat_reg: Find a node that matches compatiable and | |
1183 | * who's reg property matches a physical cpu address | |
1184 | * | |
1185 | * @blob: ptr to device tree | |
1186 | * @compat: compatiable string to match | |
1187 | * @compat_off: property name | |
1188 | * | |
1189 | */ | |
1190 | int fdt_node_offset_by_compat_reg(void *blob, const char *compat, | |
1191 | phys_addr_t compat_off) | |
1192 | { | |
1193 | int len, off = fdt_node_offset_by_compatible(blob, -1, compat); | |
1194 | while (off != -FDT_ERR_NOTFOUND) { | |
8aa5ec6e | 1195 | const fdt32_t *reg = fdt_getprop(blob, off, "reg", &len); |
75e73afd KG |
1196 | if (reg) { |
1197 | if (compat_off == fdt_translate_address(blob, off, reg)) | |
1198 | return off; | |
1199 | } | |
1200 | off = fdt_node_offset_by_compatible(blob, off, compat); | |
1201 | } | |
1202 | ||
1203 | return -FDT_ERR_NOTFOUND; | |
1204 | } | |
1205 | ||
b4b847e9 KG |
1206 | /** |
1207 | * fdt_alloc_phandle: Return next free phandle value | |
1208 | * | |
1209 | * @blob: ptr to device tree | |
1210 | */ | |
1211 | int fdt_alloc_phandle(void *blob) | |
1212 | { | |
50bf17bd | 1213 | int offset, phandle = 0; |
b4b847e9 KG |
1214 | |
1215 | for (offset = fdt_next_node(blob, -1, NULL); offset >= 0; | |
1216 | offset = fdt_next_node(blob, offset, NULL)) { | |
50bf17bd | 1217 | phandle = max(phandle, fdt_get_phandle(blob, offset)); |
b4b847e9 | 1218 | } |
75e73afd | 1219 | |
b4b847e9 KG |
1220 | return phandle + 1; |
1221 | } | |
beca5a5f | 1222 | |
a8d2a75d | 1223 | /* |
f117c0f0 | 1224 | * fdt_set_phandle: Create a phandle property for the given node |
a8d2a75d GVB |
1225 | * |
1226 | * @fdt: ptr to device tree | |
1227 | * @nodeoffset: node to update | |
1228 | * @phandle: phandle value to set (must be unique) | |
f117c0f0 KG |
1229 | */ |
1230 | int fdt_set_phandle(void *fdt, int nodeoffset, uint32_t phandle) | |
a8d2a75d GVB |
1231 | { |
1232 | int ret; | |
1233 | ||
1234 | #ifdef DEBUG | |
1235 | int off = fdt_node_offset_by_phandle(fdt, phandle); | |
1236 | ||
1237 | if ((off >= 0) && (off != nodeoffset)) { | |
1238 | char buf[64]; | |
1239 | ||
1240 | fdt_get_path(fdt, nodeoffset, buf, sizeof(buf)); | |
1241 | printf("Trying to update node %s with phandle %u ", | |
1242 | buf, phandle); | |
1243 | ||
1244 | fdt_get_path(fdt, off, buf, sizeof(buf)); | |
1245 | printf("that already exists in node %s.\n", buf); | |
1246 | return -FDT_ERR_BADPHANDLE; | |
1247 | } | |
1248 | #endif | |
1249 | ||
1250 | ret = fdt_setprop_cell(fdt, nodeoffset, "phandle", phandle); | |
1251 | if (ret < 0) | |
1252 | return ret; | |
1253 | ||
1254 | /* | |
1255 | * For now, also set the deprecated "linux,phandle" property, so that we | |
1256 | * don't break older kernels. | |
1257 | */ | |
1258 | ret = fdt_setprop_cell(fdt, nodeoffset, "linux,phandle", phandle); | |
1259 | ||
1260 | return ret; | |
1261 | } | |
1262 | ||
10aeabd1 KG |
1263 | /* |
1264 | * fdt_create_phandle: Create a phandle property for the given node | |
1265 | * | |
1266 | * @fdt: ptr to device tree | |
1267 | * @nodeoffset: node to update | |
1268 | */ | |
3c927ccc | 1269 | unsigned int fdt_create_phandle(void *fdt, int nodeoffset) |
10aeabd1 KG |
1270 | { |
1271 | /* see if there is a phandle already */ | |
1272 | int phandle = fdt_get_phandle(fdt, nodeoffset); | |
1273 | ||
1274 | /* if we got 0, means no phandle so create one */ | |
1275 | if (phandle == 0) { | |
3c927ccc TT |
1276 | int ret; |
1277 | ||
10aeabd1 | 1278 | phandle = fdt_alloc_phandle(fdt); |
3c927ccc TT |
1279 | ret = fdt_set_phandle(fdt, nodeoffset, phandle); |
1280 | if (ret < 0) { | |
1281 | printf("Can't set phandle %u: %s\n", phandle, | |
1282 | fdt_strerror(ret)); | |
1283 | return 0; | |
1284 | } | |
10aeabd1 KG |
1285 | } |
1286 | ||
1287 | return phandle; | |
1288 | } | |
1289 | ||
2a523f52 SL |
1290 | /* |
1291 | * fdt_set_node_status: Set status for the given node | |
1292 | * | |
1293 | * @fdt: ptr to device tree | |
1294 | * @nodeoffset: node to update | |
1295 | * @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED, | |
1296 | * FDT_STATUS_FAIL, FDT_STATUS_FAIL_ERROR_CODE | |
1297 | * @error_code: optional, only used if status is FDT_STATUS_FAIL_ERROR_CODE | |
1298 | */ | |
1299 | int fdt_set_node_status(void *fdt, int nodeoffset, | |
1300 | enum fdt_status status, unsigned int error_code) | |
1301 | { | |
1302 | char buf[16]; | |
1303 | int ret = 0; | |
1304 | ||
1305 | if (nodeoffset < 0) | |
1306 | return nodeoffset; | |
1307 | ||
1308 | switch (status) { | |
1309 | case FDT_STATUS_OKAY: | |
1310 | ret = fdt_setprop_string(fdt, nodeoffset, "status", "okay"); | |
1311 | break; | |
1312 | case FDT_STATUS_DISABLED: | |
1313 | ret = fdt_setprop_string(fdt, nodeoffset, "status", "disabled"); | |
1314 | break; | |
1315 | case FDT_STATUS_FAIL: | |
1316 | ret = fdt_setprop_string(fdt, nodeoffset, "status", "fail"); | |
1317 | break; | |
1318 | case FDT_STATUS_FAIL_ERROR_CODE: | |
1319 | sprintf(buf, "fail-%d", error_code); | |
1320 | ret = fdt_setprop_string(fdt, nodeoffset, "status", buf); | |
1321 | break; | |
1322 | default: | |
1323 | printf("Invalid fdt status: %x\n", status); | |
1324 | ret = -1; | |
1325 | break; | |
1326 | } | |
1327 | ||
1328 | return ret; | |
1329 | } | |
1330 | ||
1331 | /* | |
1332 | * fdt_set_status_by_alias: Set status for the given node given an alias | |
1333 | * | |
1334 | * @fdt: ptr to device tree | |
1335 | * @alias: alias of node to update | |
1336 | * @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED, | |
1337 | * FDT_STATUS_FAIL, FDT_STATUS_FAIL_ERROR_CODE | |
1338 | * @error_code: optional, only used if status is FDT_STATUS_FAIL_ERROR_CODE | |
1339 | */ | |
1340 | int fdt_set_status_by_alias(void *fdt, const char* alias, | |
1341 | enum fdt_status status, unsigned int error_code) | |
1342 | { | |
1343 | int offset = fdt_path_offset(fdt, alias); | |
1344 | ||
1345 | return fdt_set_node_status(fdt, offset, status, error_code); | |
1346 | } | |
1347 | ||
096eb3f5 | 1348 | #if defined(CONFIG_VIDEO) || defined(CONFIG_LCD) |
beca5a5f AG |
1349 | int fdt_add_edid(void *blob, const char *compat, unsigned char *edid_buf) |
1350 | { | |
1351 | int noff; | |
1352 | int ret; | |
1353 | ||
1354 | noff = fdt_node_offset_by_compatible(blob, -1, compat); | |
1355 | if (noff != -FDT_ERR_NOTFOUND) { | |
1356 | debug("%s: %s\n", fdt_get_name(blob, noff, 0), compat); | |
1357 | add_edid: | |
1358 | ret = fdt_setprop(blob, noff, "edid", edid_buf, 128); | |
1359 | if (ret == -FDT_ERR_NOSPACE) { | |
1360 | ret = fdt_increase_size(blob, 512); | |
1361 | if (!ret) | |
1362 | goto add_edid; | |
1363 | else | |
1364 | goto err_size; | |
1365 | } else if (ret < 0) { | |
1366 | printf("Can't add property: %s\n", fdt_strerror(ret)); | |
1367 | return ret; | |
1368 | } | |
1369 | } | |
1370 | return 0; | |
1371 | err_size: | |
1372 | printf("Can't increase blob size: %s\n", fdt_strerror(ret)); | |
1373 | return ret; | |
1374 | } | |
1375 | #endif | |
bb682001 TT |
1376 | |
1377 | /* | |
1378 | * Verify the physical address of device tree node for a given alias | |
1379 | * | |
1380 | * This function locates the device tree node of a given alias, and then | |
1381 | * verifies that the physical address of that device matches the given | |
1382 | * parameter. It displays a message if there is a mismatch. | |
1383 | * | |
1384 | * Returns 1 on success, 0 on failure | |
1385 | */ | |
1386 | int fdt_verify_alias_address(void *fdt, int anode, const char *alias, u64 addr) | |
1387 | { | |
1388 | const char *path; | |
8aa5ec6e | 1389 | const fdt32_t *reg; |
bb682001 TT |
1390 | int node, len; |
1391 | u64 dt_addr; | |
1392 | ||
1393 | path = fdt_getprop(fdt, anode, alias, NULL); | |
1394 | if (!path) { | |
1395 | /* If there's no such alias, then it's not a failure */ | |
1396 | return 1; | |
1397 | } | |
1398 | ||
1399 | node = fdt_path_offset(fdt, path); | |
1400 | if (node < 0) { | |
1401 | printf("Warning: device tree alias '%s' points to invalid " | |
1402 | "node %s.\n", alias, path); | |
1403 | return 0; | |
1404 | } | |
1405 | ||
1406 | reg = fdt_getprop(fdt, node, "reg", &len); | |
1407 | if (!reg) { | |
1408 | printf("Warning: device tree node '%s' has no address.\n", | |
1409 | path); | |
1410 | return 0; | |
1411 | } | |
1412 | ||
1413 | dt_addr = fdt_translate_address(fdt, node, reg); | |
1414 | if (addr != dt_addr) { | |
1415 | printf("Warning: U-Boot configured device %s at address %llx,\n" | |
1416 | " but the device tree has it address %llx.\n", | |
1417 | alias, addr, dt_addr); | |
1418 | return 0; | |
1419 | } | |
1420 | ||
1421 | return 1; | |
1422 | } | |
1423 | ||
1424 | /* | |
1425 | * Returns the base address of an SOC or PCI node | |
1426 | */ | |
1427 | u64 fdt_get_base_address(void *fdt, int node) | |
1428 | { | |
1429 | int size; | |
1430 | u32 naddr; | |
8aa5ec6e | 1431 | const fdt32_t *prop; |
bb682001 TT |
1432 | |
1433 | prop = fdt_getprop(fdt, node, "#address-cells", &size); | |
1434 | if (prop && size == 4) | |
8aa5ec6e | 1435 | naddr = be32_to_cpup(prop); |
bb682001 TT |
1436 | else |
1437 | naddr = 2; | |
1438 | ||
1439 | prop = fdt_getprop(fdt, node, "ranges", &size); | |
1440 | ||
1441 | return prop ? fdt_translate_address(fdt, node, prop + naddr) : 0; | |
1442 | } | |
c48e6868 AG |
1443 | |
1444 | /* | |
1445 | * Read a property of size <prop_len>. Currently only supports 1 or 2 cells. | |
1446 | */ | |
1447 | static int fdt_read_prop(const fdt32_t *prop, int prop_len, int cell_off, | |
1448 | uint64_t *val, int cells) | |
1449 | { | |
1450 | const fdt32_t *prop32 = &prop[cell_off]; | |
1451 | const fdt64_t *prop64 = (const fdt64_t *)&prop[cell_off]; | |
1452 | ||
1453 | if ((cell_off + cells) > prop_len) | |
1454 | return -FDT_ERR_NOSPACE; | |
1455 | ||
1456 | switch (cells) { | |
1457 | case 1: | |
1458 | *val = fdt32_to_cpu(*prop32); | |
1459 | break; | |
1460 | case 2: | |
1461 | *val = fdt64_to_cpu(*prop64); | |
1462 | break; | |
1463 | default: | |
1464 | return -FDT_ERR_NOSPACE; | |
1465 | } | |
1466 | ||
1467 | return 0; | |
1468 | } | |
1469 | ||
1470 | /** | |
1471 | * fdt_read_range - Read a node's n'th range property | |
1472 | * | |
1473 | * @fdt: ptr to device tree | |
1474 | * @node: offset of node | |
1475 | * @n: range index | |
1476 | * @child_addr: pointer to storage for the "child address" field | |
1477 | * @addr: pointer to storage for the CPU view translated physical start | |
1478 | * @len: pointer to storage for the range length | |
1479 | * | |
1480 | * Convenience function that reads and interprets a specific range out of | |
1481 | * a number of the "ranges" property array. | |
1482 | */ | |
1483 | int fdt_read_range(void *fdt, int node, int n, uint64_t *child_addr, | |
1484 | uint64_t *addr, uint64_t *len) | |
1485 | { | |
1486 | int pnode = fdt_parent_offset(fdt, node); | |
1487 | const fdt32_t *ranges; | |
1488 | int pacells; | |
1489 | int acells; | |
1490 | int scells; | |
1491 | int ranges_len; | |
1492 | int cell = 0; | |
1493 | int r = 0; | |
1494 | ||
1495 | /* | |
1496 | * The "ranges" property is an array of | |
1497 | * { <child address> <parent address> <size in child address space> } | |
1498 | * | |
1499 | * All 3 elements can span a diffent number of cells. Fetch their size. | |
1500 | */ | |
1501 | pacells = fdt_getprop_u32_default_node(fdt, pnode, 0, "#address-cells", 1); | |
1502 | acells = fdt_getprop_u32_default_node(fdt, node, 0, "#address-cells", 1); | |
1503 | scells = fdt_getprop_u32_default_node(fdt, node, 0, "#size-cells", 1); | |
1504 | ||
1505 | /* Now try to get the ranges property */ | |
1506 | ranges = fdt_getprop(fdt, node, "ranges", &ranges_len); | |
1507 | if (!ranges) | |
1508 | return -FDT_ERR_NOTFOUND; | |
1509 | ranges_len /= sizeof(uint32_t); | |
1510 | ||
1511 | /* Jump to the n'th entry */ | |
1512 | cell = n * (pacells + acells + scells); | |
1513 | ||
1514 | /* Read <child address> */ | |
1515 | if (child_addr) { | |
1516 | r = fdt_read_prop(ranges, ranges_len, cell, child_addr, | |
1517 | acells); | |
1518 | if (r) | |
1519 | return r; | |
1520 | } | |
1521 | cell += acells; | |
1522 | ||
1523 | /* Read <parent address> */ | |
1524 | if (addr) | |
1525 | *addr = fdt_translate_address(fdt, node, ranges + cell); | |
1526 | cell += pacells; | |
1527 | ||
1528 | /* Read <size in child address space> */ | |
1529 | if (len) { | |
1530 | r = fdt_read_prop(ranges, ranges_len, cell, len, scells); | |
1531 | if (r) | |
1532 | return r; | |
1533 | } | |
1534 | ||
1535 | return 0; | |
1536 | } |