[people/ms/u-boot.git] / common / miiphyutil.c

/*
 * (C) Copyright 2001
 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/*
 * This provides a bit-banged interface to the ethernet MII management
 * channel.
 */

#include <common.h>
#include <dm.h>
#include <miiphy.h>
#include <phy.h>

#include <asm/types.h>
#include <linux/list.h>
#include <malloc.h>
#include <net.h>

/* local debug macro */
#undef MII_DEBUG

#undef debug
#ifdef MII_DEBUG
#define debug(fmt, args...)	printf(fmt, ##args)
#else
#define debug(fmt, args...)
#endif /* MII_DEBUG */

static struct list_head mii_devs;
static struct mii_dev *current_mii;

/*
 * Lookup the mii_dev struct by the registered device name.
 */
struct mii_dev *miiphy_get_dev_by_name(const char *devname)
{
	struct list_head *entry;
	struct mii_dev *dev;

	if (!devname) {
		printf("NULL device name!\n");
		return NULL;
	}

	list_for_each(entry, &mii_devs) {
		dev = list_entry(entry, struct mii_dev, link);
		if (strcmp(dev->name, devname) == 0)
			return dev;
	}

	return NULL;
}

/*****************************************************************************
 *
 * Initialize global data. Need to be called before any other miiphy routine.
 */
void miiphy_init(void)
{
	INIT_LIST_HEAD(&mii_devs);
	current_mii = NULL;
}

struct mii_dev *mdio_alloc(void)
{
	struct mii_dev *bus;

	bus = malloc(sizeof(*bus));
	if (!bus)
		return bus;

	memset(bus, 0, sizeof(*bus));

	/* initalize mii_dev struct fields */
	INIT_LIST_HEAD(&bus->link);

	return bus;
}

void mdio_free(struct mii_dev *bus)
{
	free(bus);
}

int mdio_register(struct mii_dev *bus)
{
	if (!bus || !bus->read || !bus->write)
		return -1;

	/* check if we have unique name */
	if (miiphy_get_dev_by_name(bus->name)) {
		printf("mdio_register: non unique device name '%s'\n",
			bus->name);
		return -1;
	}

	/* add it to the list */
	list_add_tail(&bus->link, &mii_devs);

	if (!current_mii)
		current_mii = bus;

	return 0;
}

int mdio_unregister(struct mii_dev *bus)
{
	if (!bus)
		return 0;

	/* delete it from the list */
	list_del(&bus->link);

	if (current_mii == bus)
		current_mii = NULL;

	return 0;
}

void mdio_list_devices(void)
{
	struct list_head *entry;

	list_for_each(entry, &mii_devs) {
		int i;
		struct mii_dev *bus = list_entry(entry, struct mii_dev, link);

		printf("%s:\n", bus->name);

		for (i = 0; i < PHY_MAX_ADDR; i++) {
			struct phy_device *phydev = bus->phymap[i];

			if (phydev) {
				printf("%x - %s", i, phydev->drv->name);

				if (phydev->dev)
					printf(" <--> %s\n", phydev->dev->name);
				else
					printf("\n");
			}
		}
	}
}

int miiphy_set_current_dev(const char *devname)
{
	struct mii_dev *dev;

	dev = miiphy_get_dev_by_name(devname);
	if (dev) {
		current_mii = dev;
		return 0;
	}

	printf("No such device: %s\n", devname);

	return 1;
}

struct mii_dev *mdio_get_current_dev(void)
{
	return current_mii;
}

struct phy_device *mdio_phydev_for_ethname(const char *ethname)
{
	struct list_head *entry;
	struct mii_dev *bus;

	list_for_each(entry, &mii_devs) {
		int i;
		bus = list_entry(entry, struct mii_dev, link);

		for (i = 0; i < PHY_MAX_ADDR; i++) {
			if (!bus->phymap[i] || !bus->phymap[i]->dev)
				continue;

			if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
				return bus->phymap[i];
		}
	}

	printf("%s is not a known ethernet\n", ethname);
	return NULL;
}

const char *miiphy_get_current_dev(void)
{
	if (current_mii)
		return current_mii->name;

	return NULL;
}

static struct mii_dev *miiphy_get_active_dev(const char *devname)
{
	/* If the current mii is the one we want, return it */
	if (current_mii)
		if (strcmp(current_mii->name, devname) == 0)
			return current_mii;

	/* Otherwise, set the active one to the one we want */
	if (miiphy_set_current_dev(devname))
		return NULL;
	else
		return current_mii;
}

/*****************************************************************************
 *
 * Read to variable <value> from the PHY attached to device <devname>,
 * use PHY address <addr> and register <reg>.
 *
 * This API is deprecated. Use phy_read on a phy_device found via phy_connect
 *
 * Returns:
 *   0 on success
 */
int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
		 unsigned short *value)
{
	struct mii_dev *bus;
	int ret;

	bus = miiphy_get_active_dev(devname);
	if (!bus)
		return 1;

	ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
	if (ret < 0)
		return 1;

	*value = (unsigned short)ret;
	return 0;
}

/*****************************************************************************
 *
 * Write <value> to the PHY attached to device <devname>,
 * use PHY address <addr> and register <reg>.
 *
 * This API is deprecated. Use phy_write on a phy_device found by phy_connect
 *
 * Returns:
 *   0 on success
 */
int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
		  unsigned short value)
{
	struct mii_dev *bus;

	bus = miiphy_get_active_dev(devname);
	if (bus)
		return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);

	return 1;
}

/*****************************************************************************
 *
 * Print out list of registered MII capable devices.
 */
void miiphy_listdev(void)
{
	struct list_head *entry;
	struct mii_dev *dev;

	puts("MII devices: ");
	list_for_each(entry, &mii_devs) {
		dev = list_entry(entry, struct mii_dev, link);
		printf("'%s' ", dev->name);
	}
	puts("\n");

	if (current_mii)
		printf("Current device: '%s'\n", current_mii->name);
}

/*****************************************************************************
 *
 * Read the OUI, manufacture's model number, and revision number.
 *
 * OUI:     22 bits (unsigned int)
 * Model:    6 bits (unsigned char)
 * Revision: 4 bits (unsigned char)
 *
 * This API is deprecated.
 *
 * Returns:
 *   0 on success
 */
int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
		 unsigned char *model, unsigned char *rev)
{
	unsigned int reg = 0;
	unsigned short tmp;

	if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
		debug("PHY ID register 2 read failed\n");
		return -1;
	}
	reg = tmp;

	debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);

	if (reg == 0xFFFF) {
		/* No physical device present at this address */
		return -1;
	}

	if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
		debug("PHY ID register 1 read failed\n");
		return -1;
	}
	reg |= tmp << 16;
	debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);

	*oui = (reg >> 10);
	*model = (unsigned char)((reg >> 4) & 0x0000003F);
	*rev = (unsigned char)(reg & 0x0000000F);
	return 0;
}

#ifndef CONFIG_PHYLIB
/*****************************************************************************
 *
 * Reset the PHY.
 *
 * This API is deprecated. Use PHYLIB.
 *
 * Returns:
 *   0 on success
 */
int miiphy_reset(const char *devname, unsigned char addr)
{
	unsigned short reg;
	int timeout = 500;

	if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
		debug("PHY status read failed\n");
		return -1;
	}
	if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
		debug("PHY reset failed\n");
		return -1;
	}
#ifdef CONFIG_PHY_RESET_DELAY
	udelay(CONFIG_PHY_RESET_DELAY);	/* Intel LXT971A needs this */
#endif
	/*
	 * Poll the control register for the reset bit to go to 0 (it is
	 * auto-clearing).  This should happen within 0.5 seconds per the
	 * IEEE spec.
	 */
	reg = 0x8000;
	while (((reg & 0x8000) != 0) && timeout--) {
		if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
			debug("PHY status read failed\n");
			return -1;
		}
		udelay(1000);
	}
	if ((reg & 0x8000) == 0) {
		return 0;
	} else {
		puts("PHY reset timed out\n");
		return -1;
	}
	return 0;
}
#endif /* !PHYLIB */

/*****************************************************************************
 *
 * Determine the ethernet speed (10/100/1000).  Return 10 on error.
 */
int miiphy_speed(const char *devname, unsigned char addr)
{
	u16 bmcr, anlpar, adv;

#if defined(CONFIG_PHY_GIGE)
	u16 btsr;

	/*
	 * Check for 1000BASE-X.  If it is supported, then assume that the speed
	 * is 1000.
	 */
	if (miiphy_is_1000base_x(devname, addr))
		return _1000BASET;

	/*
	 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
	 */
	/* Check for 1000BASE-T. */
	if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
		printf("PHY 1000BT status");
		goto miiphy_read_failed;
	}
	if (btsr != 0xFFFF &&
			(btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
		return _1000BASET;
#endif /* CONFIG_PHY_GIGE */

	/* Check Basic Management Control Register first. */
	if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
		printf("PHY speed");
		goto miiphy_read_failed;
	}
	/* Check if auto-negotiation is on. */
	if (bmcr & BMCR_ANENABLE) {
		/* Get auto-negotiation results. */
		if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
			printf("PHY AN speed");
			goto miiphy_read_failed;
		}

		if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
			puts("PHY AN adv speed");
			goto miiphy_read_failed;
		}
		return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET;
	}
	/* Get speed from basic control settings. */
	return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;

miiphy_read_failed:
	printf(" read failed, assuming 10BASE-T\n");
	return _10BASET;
}

/*****************************************************************************
 *
 * Determine full/half duplex.  Return half on error.
 */
int miiphy_duplex(const char *devname, unsigned char addr)
{
	u16 bmcr, anlpar, adv;

#if defined(CONFIG_PHY_GIGE)
	u16 btsr;

	/* Check for 1000BASE-X. */
	if (miiphy_is_1000base_x(devname, addr)) {
		/* 1000BASE-X */
		if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
			printf("1000BASE-X PHY AN duplex");
			goto miiphy_read_failed;
		}
	}
	/*
	 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
	 */
	/* Check for 1000BASE-T. */
	if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
		printf("PHY 1000BT status");
		goto miiphy_read_failed;
	}
	if (btsr != 0xFFFF) {
		if (btsr & PHY_1000BTSR_1000FD) {
			return FULL;
		} else if (btsr & PHY_1000BTSR_1000HD) {
			return HALF;
		}
	}
#endif /* CONFIG_PHY_GIGE */

	/* Check Basic Management Control Register first. */
	if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
		puts("PHY duplex");
		goto miiphy_read_failed;
	}
	/* Check if auto-negotiation is on. */
	if (bmcr & BMCR_ANENABLE) {
		/* Get auto-negotiation results. */
		if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
			puts("PHY AN duplex");
			goto miiphy_read_failed;
		}

		if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
			puts("PHY AN adv duplex");
			goto miiphy_read_failed;
		}
		return ((anlpar & adv) & (LPA_10FULL | LPA_100FULL)) ?
		    FULL : HALF;
	}
	/* Get speed from basic control settings. */
	return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;

miiphy_read_failed:
	printf(" read failed, assuming half duplex\n");
	return HALF;
}

/*****************************************************************************
 *
 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
 * 1000BASE-T, or on error.
 */
int miiphy_is_1000base_x(const char *devname, unsigned char addr)
{
#if defined(CONFIG_PHY_GIGE)
	u16 exsr;

	if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
		printf("PHY extended status read failed, assuming no "
			"1000BASE-X\n");
		return 0;
	}
	return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
#else
	return 0;
#endif
}

#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
/*****************************************************************************
 *
 * Determine link status
 */
int miiphy_link(const char *devname, unsigned char addr)
{
	unsigned short reg;

	/* dummy read; needed to latch some phys */
	(void)miiphy_read(devname, addr, MII_BMSR, &reg);
	if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
		puts("MII_BMSR read failed, assuming no link\n");
		return 0;
	}

	/* Determine if a link is active */
	if ((reg & BMSR_LSTATUS) != 0) {
		return 1;
	} else {
		return 0;
	}
}
#endif
Commit	Line	Data
c609719b WD	1	/*
	2	* (C) Copyright 2001
	3	* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
c609719b WD	6	*/
	7
	8	/*
	9	* This provides a bit-banged interface to the ethernet MII management
	10	* channel.
	11	*/
	12
	13	#include <common.h>
c74c8e66	14	#include <dm.h>
c609719b	15	#include <miiphy.h>
5f184715	16	#include <phy.h>
c609719b	17
63ff004c MB	18	#include <asm/types.h>
	19	#include <linux/list.h>
	20	#include <malloc.h>
	21	#include <net.h>
	22
	23	/* local debug macro */
63ff004c MB	24	#undef MII_DEBUG
	25
	26	#undef debug
	27	#ifdef MII_DEBUG
16a53238	28	#define debug(fmt, args...) printf(fmt, ##args)
63ff004c	29	#else
16a53238	30	#define debug(fmt, args...)
63ff004c MB	31	#endif /* MII_DEBUG */
63ff004c MB	32
63ff004c MB	33	static struct list_head mii_devs;
	34	static struct mii_dev *current_mii;
	35
0daac978 MF	36	/*
	37	* Lookup the mii_dev struct by the registered device name.
	38	*/
5f184715	39	struct mii_dev miiphy_get_dev_by_name(const char devname)
0daac978 MF	40	{
	41	struct list_head *entry;
	42	struct mii_dev *dev;
	43
	44	if (!devname) {
	45	printf("NULL device name!\n");
	46	return NULL;
	47	}
	48
	49	list_for_each(entry, &mii_devs) {
	50	dev = list_entry(entry, struct mii_dev, link);
	51	if (strcmp(dev->name, devname) == 0)
	52	return dev;
	53	}
	54
0daac978 MF	55	return NULL;
	56	}
	57
d9785c14 MB	58	/*****************************************************************************
	59	*
	60	* Initialize global data. Need to be called before any other miiphy routine.
	61	*/
5700bb63	62	void miiphy_init(void)
d9785c14	63	{
16a53238	64	INIT_LIST_HEAD(&mii_devs);
298035df	65	current_mii = NULL;
d9785c14 MB	66	}
d9785c14 MB	67
5f184715 AF	68	struct mii_dev *mdio_alloc(void)
	69	{
	70	struct mii_dev *bus;
	71
	72	bus = malloc(sizeof(*bus));
	73	if (!bus)
	74	return bus;
	75
	76	memset(bus, 0, sizeof(*bus));
	77
	78	/* initalize mii_dev struct fields */
	79	INIT_LIST_HEAD(&bus->link);
	80
	81	return bus;
	82	}
	83
cb6baca7 BM	84	void mdio_free(struct mii_dev *bus)
	85	{
	86	free(bus);
	87	}
	88
5f184715 AF	89	int mdio_register(struct mii_dev *bus)
5f184715 AF	90	{
d39449b1	91	if (!bus \|\| !bus->read \|\| !bus->write)
5f184715 AF	92	return -1;
	93
	94	/* check if we have unique name */
	95	if (miiphy_get_dev_by_name(bus->name)) {
	96	printf("mdio_register: non unique device name '%s'\n",
	97	bus->name);
	98	return -1;
	99	}
	100
	101	/* add it to the list */
	102	list_add_tail(&bus->link, &mii_devs);
	103
	104	if (!current_mii)
	105	current_mii = bus;
	106
	107	return 0;
	108	}
	109
cb6baca7 BM	110	int mdio_unregister(struct mii_dev *bus)
	111	{
	112	if (!bus)
	113	return 0;
	114
	115	/* delete it from the list */
	116	list_del(&bus->link);
	117
	118	if (current_mii == bus)
	119	current_mii = NULL;
	120
	121	return 0;
	122	}
	123
5f184715 AF	124	void mdio_list_devices(void)
	125	{
	126	struct list_head *entry;
	127
	128	list_for_each(entry, &mii_devs) {
	129	int i;
	130	struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
	131
	132	printf("%s:\n", bus->name);
	133
	134	for (i = 0; i < PHY_MAX_ADDR; i++) {
	135	struct phy_device *phydev = bus->phymap[i];
	136
	137	if (phydev) {
15a2acdf	138	printf("%x - %s", i, phydev->drv->name);
5f184715 AF	139
	140	if (phydev->dev)
	141	printf(" <--> %s\n", phydev->dev->name);
	142	else
	143	printf("\n");
	144	}
	145	}
	146	}
	147	}
	148
5700bb63	149	int miiphy_set_current_dev(const char *devname)
63ff004c	150	{
63ff004c MB	151	struct mii_dev *dev;
63ff004c MB	152
5f184715	153	dev = miiphy_get_dev_by_name(devname);
0daac978 MF	154	if (dev) {
	155	current_mii = dev;
	156	return 0;
63ff004c MB	157	}
63ff004c MB	158
5f184715 AF	159	printf("No such device: %s\n", devname);
5f184715 AF	160
63ff004c MB	161	return 1;
	162	}
	163
5f184715 AF	164	struct mii_dev *mdio_get_current_dev(void)
	165	{
	166	return current_mii;
	167	}
	168
	169	struct phy_device mdio_phydev_for_ethname(const char ethname)
	170	{
	171	struct list_head *entry;
	172	struct mii_dev *bus;
	173
	174	list_for_each(entry, &mii_devs) {
	175	int i;
	176	bus = list_entry(entry, struct mii_dev, link);
	177
	178	for (i = 0; i < PHY_MAX_ADDR; i++) {
	179	if (!bus->phymap[i] \|\| !bus->phymap[i]->dev)
	180	continue;
	181
	182	if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
	183	return bus->phymap[i];
	184	}
	185	}
	186
	187	printf("%s is not a known ethernet\n", ethname);
	188	return NULL;
	189	}
	190
5700bb63	191	const char *miiphy_get_current_dev(void)
63ff004c MB	192	{
	193	if (current_mii)
	194	return current_mii->name;
	195
	196	return NULL;
	197	}
	198
ede16ea3 MF	199	static struct mii_dev miiphy_get_active_dev(const char devname)
	200	{
	201	/* If the current mii is the one we want, return it */
	202	if (current_mii)
	203	if (strcmp(current_mii->name, devname) == 0)
	204	return current_mii;
	205
	206	/* Otherwise, set the active one to the one we want */
	207	if (miiphy_set_current_dev(devname))
	208	return NULL;
	209	else
	210	return current_mii;
	211	}
	212
63ff004c MB	213	/*****************************************************************************
	214	*
	215	* Read to variable <value> from the PHY attached to device <devname>,
	216	* use PHY address <addr> and register <reg>.
	217	*
1cdabc4b AF	218	* This API is deprecated. Use phy_read on a phy_device found via phy_connect
1cdabc4b AF	219	*
63ff004c MB	220	* Returns:
	221	* 0 on success
	222	*/
f915c931	223	int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
298035df	224	unsigned short *value)
63ff004c	225	{
5f184715	226	struct mii_dev *bus;
d67d5d52	227	int ret;
63ff004c	228
5f184715	229	bus = miiphy_get_active_dev(devname);
d67d5d52	230	if (!bus)
5f184715	231	return 1;
63ff004c	232
d67d5d52 AG	233	ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
	234	if (ret < 0)
	235	return 1;
	236
	237	*value = (unsigned short)ret;
	238	return 0;
63ff004c MB	239	}
	240
	241	/*****************************************************************************
	242	*
	243	* Write <value> to the PHY attached to device <devname>,
	244	* use PHY address <addr> and register <reg>.
	245	*
1cdabc4b AF	246	* This API is deprecated. Use phy_write on a phy_device found by phy_connect
1cdabc4b AF	247	*
63ff004c MB	248	* Returns:
	249	* 0 on success
	250	*/
f915c931	251	int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
298035df	252	unsigned short value)
63ff004c	253	{
5f184715	254	struct mii_dev *bus;
63ff004c	255
5f184715 AF	256	bus = miiphy_get_active_dev(devname);
	257	if (bus)
	258	return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
63ff004c	259
0daac978	260	return 1;
63ff004c MB	261	}
	262
	263	/*****************************************************************************
	264	*
	265	* Print out list of registered MII capable devices.
	266	*/
16a53238	267	void miiphy_listdev(void)
63ff004c MB	268	{
	269	struct list_head *entry;
	270	struct mii_dev *dev;
	271
16a53238 AF	272	puts("MII devices: ");
	273	list_for_each(entry, &mii_devs) {
	274	dev = list_entry(entry, struct mii_dev, link);
	275	printf("'%s' ", dev->name);
63ff004c	276	}
16a53238	277	puts("\n");
63ff004c MB	278
63ff004c MB	279	if (current_mii)
16a53238	280	printf("Current device: '%s'\n", current_mii->name);
63ff004c MB	281	}
63ff004c MB	282
c609719b WD	283	/*****************************************************************************
	284	*
	285	* Read the OUI, manufacture's model number, and revision number.
	286	*
	287	* OUI: 22 bits (unsigned int)
	288	* Model: 6 bits (unsigned char)
	289	* Revision: 4 bits (unsigned char)
	290	*
1cdabc4b AF	291	* This API is deprecated.
1cdabc4b AF	292	*
c609719b WD	293	* Returns:
	294	* 0 on success
	295	*/
5700bb63	296	int miiphy_info(const char devname, unsigned char addr, unsigned int oui,
c609719b WD	297	unsigned char model, unsigned char rev)
	298	{
	299	unsigned int reg = 0;
8bf3b005	300	unsigned short tmp;
c609719b	301
16a53238 AF	302	if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
	303	debug("PHY ID register 2 read failed\n");
	304	return -1;
c609719b	305	}
8bf3b005	306	reg = tmp;
c609719b	307
16a53238	308	debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
26c7bab8	309
c609719b WD	310	if (reg == 0xFFFF) {
c609719b WD	311	/* No physical device present at this address */
16a53238	312	return -1;
c609719b WD	313	}
c609719b WD	314
16a53238 AF	315	if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
	316	debug("PHY ID register 1 read failed\n");
	317	return -1;
c609719b	318	}
8bf3b005	319	reg \|= tmp << 16;
16a53238	320	debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
26c7bab8	321
298035df LJ	322	*oui = (reg >> 10);
	323	*model = (unsigned char)((reg >> 4) & 0x0000003F);
	324	*rev = (unsigned char)(reg & 0x0000000F);
16a53238	325	return 0;
c609719b WD	326	}
c609719b WD	327
5f184715	328	#ifndef CONFIG_PHYLIB
c609719b WD	329	/*****************************************************************************
	330	*
	331	* Reset the PHY.
1cdabc4b AF	332	*
	333	* This API is deprecated. Use PHYLIB.
	334	*
c609719b WD	335	* Returns:
	336	* 0 on success
	337	*/
5700bb63	338	int miiphy_reset(const char *devname, unsigned char addr)
c609719b WD	339	{
c609719b WD	340	unsigned short reg;
ab5a0dcb	341	int timeout = 500;
c609719b	342
16a53238 AF	343	if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
	344	debug("PHY status read failed\n");
	345	return -1;
f89920c3	346	}
16a53238 AF	347	if (miiphy_write(devname, addr, MII_BMCR, reg \| BMCR_RESET) != 0) {
	348	debug("PHY reset failed\n");
	349	return -1;
c609719b	350	}
5653fc33	351	#ifdef CONFIG_PHY_RESET_DELAY
16a53238	352	udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
5653fc33	353	#endif
c609719b WD	354	/*
	355	* Poll the control register for the reset bit to go to 0 (it is
	356	* auto-clearing). This should happen within 0.5 seconds per the
	357	* IEEE spec.
	358	*/
c609719b	359	reg = 0x8000;
ab5a0dcb	360	while (((reg & 0x8000) != 0) && timeout--) {
8ef583a0	361	if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
ab5a0dcb SR	362	debug("PHY status read failed\n");
ab5a0dcb SR	363	return -1;
c609719b	364	}
ab5a0dcb	365	udelay(1000);
c609719b WD	366	}
c609719b WD	367	if ((reg & 0x8000) == 0) {
16a53238	368	return 0;
c609719b	369	} else {
16a53238 AF	370	puts("PHY reset timed out\n");
16a53238 AF	371	return -1;
c609719b	372	}
16a53238	373	return 0;
c609719b	374	}
5f184715	375	#endif /* !PHYLIB */
c609719b	376
c609719b WD	377	/*****************************************************************************
c609719b WD	378	*
71bc6e64	379	* Determine the ethernet speed (10/100/1000). Return 10 on error.
c609719b	380	*/
5700bb63	381	int miiphy_speed(const char *devname, unsigned char addr)
c609719b	382	{
8c83c030	383	u16 bmcr, anlpar, adv;
c609719b	384
6fb6af6d	385	#if defined(CONFIG_PHY_GIGE)
71bc6e64 LJ	386	u16 btsr;
	387
	388	/*
	389	* Check for 1000BASE-X. If it is supported, then assume that the speed
	390	* is 1000.
	391	*/
16a53238	392	if (miiphy_is_1000base_x(devname, addr))
71bc6e64	393	return _1000BASET;
16a53238	394
71bc6e64 LJ	395	/*
	396	* No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
	397	*/
	398	/* Check for 1000BASE-T. */
16a53238 AF	399	if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
16a53238 AF	400	printf("PHY 1000BT status");
71bc6e64 LJ	401	goto miiphy_read_failed;
	402	}
	403	if (btsr != 0xFFFF &&
16a53238	404	(btsr & (PHY_1000BTSR_1000FD \| PHY_1000BTSR_1000HD)))
71bc6e64	405	return _1000BASET;
6fb6af6d	406	#endif /* CONFIG_PHY_GIGE */
855a496f	407
a56bd922	408	/* Check Basic Management Control Register first. */
16a53238 AF	409	if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
16a53238 AF	410	printf("PHY speed");
71bc6e64	411	goto miiphy_read_failed;
c609719b	412	}
a56bd922	413	/* Check if auto-negotiation is on. */
8ef583a0	414	if (bmcr & BMCR_ANENABLE) {
a56bd922	415	/* Get auto-negotiation results. */
16a53238 AF	416	if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
16a53238 AF	417	printf("PHY AN speed");
71bc6e64	418	goto miiphy_read_failed;
a56bd922	419	}
8c83c030 DL	420
	421	if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
	422	puts("PHY AN adv speed");
	423	goto miiphy_read_failed;
	424	}
	425	return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET;
a56bd922 WD	426	}
a56bd922 WD	427	/* Get speed from basic control settings. */
8ef583a0	428	return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
a56bd922	429
5f841959	430	miiphy_read_failed:
16a53238	431	printf(" read failed, assuming 10BASE-T\n");
71bc6e64	432	return _10BASET;
c609719b WD	433	}
c609719b WD	434
c609719b WD	435	/*****************************************************************************
c609719b WD	436	*
71bc6e64	437	* Determine full/half duplex. Return half on error.
c609719b	438	*/
5700bb63	439	int miiphy_duplex(const char *devname, unsigned char addr)
c609719b	440	{
8c83c030	441	u16 bmcr, anlpar, adv;
c609719b	442
6fb6af6d	443	#if defined(CONFIG_PHY_GIGE)
71bc6e64 LJ	444	u16 btsr;
	445
	446	/* Check for 1000BASE-X. */
16a53238	447	if (miiphy_is_1000base_x(devname, addr)) {
71bc6e64	448	/* 1000BASE-X */
16a53238 AF	449	if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
16a53238 AF	450	printf("1000BASE-X PHY AN duplex");
71bc6e64 LJ	451	goto miiphy_read_failed;
	452	}
	453	}
	454	/*
	455	* No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
	456	*/
	457	/* Check for 1000BASE-T. */
16a53238 AF	458	if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
16a53238 AF	459	printf("PHY 1000BT status");
71bc6e64 LJ	460	goto miiphy_read_failed;
	461	}
	462	if (btsr != 0xFFFF) {
	463	if (btsr & PHY_1000BTSR_1000FD) {
	464	return FULL;
	465	} else if (btsr & PHY_1000BTSR_1000HD) {
	466	return HALF;
855a496f WD	467	}
855a496f WD	468	}
6fb6af6d	469	#endif /* CONFIG_PHY_GIGE */
855a496f	470
a56bd922	471	/* Check Basic Management Control Register first. */
16a53238 AF	472	if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
16a53238 AF	473	puts("PHY duplex");
71bc6e64	474	goto miiphy_read_failed;
c609719b	475	}
a56bd922	476	/* Check if auto-negotiation is on. */
8ef583a0	477	if (bmcr & BMCR_ANENABLE) {
a56bd922	478	/* Get auto-negotiation results. */
16a53238 AF	479	if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
16a53238 AF	480	puts("PHY AN duplex");
71bc6e64	481	goto miiphy_read_failed;
a56bd922	482	}
8c83c030 DL	483
	484	if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
	485	puts("PHY AN adv duplex");
	486	goto miiphy_read_failed;
	487	}
	488	return ((anlpar & adv) & (LPA_10FULL \| LPA_100FULL)) ?
71bc6e64	489	FULL : HALF;
a56bd922 WD	490	}
a56bd922 WD	491	/* Get speed from basic control settings. */
8ef583a0	492	return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
71bc6e64	493
5f841959	494	miiphy_read_failed:
16a53238	495	printf(" read failed, assuming half duplex\n");
71bc6e64 LJ	496	return HALF;
71bc6e64 LJ	497	}
a56bd922	498
71bc6e64 LJ	499	/*****************************************************************************
	500	*
	501	* Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
	502	* 1000BASE-T, or on error.
	503	*/
5700bb63	504	int miiphy_is_1000base_x(const char *devname, unsigned char addr)
71bc6e64 LJ	505	{
	506	#if defined(CONFIG_PHY_GIGE)
	507	u16 exsr;
	508
16a53238 AF	509	if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
16a53238 AF	510	printf("PHY extended status read failed, assuming no "
71bc6e64 LJ	511	"1000BASE-X\n");
	512	return 0;
	513	}
8ef583a0	514	return 0 != (exsr & (ESTATUS_1000XF \| ESTATUS_1000XH));
71bc6e64 LJ	515	#else
	516	return 0;
	517	#endif
c609719b WD	518	}
c609719b WD	519
6d0f6bcf	520	#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
fc3e2165 WD	521	/*****************************************************************************
	522	*
	523	* Determine link status
	524	*/
5700bb63	525	int miiphy_link(const char *devname, unsigned char addr)
fc3e2165 WD	526	{
	527	unsigned short reg;
	528
a3d991bd	529	/* dummy read; needed to latch some phys */
16a53238 AF	530	(void)miiphy_read(devname, addr, MII_BMSR, &reg);
	531	if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
	532	puts("MII_BMSR read failed, assuming no link\n");
	533	return 0;
fc3e2165 WD	534	}
	535
	536	/* Determine if a link is active */
8ef583a0	537	if ((reg & BMSR_LSTATUS) != 0) {
16a53238	538	return 1;
fc3e2165	539	} else {
16a53238	540	return 0;
fc3e2165 WD	541	}
	542	}
	543	#endif