[people/ms/u-boot.git] / configs / A20-Olimex-SOM-EVB_defconfig

CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=480
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_MMC3_CD_PIN="PH0"
CONFIG_MMC3_PINS="PH"
CONFIG_MMC_SUNXI_SLOT_EXTRA=3
CONFIG_USB0_VBUS_PIN="PB9"
CONFIG_USB0_VBUS_DET="PH5"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPC(3)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_USB_EHCI_HCD=y
Commit	Line	Data
50222f3b MC	1	CONFIG_ARM=y
	2	CONFIG_ARCH_SUNXI=y
	3	CONFIG_MACH_SUN7I=y
	4	CONFIG_DRAM_CLK=480
	5	CONFIG_MMC0_CD_PIN="PH1"
2ec62022 KM	6	CONFIG_MMC3_CD_PIN="PH0"
	7	CONFIG_MMC3_PINS="PH"
	8	CONFIG_MMC_SUNXI_SLOT_EXTRA=3
50222f3b MC	9	CONFIG_USB0_VBUS_PIN="PB9"
	10	CONFIG_USB0_VBUS_DET="PH5"
	11	CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb"
	12	# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
	13	CONFIG_SPL=y
1df44814	14	CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPC(3)"
adad96e6	15	CONFIG_HUSH_PARSER=y
89cb2b5f	16	CONFIG_CMD_BOOTZ=y
50222f3b MC	17	# CONFIG_CMD_IMLS is not set
50222f3b MC	18	# CONFIG_CMD_FLASH is not set
89cb2b5f	19	CONFIG_CMD_MMC=y
78d1e1d0	20	CONFIG_CMD_I2C=y
50222f3b	21	# CONFIG_CMD_FPGA is not set
78d1e1d0	22	CONFIG_CMD_DHCP=y
89cb2b5f	23	CONFIG_CMD_MII=y
78d1e1d0	24	CONFIG_CMD_PING=y
89cb2b5f TR	25	CONFIG_CMD_EXT2=y
	26	CONFIG_CMD_EXT4=y
	27	CONFIG_CMD_FAT=y
	28	CONFIG_CMD_FS_GENERIC=y
7e4e7e46	29	CONFIG_RTL8211X_PHY_FORCE_MASTER=y
50222f3b MC	30	CONFIG_ETH_DESIGNWARE=y
50222f3b MC	31	CONFIG_USB_EHCI_HCD=y