projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| e2e947ff SG |
1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_ROCKCHIP=y | |
| 3 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | |
| 4 | CONFIG_ROCKCHIP_RK3288=y | |
| 8728c97e | 5 | # CONFIG_SPL_MMC_SUPPORT is not set |
| e2e947ff | 6 | CONFIG_TARGET_CHROMEBOOK_JERRY=y |
| e404ade4 | 7 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
| f35ed9ed | 8 | CONFIG_SPL_SPI_SUPPORT=y |
| e4aa8edb | 9 | CONFIG_SPL_STACK_R_ADDR=0x80000 |
| 5e9b1503 | 10 | CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry" |
| fb82fe38 | 11 | CONFIG_DEBUG_UART=y |
| 48f6232e | 12 | # CONFIG_ANDROID_BOOT_IMAGE is not set |
| 98af8799 | 13 | CONFIG_SILENT_CONSOLE=y |
| ef26d603 | 14 | # CONFIG_DISPLAY_CPUINFO is not set |
| fe974716 | 15 | CONFIG_BOARD_EARLY_INIT_F=y |
| e2e947ff | 16 | CONFIG_SPL_STACK_R=y |
| ec4ac4e7 | 17 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 |
| 48f6232e TR |
18 | CONFIG_FASTBOOT_FLASH=y |
| 19 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | |
| 88663126 | 20 | CONFIG_CMD_GPIO=y |
| b331cd62 | 21 | CONFIG_CMD_GPT=y |
| 88663126 | 22 | CONFIG_CMD_I2C=y |
| 89cb2b5f | 23 | CONFIG_CMD_MMC=y |
| 78d1e1d0 | 24 | CONFIG_CMD_SF=y |
| 719d36ee | 25 | CONFIG_CMD_SF_TEST=y |
| 88663126 | 26 | CONFIG_CMD_SPI=y |
| e2e947ff | 27 | # CONFIG_CMD_SETEXPR is not set |
| 89cb2b5f | 28 | CONFIG_CMD_CACHE=y |
| 78d1e1d0 | 29 | CONFIG_CMD_TIME=y |
| e2e947ff SG |
30 | CONFIG_CMD_PMIC=y |
| 31 | CONFIG_CMD_REGULATOR=y | |
| b0cf7339 | 32 | # CONFIG_SPL_DOS_PARTITION is not set |
| 1acc0087 | 33 | # CONFIG_SPL_ISO_PARTITION is not set |
| bd42a942 | 34 | # CONFIG_SPL_EFI_PARTITION is not set |
| b331cd62 | 35 | CONFIG_SPL_PARTITION_UUIDS=y |
| e2e947ff | 36 | CONFIG_SPL_OF_CONTROL=y |
| 57db8c6d | 37 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
| 18780951 | 38 | CONFIG_SPL_OF_PLATDATA=y |
| e2e947ff | 39 | CONFIG_REGMAP=y |
| 41c7f664 | 40 | CONFIG_SPL_REGMAP=y |
| e2e947ff | 41 | CONFIG_SYSCON=y |
| ec4ac4e7 | 42 | CONFIG_SPL_SYSCON=y |
| 7991809c | 43 | # CONFIG_SPL_SIMPLE_BUS is not set |
| 80df6913 BM |
44 | CONFIG_CLK=y |
| 45 | CONFIG_SPL_CLK=y | |
| 46 | CONFIG_ROCKCHIP_GPIO=y | |
| 27a1961d | 47 | CONFIG_I2C_CROS_EC_TUNNEL=y |
| 80df6913 | 48 | CONFIG_SYS_I2C_ROCKCHIP=y |
| 27a1961d | 49 | CONFIG_I2C_MUX=y |
| ef26d603 | 50 | CONFIG_DM_KEYBOARD=y |
| 27a1961d | 51 | CONFIG_CROS_EC_KEYB=y |
| 27a1961d SG |
52 | CONFIG_CROS_EC=y |
| 53 | CONFIG_CROS_EC_SPI=y | |
| 79d020ee | 54 | CONFIG_PWRSEQ=y |
| 55ed3b46 | 55 | CONFIG_MMC_DW=y |
| fed44087 | 56 | CONFIG_MMC_DW_ROCKCHIP=y |
| e2e947ff | 57 | CONFIG_PINCTRL=y |
| e2e947ff | 58 | CONFIG_SPL_PINCTRL=y |
| dd8e4290 | 59 | # CONFIG_SPL_PINCTRL_FULL is not set |
| 51c7f348 | 60 | CONFIG_PINCTRL_ROCKCHIP_RK3288=y |
| e2e947ff | 61 | CONFIG_DM_PMIC=y |
| 27a1961d | 62 | # CONFIG_SPL_PMIC_CHILDREN is not set |
| 453c5a92 | 63 | CONFIG_PMIC_RK8XX=y |
| 74336f7d | 64 | CONFIG_DM_REGULATOR_FIXED=y |
| 453c5a92 | 65 | CONFIG_REGULATOR_RK8XX=y |
| 74336f7d | 66 | CONFIG_PWM_ROCKCHIP=y |
| e2e947ff SG |
67 | CONFIG_RAM=y |
| 68 | CONFIG_SPL_RAM=y | |
| 80df6913 BM |
69 | CONFIG_DEBUG_UART_BASE=0xff690000 |
| 70 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
| 71 | CONFIG_DEBUG_UART_SHIFT=2 | |
| 9e39003e | 72 | CONFIG_SYS_NS16550=y |
| 57db8c6d | 73 | CONFIG_ROCKCHIP_SERIAL=y |
| ec4ac4e7 | 74 | CONFIG_ROCKCHIP_SPI=y |
| aca5cd27 | 75 | CONFIG_SYSRESET=y |
| ecad7051 TR |
76 | CONFIG_USB=y |
| 77 | CONFIG_USB_GADGET=y | |
| a95aee6a MR |
78 | CONFIG_USB_GADGET_MANUFACTURER="Rockchip" |
| 79 | CONFIG_USB_GADGET_VENDOR_NUM=0x2207 | |
| 80 | CONFIG_USB_GADGET_PRODUCT_NUM=0x320a | |
| ecad7051 | 81 | CONFIG_USB_GADGET_DWC2_OTG=y |
| 74336f7d | 82 | CONFIG_DM_VIDEO=y |
| 7588c312 | 83 | CONFIG_DISPLAY=y |
| 74336f7d | 84 | CONFIG_VIDEO_ROCKCHIP=y |
| b98f0a3d | 85 | CONFIG_DISPLAY_ROCKCHIP_EDP=y |
| 86 | CONFIG_DISPLAY_ROCKCHIP_HDMI=y | |
| dd8e4290 | 87 | CONFIG_USE_TINY_PRINTF=y |
| e2e947ff SG |
88 | CONFIG_CMD_DHRYSTONE=y |
| 89 | CONFIG_ERRNO_STR=y | |
| 57db8c6d | 90 | # CONFIG_SPL_OF_LIBFDT is not set |