]> git.ipfire.org Git - people/ms/u-boot.git/blame - configs/chromebook_minnie_defconfig
disk: convert CONFIG_DOS_PARTITION to Kconfig
[people/ms/u-boot.git] / configs / chromebook_minnie_defconfig
CommitLineData
c420ef67
SG
1CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
3CONFIG_SYS_MALLOC_F_LEN=0x2000
4# CONFIG_SPL_MMC_SUPPORT is not set
5CONFIG_ROCKCHIP_RK3288=y
6CONFIG_TARGET_CHROMEBOOK_MINNIE=y
7CONFIG_SPL_SPI_FLASH_SUPPORT=y
8CONFIG_SPL_SPI_SUPPORT=y
9CONFIG_SPL_STACK_R_ADDR=0x80000
10CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie"
11CONFIG_SILENT_CONSOLE=y
12# CONFIG_DISPLAY_CPUINFO is not set
13CONFIG_SPL_STACK_R=y
14CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
c420ef67
SG
15# CONFIG_CMD_IMLS is not set
16CONFIG_CMD_MMC=y
17CONFIG_CMD_SF=y
18CONFIG_CMD_SPI=y
19CONFIG_CMD_I2C=y
20CONFIG_CMD_GPIO=y
21# CONFIG_CMD_SETEXPR is not set
c420ef67
SG
22CONFIG_CMD_CACHE=y
23CONFIG_CMD_TIME=y
24CONFIG_CMD_PMIC=y
25CONFIG_CMD_REGULATOR=y
b0cf7339 26# CONFIG_SPL_DOS_PARTITION is not set
c420ef67
SG
27CONFIG_SPL_OF_CONTROL=y
28CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
18780951 29CONFIG_SPL_OF_PLATDATA=y
c420ef67
SG
30CONFIG_REGMAP=y
31CONFIG_SPL_REGMAP=y
32CONFIG_SYSCON=y
33CONFIG_SPL_SYSCON=y
34# CONFIG_SPL_SIMPLE_BUS is not set
35CONFIG_CLK=y
36CONFIG_SPL_CLK=y
37CONFIG_ROCKCHIP_GPIO=y
38CONFIG_I2C_CROS_EC_TUNNEL=y
39CONFIG_SYS_I2C_ROCKCHIP=y
40CONFIG_I2C_MUX=y
41CONFIG_DM_KEYBOARD=y
42CONFIG_CROS_EC_KEYB=y
43CONFIG_CROS_EC=y
44CONFIG_CROS_EC_SPI=y
45CONFIG_PWRSEQ=y
55ed3b46 46CONFIG_MMC_DW=y
fed44087 47CONFIG_MMC_DW_ROCKCHIP=y
c420ef67
SG
48CONFIG_PINCTRL=y
49CONFIG_SPL_PINCTRL=y
50# CONFIG_SPL_PINCTRL_FULL is not set
51CONFIG_ROCKCHIP_RK3288_PINCTRL=y
52CONFIG_DM_PMIC=y
53# CONFIG_SPL_PMIC_CHILDREN is not set
54CONFIG_PMIC_RK808=y
55CONFIG_DM_REGULATOR_FIXED=y
56CONFIG_REGULATOR_RK808=y
57CONFIG_PWM_ROCKCHIP=y
58CONFIG_RAM=y
59CONFIG_SPL_RAM=y
60CONFIG_DEBUG_UART=y
61CONFIG_DEBUG_UART_BASE=0xff690000
62CONFIG_DEBUG_UART_CLOCK=24000000
63CONFIG_DEBUG_UART_SHIFT=2
64CONFIG_SYS_NS16550=y
65CONFIG_ROCKCHIP_SERIAL=y
66CONFIG_ROCKCHIP_SPI=y
67CONFIG_SYSRESET=y
68CONFIG_DM_VIDEO=y
69CONFIG_DISPLAY=y
70CONFIG_VIDEO_ROCKCHIP=y
71CONFIG_CONSOLE_SCROLL_LINES=10
72CONFIG_USE_TINY_PRINTF=y
73CONFIG_CMD_DHRYSTONE=y
74CONFIG_ERRNO_STR=y
c420ef67 75# CONFIG_SPL_OF_LIBFDT is not set