]> git.ipfire.org Git - people/ms/u-boot.git/blame - configs/socfpga_sr1500_defconfig
Merge git://git.denx.de/u-boot-socfpga
[people/ms/u-boot.git] / configs / socfpga_sr1500_defconfig
CommitLineData
ae9996c8
SR
1CONFIG_ARM=y
2CONFIG_ARCH_SOCFPGA=y
9b1b6d42 3CONFIG_SYS_MALLOC_F_LEN=0x2000
ae9996c8 4CONFIG_TARGET_SOCFPGA_SR1500=y
4edb9458 5CONFIG_SPL_STACK_R_ADDR=0x00800000
ae9996c8 6CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
c2ae7d82 7CONFIG_FIT=y
ef26d603 8CONFIG_SYS_CONSOLE_IS_IN_ENV=y
84f2a5d0 9CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
3505bc55 10CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
f3f3efff 11CONFIG_SYS_CONSOLE_INFO_QUIET=y
2681e78a 12CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sr1500.dtb"
c2ae7d82 13CONFIG_VERSION_VARIABLE=y
84351792 14# CONFIG_DISPLAY_BOARDINFO is not set
a5d67547 15CONFIG_BOARD_EARLY_INIT_F=y
ae9996c8 16CONFIG_SPL=y
aca5cd27 17CONFIG_SPL_SYS_MALLOC_SIMPLE=y
ae9996c8 18CONFIG_SPL_STACK_R=y
adad96e6 19CONFIG_HUSH_PARSER=y
89cb2b5f 20CONFIG_CMD_BOOTZ=y
89cb2b5f
TR
21CONFIG_CMD_ASKENV=y
22CONFIG_CMD_GREPENV=y
78d1e1d0 23CONFIG_CMD_MEMTEST=y
ae9996c8 24# CONFIG_CMD_FLASH is not set
88663126
TR
25CONFIG_CMD_GPIO=y
26CONFIG_CMD_I2C=y
89cb2b5f 27CONFIG_CMD_MMC=y
78d1e1d0
TR
28CONFIG_CMD_SF=y
29CONFIG_CMD_SPI=y
78d1e1d0 30CONFIG_CMD_DHCP=y
89cb2b5f 31CONFIG_CMD_MII=y
78d1e1d0 32CONFIG_CMD_PING=y
89cb2b5f 33CONFIG_CMD_CACHE=y
78d1e1d0 34CONFIG_CMD_TIME=y
89cb2b5f
TR
35CONFIG_CMD_EXT4=y
36CONFIG_CMD_EXT4_WRITE=y
37CONFIG_CMD_FAT=y
38CONFIG_CMD_FS_GENERIC=y
43ede0bc
TR
39CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
40CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0"
8f2fe0c8 41CONFIG_CMD_UBI=y
5dc4dfd2 42CONFIG_ENV_IS_IN_SPI_FLASH=y
aca5cd27 43CONFIG_SPL_DM=y
4edb9458 44CONFIG_SPL_DM_SEQ_ALIAS=y
fa23ba1a 45CONFIG_FPGA_SOCFPGA=y
aca5cd27 46CONFIG_DM_GPIO=y
ae9996c8 47CONFIG_DWAPB_GPIO=y
4d5e9b39 48CONFIG_SYS_I2C_DW=y
4edb9458 49CONFIG_DM_MMC=y
55ed3b46 50CONFIG_MMC_DW=y
ae9996c8 51CONFIG_SPI_FLASH=y
adad96e6 52CONFIG_SPI_FLASH_BAR=y
93d9fc26 53CONFIG_SPI_FLASH_STMICRO=y
4edb9458 54# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
ae9996c8 55CONFIG_DM_ETH=y
1989374b 56CONFIG_PHY_GIGE=y
ae9996c8
SR
57CONFIG_ETH_DESIGNWARE=y
58CONFIG_SYS_NS16550=y
93d9fc26 59CONFIG_CADENCE_QSPI=y
bb597c0e 60CONFIG_USE_TINY_PRINTF=y