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OMAP3: Beagle: Add board revision detection
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1/*
2 * (C) Copyright 2008
3 * Texas Instruments, <www.ti.com>
4 *
5 * Author :
6 * Manikandan Pillai <mani.pillai@ti.com>
7 *
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29#include <asm/io.h>
30#include <asm/arch/mem.h> /* get mem tables */
31#include <asm/arch/sys_proto.h>
32#include <i2c.h>
33
34extern omap3_sysinfo sysinfo;
35static gpmc_csx_t *gpmc_cs_base = (gpmc_csx_t *)GPMC_CONFIG_CS0_BASE;
36static sdrc_t *sdrc_base = (sdrc_t *)OMAP34XX_SDRC_BASE;
37static ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE;
38
39/******************************************
40 * get_cpu_rev(void) - extract version info
41 ******************************************/
42u32 get_cpu_rev(void)
43{
44 u32 cpuid = 0;
45
46 /*
47 * On ES1.0 the IDCODE register is not exposed on L4
48 * so using CPU ID to differentiate
49 * between ES2.0 and ES1.0.
50 */
51 __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
52 if ((cpuid & 0xf) == 0x0)
53 return CPU_3430_ES1;
54 else
55 return CPU_3430_ES2;
56
57}
58
59/****************************************************
60 * is_mem_sdr() - return 1 if mem type in use is SDR
61 ****************************************************/
62u32 is_mem_sdr(void)
63{
64 if (readl(&sdrc_base->cs[CS0].mr) == SDP_SDRC_MR_0_SDR)
65 return 1;
66 return 0;
67}
68
69/***********************************************************************
70 * get_cs0_size() - get size of chip select 0/1
71 ************************************************************************/
72u32 get_sdr_cs_size(u32 cs)
73{
74 u32 size;
75
76 /* get ram size field */
77 size = readl(&sdrc_base->cs[cs].mcfg) >> 8;
78 size &= 0x3FF; /* remove unwanted bits */
79 size *= SZ_2M; /* find size in MB */
80 return size;
81}
82
83/***********************************************************************
84 * get_sdr_cs_offset() - get offset of cs from cs0 start
85 ************************************************************************/
86u32 get_sdr_cs_offset(u32 cs)
87{
88 u32 offset;
89
90 if (!cs)
91 return 0;
92
93 offset = readl(&sdrc_base->cs_cfg);
94 offset = (offset & 15) << 27 | (offset & 0x30) >> 17;
95
96 return offset;
97}
98
99/***********************************************************************
100 * get_board_type() - get board type based on current production stats.
101 * - NOTE-1-: 2 I2C EEPROMs will someday be populated with proper info.
102 * when they are available we can get info from there. This should
103 * be correct of all known boards up until today.
104 * - NOTE-2- EEPROMs are populated but they are updated very slowly. To
105 * avoid waiting on them we will use ES version of the chip to get info.
106 * A later version of the FPGA migth solve their speed issue.
107 ************************************************************************/
108u32 get_board_type(void)
109{
110 if (get_cpu_rev() == CPU_3430_ES2)
111 return sysinfo.board_type_v2;
112 else
113 return sysinfo.board_type_v1;
114}
115
116/***************************************************************************
117 * get_gpmc0_base() - Return current address hardware will be
118 * fetching from. The below effectively gives what is correct, its a bit
119 * mis-leading compared to the TRM. For the most general case the mask
120 * needs to be also taken into account this does work in practice.
121 * - for u-boot we currently map:
122 * -- 0 to nothing,
123 * -- 4 to flash
124 * -- 8 to enent
125 * -- c to wifi
126 ****************************************************************************/
127u32 get_gpmc0_base(void)
128{
129 u32 b;
130
131 b = readl(&gpmc_cs_base->config7);
132 b &= 0x1F; /* keep base [5:0] */
133 b = b << 24; /* ret 0x0b000000 */
134 return b;
135}
136
137/*******************************************************************
138 * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
139 *******************************************************************/
140u32 get_gpmc0_width(void)
141{
142 return WIDTH_16BIT;
143}
144
145/*************************************************************************
146 * get_board_rev() - setup to pass kernel board revision information
147 * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
148 *************************************************************************/
149u32 get_board_rev(void)
150{
151 return 0x20;
152}
153
154/*********************************************************************
155 * display_board_info() - print banner with board info.
156 *********************************************************************/
157void display_board_info(u32 btype)
158{
159 char *mem_s, *sec_s;
160
161 if (is_mem_sdr())
162 mem_s = "mSDR";
163 else
164 mem_s = "LPDDR";
165
166 switch (get_device_type()) {
167 case TST_DEVICE:
168 sec_s = "TST";
169 break;
170 case EMU_DEVICE:
171 sec_s = "EMU";
172 break;
173 case HS_DEVICE:
174 sec_s = "HS";
175 break;
176 case GP_DEVICE:
177 sec_s = "GP";
178 break;
179 default:
180 sec_s = "?";
181 }
182
183 printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", sysinfo.cpu_string,
184 sec_s, get_cpu_rev());
185 printf("%s + %s/%s\n", sysinfo.board_string,
186 mem_s, sysinfo.nand_string);
187
188}
189
190/********************************************************
191 * get_base(); get upper addr of current execution
192 *******************************************************/
193u32 get_base(void)
194{
195 u32 val;
196
197 __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
198 val &= 0xF0000000;
199 val >>= 28;
200 return val;
201}
202
203/********************************************************
204 * is_running_in_flash() - tell if currently running in
205 * FLASH.
206 *******************************************************/
207u32 is_running_in_flash(void)
208{
209 if (get_base() < 4)
210 return 1; /* in FLASH */
211
212 return 0; /* running in SRAM or SDRAM */
213}
214
215/********************************************************
216 * is_running_in_sram() - tell if currently running in
217 * SRAM.
218 *******************************************************/
219u32 is_running_in_sram(void)
220{
221 if (get_base() == 4)
222 return 1; /* in SRAM */
223
224 return 0; /* running in FLASH or SDRAM */
225}
226
227/********************************************************
228 * is_running_in_sdram() - tell if currently running in
229 * SDRAM.
230 *******************************************************/
231u32 is_running_in_sdram(void)
232{
233 if (get_base() > 4)
234 return 1; /* in SDRAM */
235
236 return 0; /* running in SRAM or FLASH */
237}
238
239/***************************************************************
240 * get_boot_type() - Is this an XIP type device or a stream one
241 * bits 4-0 specify type. Bit 5 says mem/perif
242 ***************************************************************/
243u32 get_boot_type(void)
244{
245 return (readl(&ctrl_base->status) & SYSBOOT_MASK);
246}
247
248/*************************************************************
249 * get_device_type(): tell if GP/HS/EMU/TST
250 *************************************************************/
251u32 get_device_type(void)
252{
253 return ((readl(&ctrl_base->status) & (DEVICE_MASK)) >> 8);
254}