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1 | /* |
2 | * This file is based on "arch/ppc/8260_io/commproc.c" - here is it's | |
3 | * copyright notice: | |
4 | * | |
5 | * General Purpose functions for the global management of the | |
6 | * 8260 Communication Processor Module. | |
7 | * Copyright (c) 1999 Dan Malek (dmalek@jlc.net) | |
8 | * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com) | |
9 | * 2.3.99 Updates | |
10 | * | |
11 | * In addition to the individual control of the communication | |
12 | * channels, there are a few functions that globally affect the | |
13 | * communication processor. | |
14 | * | |
15 | * Buffer descriptors must be allocated from the dual ported memory | |
16 | * space. The allocator for that is here. When the communication | |
17 | * process is reset, we reclaim the memory available. There is | |
18 | * currently no deallocator for this memory. | |
19 | */ | |
20 | #include <common.h> | |
21 | #include <asm/cpm_8260.h> | |
22 | ||
23 | /* | |
24 | * because we have stack and init data in dual port ram | |
25 | * we must reduce the size | |
26 | */ | |
27 | #undef CPM_DATAONLY_SIZE | |
28 | #define CPM_DATAONLY_SIZE ((uint)(8 * 1024) - CPM_DATAONLY_BASE) | |
29 | ||
30 | void | |
31 | m8260_cpm_reset(void) | |
32 | { | |
33 | DECLARE_GLOBAL_DATA_PTR; | |
34 | ||
35 | volatile immap_t *immr = (immap_t *)CFG_IMMR; | |
36 | volatile ulong count; | |
37 | ||
38 | /* Reclaim the DP memory for our use. | |
39 | */ | |
40 | gd->dp_alloc_base = CPM_DATAONLY_BASE; | |
41 | gd->dp_alloc_top = gd->dp_alloc_base + CPM_DATAONLY_SIZE; | |
42 | ||
43 | /* | |
44 | * Reset CPM | |
45 | */ | |
46 | immr->im_cpm.cp_cpcr = CPM_CR_RST; | |
47 | count = 0; | |
48 | do { /* Spin until command processed */ | |
49 | __asm__ __volatile__ ("eieio"); | |
50 | } while ((immr->im_cpm.cp_cpcr & CPM_CR_FLG) && ++count < 1000000); | |
51 | ||
52 | #ifdef CONFIG_HARD_I2C | |
53 | *((unsigned short*)(&immr->im_dprambase[PROFF_I2C_BASE])) = 0; | |
54 | #endif | |
55 | } | |
56 | ||
57 | /* Allocate some memory from the dual ported ram. | |
58 | * To help protocols with object alignment restrictions, we do that | |
59 | * if they ask. | |
60 | */ | |
61 | uint | |
62 | m8260_cpm_dpalloc(uint size, uint align) | |
63 | { | |
64 | DECLARE_GLOBAL_DATA_PTR; | |
65 | ||
66 | volatile immap_t *immr = (immap_t *)CFG_IMMR; | |
67 | uint retloc; | |
68 | uint align_mask, off; | |
69 | uint savebase; | |
70 | ||
71 | align_mask = align - 1; | |
72 | savebase = gd->dp_alloc_base; | |
73 | ||
74 | if ((off = (gd->dp_alloc_base & align_mask)) != 0) | |
75 | gd->dp_alloc_base += (align - off); | |
76 | ||
77 | if ((off = size & align_mask) != 0) | |
78 | size += align - off; | |
79 | ||
80 | if ((gd->dp_alloc_base + size) >= gd->dp_alloc_top) { | |
81 | gd->dp_alloc_base = savebase; | |
82 | panic("m8260_cpm_dpalloc: ran out of dual port ram!"); | |
83 | } | |
84 | ||
85 | retloc = gd->dp_alloc_base; | |
86 | gd->dp_alloc_base += size; | |
87 | ||
88 | memset((void *)&immr->im_dprambase[retloc], 0, size); | |
89 | ||
90 | return(retloc); | |
91 | } | |
92 | ||
93 | /* We also own one page of host buffer space for the allocation of | |
94 | * UART "fifos" and the like. | |
95 | */ | |
96 | uint | |
97 | m8260_cpm_hostalloc(uint size, uint align) | |
98 | { | |
99 | /* the host might not even have RAM yet - just use dual port RAM */ | |
100 | return (m8260_cpm_dpalloc(size, align)); | |
101 | } | |
102 | ||
103 | /* Set a baud rate generator. This needs lots of work. There are | |
104 | * eight BRGs, which can be connected to the CPM channels or output | |
105 | * as clocks. The BRGs are in two different block of internal | |
106 | * memory mapped space. | |
107 | * The baud rate clock is the system clock divided by something. | |
108 | * It was set up long ago during the initial boot phase and is | |
109 | * is given to us. | |
110 | * Baud rate clocks are zero-based in the driver code (as that maps | |
111 | * to port numbers). Documentation uses 1-based numbering. | |
112 | */ | |
113 | #define BRG_INT_CLK gd->brg_clk | |
8564acf9 | 114 | #define BRG_UART_CLK (BRG_INT_CLK / 16) |
121cb96d | 115 | |
8564acf9 | 116 | /* This function is used by UARTs, or anything else that uses a 16x |
121cb96d WD |
117 | * oversampled clock. |
118 | */ | |
119 | void | |
120 | m8260_cpm_setbrg(uint brg, uint rate) | |
121 | { | |
122 | DECLARE_GLOBAL_DATA_PTR; | |
123 | ||
124 | volatile immap_t *immr = (immap_t *)CFG_IMMR; | |
125 | volatile uint *bp; | |
8564acf9 | 126 | uint cd = BRG_UART_CLK / rate; |
121cb96d | 127 | |
8564acf9 WD |
128 | if ((BRG_UART_CLK % rate) < (rate / 2)) |
129 | cd--; | |
121cb96d WD |
130 | if (brg < 4) { |
131 | bp = (uint *)&immr->im_brgc1; | |
132 | } | |
133 | else { | |
134 | bp = (uint *)&immr->im_brgc5; | |
135 | brg -= 4; | |
136 | } | |
137 | bp += brg; | |
8564acf9 | 138 | *bp = (cd << 1) | CPM_BRG_EN; |
121cb96d WD |
139 | } |
140 | ||
141 | /* This function is used to set high speed synchronous baud rate | |
142 | * clocks. | |
143 | */ | |
144 | void | |
145 | m8260_cpm_fastbrg(uint brg, uint rate, int div16) | |
146 | { | |
147 | DECLARE_GLOBAL_DATA_PTR; | |
148 | ||
149 | volatile immap_t *immr = (immap_t *)CFG_IMMR; | |
150 | volatile uint *bp; | |
151 | ||
152 | /* This is good enough to get SMCs running..... | |
153 | */ | |
154 | if (brg < 4) { | |
155 | bp = (uint *)&immr->im_brgc1; | |
156 | } | |
157 | else { | |
158 | bp = (uint *)&immr->im_brgc5; | |
159 | brg -= 4; | |
160 | } | |
161 | bp += brg; | |
162 | *bp = (((((BRG_INT_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN; | |
163 | if (div16) | |
164 | *bp |= CPM_BRG_DIV16; | |
165 | } | |
166 | ||
167 | /* This function is used to set baud rate generators using an external | |
168 | * clock source and 16x oversampling. | |
169 | */ | |
170 | ||
171 | void | |
172 | m8260_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel) | |
173 | { | |
174 | volatile immap_t *immr = (immap_t *)CFG_IMMR; | |
175 | volatile uint *bp; | |
176 | ||
177 | if (brg < 4) { | |
178 | bp = (uint *)&immr->im_brgc1; | |
179 | } | |
180 | else { | |
181 | bp = (uint *)&immr->im_brgc5; | |
182 | brg -= 4; | |
183 | } | |
184 | bp += brg; | |
185 | *bp = ((((((extclk/16)+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN; | |
186 | if (pinsel == 0) | |
187 | *bp |= CPM_BRG_EXTC_CLK3_9; | |
188 | else | |
189 | *bp |= CPM_BRG_EXTC_CLK5_15; | |
190 | } | |
191 | ||
d1cbe85b | 192 | #if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) |
121cb96d WD |
193 | |
194 | void post_word_store (ulong a) | |
195 | { | |
196 | volatile ulong *save_addr = | |
197 | (volatile ulong *)(CFG_IMMR + CPM_POST_WORD_ADDR); | |
198 | ||
199 | *save_addr = a; | |
200 | } | |
201 | ||
202 | ulong post_word_load (void) | |
203 | { | |
204 | volatile ulong *save_addr = | |
205 | (volatile ulong *)(CFG_IMMR + CPM_POST_WORD_ADDR); | |
206 | ||
207 | return *save_addr; | |
208 | } | |
209 | ||
d1cbe85b | 210 | #endif /* CONFIG_POST || CONFIG_LOGBUFFER*/ |