]> git.ipfire.org Git - people/ms/u-boot.git/blame - cpu/pxa/interrupts.c
* Patch by Paul Ruhland, 17 May 2004:
[people/ms/u-boot.git] / cpu / pxa / interrupts.c
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1/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Alex Zuepke <azu@sysgo.de>
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#include <common.h>
30#include <asm/arch/pxa-regs.h>
31
32extern void reset_cpu (ulong addr);
33
34#ifdef CONFIG_USE_IRQ
35/* enable IRQ/FIQ interrupts */
36void enable_interrupts (void)
37{
38#error: interrupts not implemented yet
39}
40
41
42/*
43 * disable IRQ/FIQ interrupts
44 * returns true if interrupts had been enabled before we disabled them
45 */
46int disable_interrupts (void)
47{
48#error: interrupts not implemented yet
49}
50#else
51void enable_interrupts (void)
52{
53 return;
54}
55int disable_interrupts (void)
56{
57 return 0;
58}
59#endif
60
61
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62void bad_mode (void)
63{
64 panic ("Resetting CPU ...\n");
65 reset_cpu (0);
66}
67
68void show_regs (struct pt_regs *regs)
69{
70 unsigned long flags;
71 const char *processor_modes[] = {
72 "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
73 "UK4_26", "UK5_26", "UK6_26", "UK7_26",
74 "UK8_26", "UK9_26", "UK10_26", "UK11_26",
75 "UK12_26", "UK13_26", "UK14_26", "UK15_26",
76 "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
77 "UK4_32", "UK5_32", "UK6_32", "ABT_32",
78 "UK8_32", "UK9_32", "UK10_32", "UND_32",
79 "UK12_32", "UK13_32", "UK14_32", "SYS_32"
80 };
81
82 flags = condition_codes (regs);
83
84 printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
85 "sp : %08lx ip : %08lx fp : %08lx\n",
86 instruction_pointer (regs),
87 regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
88 printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
89 regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
90 printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
91 regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
92 printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
93 regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
94 printf ("Flags: %c%c%c%c",
95 flags & CC_N_BIT ? 'N' : 'n',
96 flags & CC_Z_BIT ? 'Z' : 'z',
97 flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
98 printf (" IRQs %s FIQs %s Mode %s%s\n",
99 interrupts_enabled (regs) ? "on" : "off",
100 fast_interrupts_enabled (regs) ? "on" : "off",
101 processor_modes[processor_mode (regs)],
102 thumb_mode (regs) ? " (T)" : "");
103}
104
105void do_undefined_instruction (struct pt_regs *pt_regs)
106{
107 printf ("undefined instruction\n");
108 show_regs (pt_regs);
109 bad_mode ();
110}
111
112void do_software_interrupt (struct pt_regs *pt_regs)
113{
114 printf ("software interrupt\n");
115 show_regs (pt_regs);
116 bad_mode ();
117}
118
119void do_prefetch_abort (struct pt_regs *pt_regs)
120{
121 printf ("prefetch abort\n");
122 show_regs (pt_regs);
123 bad_mode ();
124}
125
126void do_data_abort (struct pt_regs *pt_regs)
127{
128 printf ("data abort\n");
129 show_regs (pt_regs);
130 bad_mode ();
131}
132
133void do_not_used (struct pt_regs *pt_regs)
134{
135 printf ("not used\n");
136 show_regs (pt_regs);
137 bad_mode ();
138}
139
140void do_fiq (struct pt_regs *pt_regs)
141{
142 printf ("fast interrupt request\n");
143 show_regs (pt_regs);
144 bad_mode ();
145}
146
147void do_irq (struct pt_regs *pt_regs)
148{
149 printf ("interrupt request\n");
150 show_regs (pt_regs);
151 bad_mode ();
152}
153
154
155int interrupt_init (void)
156{
157 /* nothing happens here - we don't setup any IRQs */
158 return (0);
159}
160
161void reset_timer (void)
162{
163 reset_timer_masked ();
164}
165
166ulong get_timer (ulong base)
167{
f39748ae 168 return get_timer_masked () - base;
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169}
170
171void set_timer (ulong t)
172{
173 /* nop */
174}
175
176void udelay (unsigned long usec)
177{
178 udelay_masked (usec);
179}
180
181
182void reset_timer_masked (void)
183{
184 OSCR = 0;
185}
186
187ulong get_timer_masked (void)
188{
189 return OSCR;
190}
191
192void udelay_masked (unsigned long usec)
193{
194 ulong tmo;
195
196 tmo = usec / 1000;
197 tmo *= CFG_HZ;
198 tmo /= 1000;
199
200 reset_timer_masked ();
201
202 while (tmo >= get_timer_masked ())
203 /*NOP*/;
204}
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205
206/*
207 * This function is derived from PowerPC code (read timebase as long long).
208 * On ARM it just returns the timer value.
209 */
210unsigned long long get_ticks(void)
211{
212 return get_timer(0);
213}
214
215/*
216 * This function is derived from PowerPC code (timebase clock frequency).
217 * On ARM it returns the number of timer ticks per second.
218 */
219ulong get_tbclk (void)
220{
221 ulong tbclk;
222 tbclk = CFG_HZ;
223 return tbclk;
224}