NAND: Fix integer overflow in ONFI detection of chips >= 4GiB

[people/ms/u-boot.git] / doc / README.PXA_CF

These are brief instructions on how to add support for CF adapters to
custom designed  PXA boards. You need to set the parameters in the
config file. This should work for most implementations especially if you
follow the connections of the standard lubbock. Anyway just the block
marked memory configuration should be touched since the other parameters
are imposed by the PXA architecture.

EDIT 2010-07-01: in common/cmd_ide.c, having CONFIG_PXA_PCMCIA defined
would cause looping on inw()/outw() rather than using insw()/outsw(),
thus making sure IDE / ATA bytes are properly swapped. This behaviour
is now controlled by CONFIG_IDE_SWAP_IO, therefore PXA boards with
PCMCIA should #define CONFIG_IDE_SWAP_IO.

#define CONFIG_IDE_SWAP_IO

#define CONFIG_PXA_PCMCIA 1
#define CONFIG_PXA_IDE 1

#define CONFIG_PCMCIA_SLOT_A 1
/* just to keep build system happy  */

#define CONFIG_SYS_PCMCIA_MEM_ADDR     0x28000000
#define CONFIG_SYS_PCMCIA_MEM_SIZE     0x10000000

#define CONFIG_SYS_MECR_VAL		0x00000000
#define CONFIG_SYS_MCMEM0_VAL		0x00004204
#define CONFIG_SYS_MCMEM1_VAL		0x00000000
#define CONFIG_SYS_MCATT0_VAL		0x00010504
#define CONFIG_SYS_MCATT1_VAL		0x00000000
#define CONFIG_SYS_MCIO0_VAL		0x00008407
#define CONFIG_SYS_MCIO1_VAL		0x00000000
/* memory configuration */

#define CONFIG_SYS_IDE_MAXBUS		1
/* max. 1 IDE bus		*/
#define CONFIG_SYS_IDE_MAXDEVICE	1
/* max. 1 drive per IDE bus	*/

#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000

#define CONFIG_SYS_ATA_BASE_ADDR	0x20000000

/* Offset for data I/O			*/
#define CONFIG_SYS_ATA_DATA_OFFSET	0x1f0

/* Offset for normal register accesses	*/
#define CONFIG_SYS_ATA_REG_OFFSET	0x1f0

/* Offset for alternate registers	*/
#define CONFIG_SYS_ATA_ALT_OFFSET	0x3f0


Another important point is that maybe you have to power the pcmcia
subsystem. This is very board specific, for an example on how to
do it please search for CONFIG_EXADRON1 in cmd_pcmcia.c