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1
2Summary
3=======
4
5This README is about U-Boot support for TI's ARM Cortex-A8 based OMAP3 [1]
6family of SoCs. TI's OMAP3 SoC family contains an ARM Cortex-A8. Additionally,
7some family members contain a TMS320C64x+ DSP and/or an Imagination SGX 2D/3D
8graphics processor and various other standard peripherals.
9
10Currently the following boards are supported:
11
12* OMAP3530 BeagleBoard [2]
13
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14* Gumstix Overo [3]
15
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16* TI EVM [4]
17
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18* OpenPandora Ltd. Pandora [5]
19
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20* TI/Logic PD Zoom MDK [6]
21
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22* TI/Logic PD Zoom 2 [7]
23
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24* CompuLab Ltd. CM-T35 [8]
25
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26Toolchain
27=========
28
29While ARM Cortex-A8 support ARM v7 instruction set (-march=armv7a) we compile
30with -march=armv5 to allow more compilers to work. For U-Boot code this has
31no performance impact.
32
33Build
34=====
35
36* BeagleBoard:
37
38make omap3_beagle_config
39make
40
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41* Gumstix Overo:
42
43make omap3_overo_config
44make
45
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46* TI EVM:
47
48make omap3_evm_config
49make
50
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51* Pandora:
52
53make omap3_pandora_config
54make
55
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56* Zoom MDK:
57
58make omap3_zoom1_config
59make
60
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61* Zoom 2:
62
63make omap3_zoom2_config
64make
65
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66* CM-T35:
67
68make cm_t35_config
69make
70
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71* BlueLYNX-X:
72
73make omap3_mvblx_config
74make
75
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76Custom commands
77===============
78
79To make U-Boot for OMAP3 support NAND device SW or HW ECC calculation, U-Boot
80for OMAP3 supports custom user command
81
82nandecc hw/sw
83
84To be compatible with NAND drivers using SW ECC (e.g. kernel code)
85
86nandecc sw
87
88enables SW ECC calculation. HW ECC enabled with
89
90nandecc hw
91
92is typically used to write 2nd stage bootloader (known as 'x-loader') which is
93executed by OMAP3's boot rom and therefore has to be written with HW ECC.
94
95For all other commands see
96
97help
98
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99Interfaces
100==========
101
102gpio
4c4bb19d 103----
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104
105To set a bit :
106
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107 if (!gpio_request(N, "")) {
108 gpio_direction_output(N, 0);
109 gpio_set_value(N, 1);
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110 }
111
112To clear a bit :
113
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114 if (!gpio_request(N, "")) {
115 gpio_direction_output(N, 0);
116 gpio_set_value(N, 0);
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117 }
118
119To read a bit :
120
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121 if (!gpio_request(N, "")) {
122 gpio_direction_input(N);
123 val = gpio_get_value(N);
124 gpio_free(N);
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125 }
126 if (val)
127 printf("GPIO N is set\n");
128 else
129 printf("GPIO N is clear\n");
130
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131dma
132---
133void omap3_dma_init(void)
134 Init the DMA module
135int omap3_dma_get_conf_chan(uint32_t chan, struct dma4_chan *config);
136 Read config of the channel
137int omap3_dma_conf_chan(uint32_t chan, struct dma4_chan *config);
138 Write config to the channel
139int omap3_dma_conf_transfer(uint32_t chan, uint32_t *src, uint32_t *dst,
140 uint32_t sze)
141 Config source, destination and size of a transfer
142int omap3_dma_wait_for_transfer(uint32_t chan)
143 Wait for a transfer to end - this hast to be called before a channel
144 or the data the channel transferd are used.
145int omap3_dma_get_revision(uint32_t *minor, uint32_t *major)
146 Read silicon Revision of the DMA module
147
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148NAND
149====
150
151There are some OMAP3 devices out there with NAND attached. Due to the fact that
152OMAP3 ROM code can only handle 1-bit hamming ECC for accessing first page
153(place where SPL lives) we require this setup for u-boot at least when reading
154the second progam within SPL. A lot of newer NAND chips however require more
155than 1-bit ECC for the pages, some can live with 1-bit for the first page. To
156handle this we can switch to another ECC algorithm after reading the payload
157within SPL.
158
159BCH8
160----
161
162To enable hardware assisted BCH8 (8-bit BCH [Bose, Chaudhuri, Hocquenghem]) on
163OMAP3 devices we can use the BCH library in lib/bch.c. To do so add CONFIG_BCH
3f719069 164and set CONFIG_NAND_OMAP_ECCSCHEME=5 (refer README.nand) for selecting BCH8_SW.
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165The NAND OOB layout is the same as in linux kernel, if the linux kernel BCH8
166implementation for OMAP3 works for you so the u-boot version should also.
167When you require the SPL to read with BCH8 there are two more configs to
168change:
169
170 * CONFIG_SYS_NAND_ECCPOS (must be the same as .eccpos in
171 GPMC_NAND_HW_BCH8_ECC_LAYOUT defined in
172 arch/arm/include/asm/arch-omap3/omap_gpmc.h)
173 * CONFIG_SYS_NAND_ECCSIZE must be 512
174 * CONFIG_SYS_NAND_ECCBYTES must be 13 for this BCH8 setup
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176Acknowledgements
177================
178
36b4e2dd 179OMAP3 U-Boot is based on U-Boot tar ball [9] for BeagleBoard and EVM done by
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180several TI employees.
181
182Links
183=====
184
185[1] OMAP3:
186
187http://www.ti.com/omap3 (high volume) and
188http://www.ti.com/omap35x (broad market)
189
190[2] OMAP3530 BeagleBoard:
191
192http://beagleboard.org/
193
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194[3] Gumstix Overo:
195
196http://www.gumstix.net/Overo/
197
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198[4] TI EVM:
199
200http://focus.ti.com/docs/toolsw/folders/print/tmdxevm3503.html
201
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202[5] OpenPandora Ltd. Pandora:
203
204http://openpandora.org/
205
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206[6] TI/Logic PD Zoom MDK:
207
208http://www.logicpd.com/products/devkit/ti/zoom_mobile_development_kit
209
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210[7] TI/Logic PD Zoom 2
211
212http://www.logicpd.com/sites/default/files/1012659A_Zoom_OMAP34x-II_MDP_Brief.pdf
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213
214[8] CompuLab Ltd. CM-T35:
215
216http://www.compulab.co.il/t3530/html/t3530-cm-datasheet.htm
217
218[9] TI OMAP3 U-Boot:
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219
220http://beagleboard.googlecode.com/files/u-boot_beagle_revb.tar.gz