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1Overview
2--------
3P2020RDB is a Low End Dual core platform supporting the P2020 processor
4of QorIQ series. P2020 is an e500 based dual core SOC.
5
6Building U-boot
7-----------
8To build the u-boot for P2020RDB:
9 make P2020RDB_config
10 make
11
12NOR Flash Banks
13-----------
14RDB board for P2020 has two flash banks. They are both present on boot.
15
16Booting by default is always from the boot bank at 0xef00_0000.
17
18Memory Map
19----------
200xef00_0000 - 0xef7f_ffff Alernate bank 8MB
210xe800_0000 - 0xefff_ffff Boot bank 8MB
22
230xef78_0000 - 0xef7f_ffff Alternate u-boot address 512KB
240xeff8_0000 - 0xefff_ffff Boot u-boot address 512KB
25
26Switch settings to boot from the NOR flash banks
27------------------------------------------------
28SW4[8]=0 default NOR Flash bank
29SW4[8]=1 Alternate NOR Flash bank
30
31Flashing Images
32---------------
33To place a new u-boot image in the alternate flash bank and then boot
34with that new image temporarily, use this:
35 tftp 1000000 u-boot.bin
36 erase ef780000 ef7fffff
37 cp.b 1000000 ef780000 80000
38
39Now to boot from the alternate bank change the SW4[8] from 0 to 1.
40
41To program the image in the boot flash bank:
42 tftp 1000000 u-boot.bin
43 protect off all
44 erase eff80000 ffffffff
45 cp.b 1000000 eff80000 80000
46
47Using the Device Tree Source File
48---------------------------------
49To create the DTB (Device Tree Binary) image file,
50use a command similar to this:
51
52 dtc -b 0 -f -I dts -O dtb p2020rdb.dts > p2020rdb.dtb
53
54Likely, that .dts file will come from here;
55
56 linux-2.6/arch/powerpc/boot/dts/p2020rdb.dts
57
58Booting Linux
59-------------
60Place a linux uImage in the TFTP disk area.
61
62 tftp 1000000 uImage.p2020rdb
63 tftp 2000000 rootfs.ext2.gz.uboot
64 tftp c00000 p2020rdb.dtb
65 bootm 1000000 2000000 c00000
66
67Implementing AMP(Asymmetric MultiProcessing)
68---------------------------------------------
691. Build kernel image for core0:
70
71 a. $ make 85xx/p1_p2_rdb_defconfig
72
73 b. $ make menuconfig
74 - un-select "Processor support"->
75 "Symetric multi-processing support"
76
77 c. $ make uImage
78
79 d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core0
80
812. Build kernel image for core1:
82
83 a. $ make 85xx/p1_p2_rdb_defconfig
84
85 b. $ make menuconfig
86 - Un-select "Processor support"->
87 "Symetric multi-processing support"
88 - Select "Advanced setup" ->
89 "Prompt for advanced kernel configuration options"
90 - Select
91 "Set physical address where the kernel is loaded"
92 and set it to 0x20000000, asssuming core1 will
93 start from 512MB.
94 - Select "Set custom page offset address"
95 - Select "Set custom kernel base address"
96 - Select "Set maximum low memory"
97 - "Exit" and save the selection.
98
99 c. $ make uImage
100
101 d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core1
102
1033. Create dtb for core0:
104
105 $ dtc -I dts -O dtb -f -b 0
106 arch/powerpc/boot/dts/p2020rdb_camp_core0.dts >
107 /tftpboot/p2020rdb_camp_core0.dtb
108
1094. Create dtb for core1:
110
111 $ dtc -I dts -O dtb -f -b 1
112 arch/powerpc/boot/dts/p2020rdb_camp_core1.dts >
113 /tftpboot/p2020rdb_camp_core1.dtb
114
1155. Bring up two cores separately:
116
117 a. Power on the board, under u-boot prompt:
118 => setenv <serverip>
119 => setenv <ipaddr>
120 => setenv bootargs root=/dev/ram rw console=ttyS0,115200
121 b. Bring up core1's kernel first:
122 => setenv bootm_low 0x20000000
123 => setenv bootm_size 0x10000000
124 => tftp 21000000 uImage.core1
125 => tftp 22000000 ramdiskfile
126 => tftp 20c00000 p2020rdb_camp_core1.dtb
127 => interrupts off
128 => bootm start 21000000 22000000 20c00000
129 => bootm loados
130 => bootm ramdisk
131 => bootm fdt
132 => fdt boardsetup
133 => fdt chosen $initrd_start $initrd_end
134 => bootm prep
135 => cpu 1 release $bootm_low - $fdtaddr -
136 c. Bring up core0's kernel(on the same u-boot console):
137 => setenv bootm_low 0
138 => setenv bootm_size 0x20000000
139 => tftp 1000000 uImage.core0
140 => tftp 2000000 ramdiskfile
141 => tftp c00000 p2020rdb_camp_core0.dtb
142 => bootm 1000000 2000000 c00000
143
144Please note only core0 will run u-boot, core1 starts kernel directly
145after "cpu release" command is issued.