]> git.ipfire.org Git - people/ms/u-boot.git/blame - doc/README.rockchip
drivers/net/phy: add fixed-phy / fixed-link support
[people/ms/u-boot.git] / doc / README.rockchip
CommitLineData
adfb2bfe
SG
1#
2# Copyright (C) 2015 Google. Inc
3# Written by Simon Glass <sjg@chromium.org>
4#
5# SPDX-License-Identifier: GPL-2.0+
6#
7
8U-Boot on Rockchip
9==================
10
11There are several repositories available with versions of U-Boot that support
12many Rockchip devices [1] [2].
13
14The current mainline support is experimental only and is not useful for
15anything. It should provide a base on which to build.
16
f1387130 17So far only support for the RK3288 and RK3036 is provided.
adfb2bfe
SG
18
19
20Prerequisites
21=============
22
23You will need:
24
f1387130 25 - Firefly RK3288 board or something else with a supported RockChip SoC
adfb2bfe
SG
26 - Power connection to 5V using the supplied micro-USB power cable
27 - Separate USB serial cable attached to your computer and the Firefly
28 (connect to the micro-USB connector below the logo)
29 - rkflashtool [3]
30 - openssl (sudo apt-get install openssl)
31 - Serial UART connection [4]
32 - Suitable ARM cross compiler, e.g.:
33 sudo apt-get install gcc-4.7-arm-linux-gnueabi
34
35
36Building
37========
38
1c62d999 39At present seven RK3288 boards are supported:
adfb2bfe 40
744368d6 41 - EVB RK3288 - use evb-rk3288 configuration
d7ca67b7 42 - Fennec RK3288 - use fennec-rk3288 configuration
1c62d999
XZ
43 - Firefly RK3288 - use firefly-rk3288 configuration
44 - Hisense Chromebook - use chromebook_jerry configuration
6f279764 45 - Tinker RK3288 - use tinker-rk3288 configuration
dd63fbc7 46 - PopMetal RK3288 - use popmetal-rk3288 configuration
1c62d999 47 - Radxa Rock 2 - use rock2 configuration
adfb2bfe 48
f1387130 49Two RK3036 board are supported:
1d5a6968 50
f1387130
SG
51 - EVB RK3036 - use evb-rk3036 configuration
52 - Kylin - use kylin_rk3036 configuration
1d5a6968 53
adfb2bfe
SG
54For example:
55
56 CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
57
58(or you can use another cross compiler if you prefer)
59
adfb2bfe
SG
60
61Writing to the board with USB
62=============================
63
64For USB to work you must get your board into ROM boot mode, either by erasing
65your MMC or (perhaps) holding the recovery button when you boot the board.
66To erase your MMC, you can boot into Linux and type (as root)
67
68 dd if=/dev/zero of=/dev/mmcblk0 bs=1M
69
70Connect your board's OTG port to your computer.
71
72To create a suitable image and write it to the board:
73
717f8845 74 ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
f2acc55e 75 ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
adfb2bfe
SG
76 cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
77
78If all goes well you should something like:
79
80 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
81 Card did not respond to voltage select!
82 spl: mmc init failed with error: -17
83 ### ERROR ### Please RESET the board ###
84
85You will need to reset the board before each time you try. Yes, that's all
86it does so far. If support for the Rockchip USB protocol or DFU were added
87in SPL then we could in principle load U-Boot and boot to a prompt from USB
88as several other platforms do. However it does not seem to be possible to
89use the existing boot ROM code from SPL.
90
91
92Booting from an SD card
93=======================
94
95To write an image that boots from an SD card (assumed to be /dev/sdc):
96
717f8845 97 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
f2acc55e
SG
98 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
99 sudo dd if=out of=/dev/sdc seek=64 && \
adfb2bfe
SG
100 sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256
101
102This puts the Rockchip header and SPL image first and then places the U-Boot
103image at block 256 (i.e. 128KB from the start of the SD card). This
104corresponds with this setting in U-Boot:
105
106 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
107
108Put this SD (or micro-SD) card into your board and reset it. You should see
109something like:
110
f1387130 111 U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700)
adfb2bfe 112
f1387130 113 Model: Radxa Rock 2 Square
adfb2bfe 114 DRAM: 2 GiB
f1387130
SG
115 MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1
116 *** Warning - bad CRC, using default environment
117
118 In: serial
119 Out: vop@ff940000.vidconsole
120 Err: serial
121 Net: Net Initialization Skipped
122 No ethernet found.
123 Hit any key to stop autoboot: 0
adfb2bfe
SG
124 =>
125
b47ea792
XZ
126The rockchip bootrom can load and boot an initial spl, then continue to
127load a second-level bootloader(ie. U-BOOT) as soon as it returns to bootrom.
128Therefore RK3288 has another loading sequence like RK3036. The option of
129U-Boot is controlled with this setting in U-Boot:
130
131 #define CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
132
133You can create the image via the following operations:
134
135 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
136 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
137 cat firefly-rk3288/u-boot-dtb.bin >> out && \
138 sudo dd if=out of=/dev/sdc seek=64
139
f1387130
SG
140If you have an HDMI cable attached you should see a video console.
141
1d5a6968 142For evb_rk3036 board:
717f8845 143 ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
1d5a6968 144 cat evb-rk3036/u-boot-dtb.bin >> out && \
145 sudo dd if=out of=/dev/sdc seek=64
146
147Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
148 debug uart must be disabled
adfb2bfe 149
a16e2e06
XZ
150Using fastboot on rk3288
151========================
a16e2e06
XZ
152- Write GPT partition layout to mmc device which fastboot want to use it to
153store the image
154
155 => gpt write mmc 1 $partitions
156
157- Invoke fastboot command to prepare
158
159 => fastboot 1
160
161- Start fastboot request on PC
162
163 fastboot -i 0x2207 flash loader evb-rk3288/spl/u-boot-spl-dtb.bin
164
165You should see something like:
166
167 => fastboot 1
168 WARNING: unknown variable: partition-type:loader
169 Starting download of 357796 bytes
170 ..
171 downloading of 357796 bytes finished
172 Flashing Raw Image
173 ........ wrote 357888 bytes to 'loader'
174
adfb2bfe
SG
175Booting from SPI
176================
177
178To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
179
dd8e4290
SG
180 ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
181 -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
182 dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
183 cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
adfb2bfe
SG
184 dd if=out.bin of=out.bin.pad bs=4M conv=sync
185
186This converts the SPL image to the required SPI format by adding the Rockchip
187header and skipping every 2KB block. Then the U-Boot image is written at
188offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
189The position of U-Boot is controlled with this setting in U-Boot:
190
191 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
192
193If you have a Dediprog em100pro connected then you can write the image with:
194
195 sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
196
197When booting you should see something like:
198
199 U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
200
201
202 U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
203
204 Model: Google Jerry
205 DRAM: 2 GiB
206 MMC:
207 Using default environment
208
209 In: serial@ff690000
210 Out: serial@ff690000
211 Err: serial@ff690000
212 =>
213
adfb2bfe
SG
214Future work
215===========
216
217Immediate priorities are:
218
adfb2bfe
SG
219- USB host
220- USB device
f1387130 221- Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
adfb2bfe
SG
222- NAND flash
223- Support for other Rockchip parts
224- Boot U-Boot proper over USB OTG (at present only SPL works)
225
226
227Development Notes
228=================
229
230There are plenty of patches in the links below to help with this work.
231
232[1] https://github.com/rkchrome/uboot.git
233[2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
234[3] https://github.com/linux-rockchip/rkflashtool.git
235[4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
236
237rkimage
238-------
239
240rkimage.c produces an SPL image suitable for sending directly to the boot ROM
241over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
242followed by u-boot-spl-dtb.bin.
243
244The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
245starts at 0xff700000 and extends to 0xff718000 where we put the stack.
246
247rksd
248----
249
250rksd.c produces an image consisting of 32KB of empty space, a header and
251u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
252most of the fields are unused by U-Boot. We just need to specify the
253signature, a flag and the block offset and size of the SPL image.
254
255The header occupies a single block but we pad it out to 4 blocks. The header
256is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
257image can be encoded too but we don't do that.
258
259The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
260or 0x40 blocks. This is a severe and annoying limitation. There may be a way
261around this limitation, since there is plenty of SRAM, but at present the
262board refuses to boot if this limit is exceeded.
263
264The image produced is padded up to a block boundary (512 bytes). It should be
265written to the start of an SD card using dd.
266
267Since this image is set to load U-Boot from the SD card at block offset,
268CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
269u-boot-dtb.img to the SD card at that offset. See above for instructions.
270
271rkspi
272-----
273
274rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
275resulting image is then spread out so that only the first 2KB of each 4KB
276sector is used. The header is the same as with rksd and the maximum size is
277also 32KB (before spreading). The image should be written to the start of
278SPI flash.
279
280See above for instructions on how to write a SPI image.
281
002c634c
SG
282rkmux.py
283--------
284
285You can use this script to create #defines for SoC register access. See the
286script for usage.
287
adfb2bfe
SG
288
289Device tree and driver model
290----------------------------
291
292Where possible driver model is used to provide a structure to the
293functionality. Device tree is used for configuration. However these have an
294overhead and in SPL with a 32KB size limit some shortcuts have been taken.
295In general all Rockchip drivers should use these features, with SPL-specific
296modifications where required.
297
3f3e1e33
JC
298GPT partition layout
299----------------------------
300
301Rockchip use a unified GPT partition layout in open source support.
302With this GPT partition layout, uboot can be compatilbe with other components,
303like miniloader, trusted-os, arm-trust-firmware.
304
305There are some documents about partitions in the links below.
306http://rockchip.wikidot.com/partitions
adfb2bfe
SG
307
308--
309Simon Glass <sjg@chromium.org>
31024 June 2015