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rockchip: add support for rk3288 PopMetal board
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1#
2# Copyright (C) 2015 Google. Inc
3# Written by Simon Glass <sjg@chromium.org>
4#
5# SPDX-License-Identifier: GPL-2.0+
6#
7
8U-Boot on Rockchip
9==================
10
11There are several repositories available with versions of U-Boot that support
12many Rockchip devices [1] [2].
13
14The current mainline support is experimental only and is not useful for
15anything. It should provide a base on which to build.
16
f1387130 17So far only support for the RK3288 and RK3036 is provided.
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18
19
20Prerequisites
21=============
22
23You will need:
24
f1387130 25 - Firefly RK3288 board or something else with a supported RockChip SoC
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26 - Power connection to 5V using the supplied micro-USB power cable
27 - Separate USB serial cable attached to your computer and the Firefly
28 (connect to the micro-USB connector below the logo)
29 - rkflashtool [3]
30 - openssl (sudo apt-get install openssl)
31 - Serial UART connection [4]
32 - Suitable ARM cross compiler, e.g.:
33 sudo apt-get install gcc-4.7-arm-linux-gnueabi
34
35
36Building
37========
38
dd63fbc7 39At present six RK3288 boards are supported:
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40
41 - Firefly RK3288 - use firefly-rk3288 configuration
7c1058fa 42 - Radxa Rock 2 - use rock2 configuration
f1387130 43 - Hisense Chromebook - use chromebook_jerry configuration
744368d6 44 - EVB RK3288 - use evb-rk3288 configuration
d7ca67b7 45 - Fennec RK3288 - use fennec-rk3288 configuration
dd63fbc7 46 - PopMetal RK3288 - use popmetal-rk3288 configuration
adfb2bfe 47
f1387130 48Two RK3036 board are supported:
1d5a6968 49
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50 - EVB RK3036 - use evb-rk3036 configuration
51 - Kylin - use kylin_rk3036 configuration
1d5a6968 52
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53For example:
54
55 CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
56
57(or you can use another cross compiler if you prefer)
58
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59
60Writing to the board with USB
61=============================
62
63For USB to work you must get your board into ROM boot mode, either by erasing
64your MMC or (perhaps) holding the recovery button when you boot the board.
65To erase your MMC, you can boot into Linux and type (as root)
66
67 dd if=/dev/zero of=/dev/mmcblk0 bs=1M
68
69Connect your board's OTG port to your computer.
70
71To create a suitable image and write it to the board:
72
717f8845 73 ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
f2acc55e 74 ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
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75 cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
76
77If all goes well you should something like:
78
79 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
80 Card did not respond to voltage select!
81 spl: mmc init failed with error: -17
82 ### ERROR ### Please RESET the board ###
83
84You will need to reset the board before each time you try. Yes, that's all
85it does so far. If support for the Rockchip USB protocol or DFU were added
86in SPL then we could in principle load U-Boot and boot to a prompt from USB
87as several other platforms do. However it does not seem to be possible to
88use the existing boot ROM code from SPL.
89
90
91Booting from an SD card
92=======================
93
94To write an image that boots from an SD card (assumed to be /dev/sdc):
95
717f8845 96 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
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97 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
98 sudo dd if=out of=/dev/sdc seek=64 && \
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99 sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256
100
101This puts the Rockchip header and SPL image first and then places the U-Boot
102image at block 256 (i.e. 128KB from the start of the SD card). This
103corresponds with this setting in U-Boot:
104
105 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
106
107Put this SD (or micro-SD) card into your board and reset it. You should see
108something like:
109
f1387130 110 U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700)
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f1387130 112 Model: Radxa Rock 2 Square
adfb2bfe 113 DRAM: 2 GiB
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114 MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1
115 *** Warning - bad CRC, using default environment
116
117 In: serial
118 Out: vop@ff940000.vidconsole
119 Err: serial
120 Net: Net Initialization Skipped
121 No ethernet found.
122 Hit any key to stop autoboot: 0
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123 =>
124
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125The rockchip bootrom can load and boot an initial spl, then continue to
126load a second-level bootloader(ie. U-BOOT) as soon as it returns to bootrom.
127Therefore RK3288 has another loading sequence like RK3036. The option of
128U-Boot is controlled with this setting in U-Boot:
129
130 #define CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
131
132You can create the image via the following operations:
133
134 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
135 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
136 cat firefly-rk3288/u-boot-dtb.bin >> out && \
137 sudo dd if=out of=/dev/sdc seek=64
138
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139If you have an HDMI cable attached you should see a video console.
140
1d5a6968 141For evb_rk3036 board:
717f8845 142 ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
1d5a6968 143 cat evb-rk3036/u-boot-dtb.bin >> out && \
144 sudo dd if=out of=/dev/sdc seek=64
145
146Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
147 debug uart must be disabled
adfb2bfe 148
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149Using fastboot on rk3288
150========================
151- Define GPT partition layout like kylin_rk3036(see include/configs/kylin_rk3036.h)
152- Write GPT partition layout to mmc device which fastboot want to use it to
153store the image
154
155 => gpt write mmc 1 $partitions
156
157- Invoke fastboot command to prepare
158
159 => fastboot 1
160
161- Start fastboot request on PC
162
163 fastboot -i 0x2207 flash loader evb-rk3288/spl/u-boot-spl-dtb.bin
164
165You should see something like:
166
167 => fastboot 1
168 WARNING: unknown variable: partition-type:loader
169 Starting download of 357796 bytes
170 ..
171 downloading of 357796 bytes finished
172 Flashing Raw Image
173 ........ wrote 357888 bytes to 'loader'
174
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175Booting from SPI
176================
177
178To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
179
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180 ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
181 -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
182 dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
183 cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
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184 dd if=out.bin of=out.bin.pad bs=4M conv=sync
185
186This converts the SPL image to the required SPI format by adding the Rockchip
187header and skipping every 2KB block. Then the U-Boot image is written at
188offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
189The position of U-Boot is controlled with this setting in U-Boot:
190
191 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
192
193If you have a Dediprog em100pro connected then you can write the image with:
194
195 sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
196
197When booting you should see something like:
198
199 U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
200
201
202 U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
203
204 Model: Google Jerry
205 DRAM: 2 GiB
206 MMC:
207 Using default environment
208
209 In: serial@ff690000
210 Out: serial@ff690000
211 Err: serial@ff690000
212 =>
213
214
215Future work
216===========
217
218Immediate priorities are:
219
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220- USB host
221- USB device
f1387130 222- Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
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223- Ethernet
224- NAND flash
225- Support for other Rockchip parts
226- Boot U-Boot proper over USB OTG (at present only SPL works)
227
228
229Development Notes
230=================
231
232There are plenty of patches in the links below to help with this work.
233
234[1] https://github.com/rkchrome/uboot.git
235[2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
236[3] https://github.com/linux-rockchip/rkflashtool.git
237[4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
238
239rkimage
240-------
241
242rkimage.c produces an SPL image suitable for sending directly to the boot ROM
243over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
244followed by u-boot-spl-dtb.bin.
245
246The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
247starts at 0xff700000 and extends to 0xff718000 where we put the stack.
248
249rksd
250----
251
252rksd.c produces an image consisting of 32KB of empty space, a header and
253u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
254most of the fields are unused by U-Boot. We just need to specify the
255signature, a flag and the block offset and size of the SPL image.
256
257The header occupies a single block but we pad it out to 4 blocks. The header
258is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
259image can be encoded too but we don't do that.
260
261The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
262or 0x40 blocks. This is a severe and annoying limitation. There may be a way
263around this limitation, since there is plenty of SRAM, but at present the
264board refuses to boot if this limit is exceeded.
265
266The image produced is padded up to a block boundary (512 bytes). It should be
267written to the start of an SD card using dd.
268
269Since this image is set to load U-Boot from the SD card at block offset,
270CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
271u-boot-dtb.img to the SD card at that offset. See above for instructions.
272
273rkspi
274-----
275
276rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
277resulting image is then spread out so that only the first 2KB of each 4KB
278sector is used. The header is the same as with rksd and the maximum size is
279also 32KB (before spreading). The image should be written to the start of
280SPI flash.
281
282See above for instructions on how to write a SPI image.
283
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284rkmux.py
285--------
286
287You can use this script to create #defines for SoC register access. See the
288script for usage.
289
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290
291Device tree and driver model
292----------------------------
293
294Where possible driver model is used to provide a structure to the
295functionality. Device tree is used for configuration. However these have an
296overhead and in SPL with a 32KB size limit some shortcuts have been taken.
297In general all Rockchip drivers should use these features, with SPL-specific
298modifications where required.
299
300
301--
302Simon Glass <sjg@chromium.org>
30324 June 2015