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5dad97ed BM |
1 | # |
2 | # Copyright (C) 2014, Simon Glass <sjg@chromium.org> | |
3 | # Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> | |
4 | # | |
5 | # SPDX-License-Identifier: GPL-2.0+ | |
6 | # | |
7 | ||
8 | U-Boot on x86 | |
9 | ============= | |
10 | ||
11 | This document describes the information about U-Boot running on x86 targets, | |
12 | including supported boards, build instructions, todo list, etc. | |
13 | ||
14 | Status | |
15 | ------ | |
16 | U-Boot supports running as a coreboot [1] payload on x86. So far only Link | |
1ae5b78c BM |
17 | (Chromebook Pixel) and QEMU [2] x86 targets have been tested, but it should |
18 | work with minimal adjustments on other x86 boards since coreboot deals with | |
19 | most of the low-level details. | |
5dad97ed | 20 | |
28a85365 SI |
21 | U-Boot also supports booting directly from x86 reset vector, without coreboot. |
22 | In this case, known as bare mode, from the fact that it runs on the | |
23 | 'bare metal', U-Boot acts like a BIOS replacement. Currently Link, QEMU x86 | |
24 | targets and all Intel boards support running U-Boot 'bare metal'. | |
5dad97ed | 25 | |
3a1a18ff SG |
26 | As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit |
27 | Linux kernel as part of a FIT image. It also supports a compressed zImage. | |
3619e94a BM |
28 | U-Boot supports loading an x86 VxWorks kernel. Please check README.vxworks |
29 | for more details. | |
5dad97ed | 30 | |
28a85365 SI |
31 | Build Instructions for U-Boot as coreboot payload |
32 | ------------------------------------------------- | |
5dad97ed BM |
33 | Building U-Boot as a coreboot payload is just like building U-Boot for targets |
34 | on other architectures, like below: | |
35 | ||
36 | $ make coreboot-x86_defconfig | |
37 | $ make all | |
38 | ||
1ae5b78c | 39 | Note this default configuration will build a U-Boot payload for the QEMU board. |
617b867f BM |
40 | To build a coreboot payload against another board, you can change the build |
41 | configuration during the 'make menuconfig' process. | |
42 | ||
43 | x86 architecture ---> | |
44 | ... | |
1ae5b78c | 45 | (qemu-x86) Board configuration file |
683b09d7 | 46 | (qemu-x86_i440fx) Board Device Tree Source (dts) file |
1ae5b78c | 47 | (0x01920000) Board specific Cache-As-RAM (CAR) address |
617b867f BM |
48 | (0x4000) Board specific Cache-As-RAM (CAR) size |
49 | ||
50 | Change the 'Board configuration file' and 'Board Device Tree Source (dts) file' | |
51 | to point to a new board. You can also change the Cache-As-RAM (CAR) related | |
52 | settings here if the default values do not fit your new board. | |
53 | ||
28a85365 SI |
54 | Build Instructions for U-Boot as BIOS replacement (bare mode) |
55 | ------------------------------------------------------------- | |
3a1a18ff | 56 | Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a |
5dad97ed BM |
57 | little bit tricky, as generally it requires several binary blobs which are not |
58 | shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is | |
59 | not turned on by default in the U-Boot source tree. Firstly, you need turn it | |
eea0f112 | 60 | on by enabling the ROM build: |
5dad97ed | 61 | |
eea0f112 SG |
62 | $ export BUILD_ROM=y |
63 | ||
64 | This tells the Makefile to build u-boot.rom as a target. | |
5dad97ed | 65 | |
28a85365 SI |
66 | --- |
67 | ||
68 | Chromebook Link specific instructions for bare mode: | |
5dad97ed BM |
69 | |
70 | First, you need the following binary blobs: | |
71 | ||
72 | * descriptor.bin - Intel flash descriptor | |
73 | * me.bin - Intel Management Engine | |
74 | * mrc.bin - Memory Reference Code, which sets up SDRAM | |
75 | * video ROM - sets up the display | |
76 | ||
77 | You can get these binary blobs by: | |
78 | ||
79 | $ git clone http://review.coreboot.org/p/blobs.git | |
80 | $ cd blobs | |
81 | ||
82 | Find the following files: | |
83 | ||
84 | * ./mainboard/google/link/descriptor.bin | |
85 | * ./mainboard/google/link/me.bin | |
8712af97 | 86 | * ./northbridge/intel/sandybridge/systemagent-r6.bin |
5dad97ed BM |
87 | |
88 | The 3rd one should be renamed to mrc.bin. | |
786a08e0 | 89 | As for the video ROM, you can get it here [3] and rename it to vga.bin. |
5dad97ed BM |
90 | Make sure all these binary blobs are put in the board directory. |
91 | ||
92 | Now you can build U-Boot and obtain u-boot.rom: | |
93 | ||
94 | $ make chromebook_link_defconfig | |
95 | $ make all | |
96 | ||
28a85365 SI |
97 | --- |
98 | ||
99 | Intel Crown Bay specific instructions for bare mode: | |
5dad97ed | 100 | |
1ae5b78c BM |
101 | U-Boot support of Intel Crown Bay board [4] relies on a binary blob called |
102 | Firmware Support Package [5] to perform all the necessary initialization steps | |
5dad97ed BM |
103 | as documented in the BIOS Writer Guide, including initialization of the CPU, |
104 | memory controller, chipset and certain bus interfaces. | |
105 | ||
106 | Download the Intel FSP for Atom E6xx series and Platform Controller Hub EG20T, | |
107 | install it on your host and locate the FSP binary blob. Note this platform | |
108 | also requires a Chipset Micro Code (CMC) state machine binary to be present in | |
109 | the SPI flash where u-boot.rom resides, and this CMC binary blob can be found | |
110 | in this FSP package too. | |
111 | ||
112 | * ./FSP/QUEENSBAY_FSP_GOLD_001_20-DECEMBER-2013.fd | |
113 | * ./Microcode/C0_22211.BIN | |
114 | ||
115 | Rename the first one to fsp.bin and second one to cmc.bin and put them in the | |
116 | board directory. | |
117 | ||
83d9712e BM |
118 | Note the FSP release version 001 has a bug which could cause random endless |
119 | loop during the FspInit call. This bug was published by Intel although Intel | |
120 | did not describe any details. We need manually apply the patch to the FSP | |
121 | binary using any hex editor (eg: bvi). Go to the offset 0x1fcd8 of the FSP | |
122 | binary, change the following five bytes values from orginally E8 42 FF FF FF | |
123 | to B8 00 80 0B 00. | |
124 | ||
7aaff9bf BM |
125 | As for the video ROM, you need manually extract it from the Intel provided |
126 | BIOS for Crown Bay here [6], using the AMI MMTool [7]. Check PCI option ROM | |
127 | ID 8086:4108, extract and save it as vga.bin in the board directory. | |
128 | ||
617b867f | 129 | Now you can build U-Boot and obtain u-boot.rom |
5dad97ed BM |
130 | |
131 | $ make crownbay_defconfig | |
132 | $ make all | |
133 | ||
28a85365 SI |
134 | --- |
135 | ||
136 | Intel Minnowboard Max instructions for bare mode: | |
3a1a18ff SG |
137 | |
138 | This uses as FSP as with Crown Bay, except it is for the Atom E3800 series. | |
139 | Download this and get the .fd file (BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd at | |
140 | the time of writing). Put it in the board directory: | |
141 | board/intel/minnowmax/fsp.bin | |
142 | ||
143 | Obtain the VGA RAM (Vga.dat at the time of writing) and put it into the same | |
144 | directory: board/intel/minnowmax/vga.bin | |
145 | ||
68522481 SG |
146 | You still need two more binary blobs. The first comes from the original |
147 | firmware image available from: | |
148 | ||
149 | http://firmware.intel.com/sites/default/files/2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip | |
150 | ||
151 | Unzip it: | |
152 | ||
153 | $ unzip 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip | |
3a1a18ff SG |
154 | |
155 | Use ifdtool in the U-Boot tools directory to extract the images from that | |
156 | file, for example: | |
157 | ||
68522481 SG |
158 | $ ./tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin |
159 | ||
160 | This will provide the descriptor file - copy this into the correct place: | |
161 | ||
162 | $ cp flashregion_0_flashdescriptor.bin board/intel/minnowmax/descriptor.bin | |
163 | ||
164 | Then do the same with the sample SPI image provided in the FSP (SPI.bin at | |
165 | the time of writing) to obtain the last image. Note that this will also | |
166 | produce a flash descriptor file, but it does not seem to work, probably | |
167 | because it is not designed for the Minnowmax. That is why you need to get | |
168 | the flash descriptor from the original firmware as above. | |
169 | ||
3a1a18ff SG |
170 | $ ./tools/ifdtool -x BayleyBay/SPI.bin |
171 | $ cp flashregion_2_intel_me.bin board/intel/minnowmax/me.bin | |
3a1a18ff SG |
172 | |
173 | Now you can build U-Boot and obtain u-boot.rom | |
174 | ||
175 | $ make minnowmax_defconfig | |
176 | $ make all | |
177 | ||
df898678 SG |
178 | Checksums are as follows (but note that newer versions will invalidate this): |
179 | ||
180 | $ md5sum -b board/intel/minnowmax/*.bin | |
181 | ffda9a3b94df5b74323afb328d51e6b4 board/intel/minnowmax/descriptor.bin | |
182 | 69f65b9a580246291d20d08cbef9d7c5 board/intel/minnowmax/fsp.bin | |
183 | 894a97d371544ec21de9c3e8e1716c4b board/intel/minnowmax/me.bin | |
184 | a2588537da387da592a27219d56e9962 board/intel/minnowmax/vga.bin | |
185 | ||
537ccba2 SG |
186 | The ROM image is broken up into these parts: |
187 | ||
188 | Offset Description Controlling config | |
189 | ------------------------------------------------------------ | |
190 | 000000 descriptor.bin Hard-coded to 0 in ifdtool | |
191 | 001000 me.bin Set by the descriptor | |
192 | 500000 <spare> | |
638a0589 | 193 | 6f0000 MRC cache CONFIG_ENABLE_MRC_CACHE |
537ccba2 | 194 | 700000 u-boot-dtb.bin CONFIG_SYS_TEXT_BASE |
7f72cdf9 | 195 | 790000 vga.bin CONFIG_VGA_BIOS_ADDR |
537ccba2 SG |
196 | 7c0000 fsp.bin CONFIG_FSP_ADDR |
197 | 7f8000 <spare> (depends on size of fsp.bin) | |
198 | 7fe000 Environment CONFIG_ENV_OFFSET | |
199 | 7ff800 U-Boot 16-bit boot CONFIG_SYS_X86_START16 | |
200 | ||
201 | Overall ROM image size is controlled by CONFIG_ROM_SIZE. | |
202 | ||
28a85365 | 203 | --- |
537ccba2 | 204 | |
28a85365 | 205 | Intel Galileo instructions for bare mode: |
67582c00 BM |
206 | |
207 | Only one binary blob is needed for Remote Management Unit (RMU) within Intel | |
208 | Quark SoC. Not like FSP, U-Boot does not call into the binary. The binary is | |
209 | needed by the Quark SoC itself. | |
210 | ||
211 | You can get the binary blob from Quark Board Support Package from Intel website: | |
212 | ||
213 | * ./QuarkSocPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin | |
214 | ||
215 | Rename the file and put it to the board directory by: | |
216 | ||
217 | $ cp RMU.bin board/intel/galileo/rmu.bin | |
218 | ||
219 | Now you can build U-Boot and obtain u-boot.rom | |
220 | ||
221 | $ make galileo_defconfig | |
222 | $ make all | |
3a1a18ff | 223 | |
1ae5b78c BM |
224 | QEMU x86 target instructions: |
225 | ||
226 | To build u-boot.rom for QEMU x86 targets, just simply run | |
227 | ||
228 | $ make qemu-x86_defconfig | |
229 | $ make all | |
230 | ||
683b09d7 BM |
231 | Note this default configuration will build a U-Boot for the QEMU x86 i440FX |
232 | board. To build a U-Boot against QEMU x86 Q35 board, you can change the build | |
233 | configuration during the 'make menuconfig' process like below: | |
234 | ||
235 | Device Tree Control ---> | |
236 | ... | |
237 | (qemu-x86_q35) Default Device Tree for DT control | |
238 | ||
617b867f BM |
239 | Test with coreboot |
240 | ------------------ | |
241 | For testing U-Boot as the coreboot payload, there are things that need be paid | |
242 | attention to. coreboot supports loading an ELF executable and a 32-bit plain | |
243 | binary, as well as other supported payloads. With the default configuration, | |
244 | U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the | |
245 | generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool | |
246 | provided by coreboot) manually as coreboot's 'make menuconfig' does not provide | |
247 | this capability yet. The command is as follows: | |
248 | ||
249 | # in the coreboot root directory | |
250 | $ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \ | |
330728d7 | 251 | -f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000 |
617b867f | 252 | |
330728d7 BM |
253 | Make sure 0x1110000 matches CONFIG_SYS_TEXT_BASE, which is the symbol address |
254 | of _x86boot_start (in arch/x86/cpu/start.S). | |
617b867f BM |
255 | |
256 | If you want to use ELF as the coreboot payload, change U-Boot configuration to | |
eea0f112 | 257 | use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE. |
617b867f | 258 | |
3a1a18ff SG |
259 | To enable video you must enable these options in coreboot: |
260 | ||
261 | - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5)) | |
262 | - Keep VESA framebuffer | |
263 | ||
264 | At present it seems that for Minnowboard Max, coreboot does not pass through | |
265 | the video information correctly (it always says the resolution is 0x0). This | |
266 | works correctly for link though. | |
267 | ||
28a85365 SI |
268 | Test with QEMU for bare mode |
269 | ---------------------------- | |
1ae5b78c | 270 | QEMU is a fancy emulator that can enable us to test U-Boot without access to |
9c4f5412 BM |
271 | a real x86 board. Please make sure your QEMU version is 2.3.0 or above test |
272 | U-Boot. To launch QEMU with u-boot.rom, call QEMU as follows: | |
1ae5b78c BM |
273 | |
274 | $ qemu-system-i386 -nographic -bios path/to/u-boot.rom | |
275 | ||
276 | This will instantiate an emulated x86 board with i440FX and PIIX chipset. QEMU | |
277 | also supports emulating an x86 board with Q35 and ICH9 based chipset, which is | |
278 | also supported by U-Boot. To instantiate such a machine, call QEMU with: | |
279 | ||
280 | $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -M q35 | |
281 | ||
282 | Note by default QEMU instantiated boards only have 128 MiB system memory. But | |
283 | it is enough to have U-Boot boot and function correctly. You can increase the | |
284 | system memory by pass '-m' parameter to QEMU if you want more memory: | |
285 | ||
286 | $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 | |
287 | ||
288 | This creates a board with 1 GiB system memory. Currently U-Boot for QEMU only | |
289 | supports 3 GiB maximum system memory and reserves the last 1 GiB address space | |
290 | for PCI device memory-mapped I/O and other stuff, so the maximum value of '-m' | |
291 | would be 3072. | |
3a1a18ff | 292 | |
9c4f5412 BM |
293 | QEMU emulates a graphic card which U-Boot supports. Removing '-nographic' will |
294 | show QEMU's VGA console window. Note this will disable QEMU's serial output. | |
295 | If you want to check both consoles, use '-serial stdio'. | |
296 | ||
a2eb65fc BM |
297 | Multicore is also supported by QEMU via '-smp n' where n is the number of cores |
298 | to instantiate. Currently the default U-Boot built for QEMU supports 2 cores. | |
299 | In order to support more cores, you need add additional cpu nodes in the device | |
300 | tree and change CONFIG_MAX_CPUS accordingly. | |
301 | ||
5dad97ed BM |
302 | CPU Microcode |
303 | ------------- | |
7aaff9bf | 304 | Modern CPUs usually require a special bit stream called microcode [8] to be |
5dad97ed BM |
305 | loaded on the processor after power up in order to function properly. U-Boot |
306 | has already integrated these as hex dumps in the source tree. | |
307 | ||
1281a1fc BM |
308 | SMP Support |
309 | ----------- | |
310 | On a multicore system, U-Boot is executed on the bootstrap processor (BSP). | |
311 | Additional application processors (AP) can be brought up by U-Boot. In order to | |
312 | have an SMP kernel to discover all of the available processors, U-Boot needs to | |
313 | prepare configuration tables which contain the multi-CPUs information before | |
314 | loading the OS kernel. Currently U-Boot supports generating two types of tables | |
7aaff9bf BM |
315 | for SMP, called Simple Firmware Interface (SFI) [9] and Multi-Processor (MP) |
316 | [10] tables. The writing of these two tables are controlled by two Kconfig | |
317 | options GENERATE_SFI_TABLE and GENERATE_MP_TABLE. | |
1281a1fc | 318 | |
5dad97ed BM |
319 | Driver Model |
320 | ------------ | |
321 | x86 has been converted to use driver model for serial and GPIO. | |
322 | ||
323 | Device Tree | |
324 | ----------- | |
325 | x86 uses device tree to configure the board thus requires CONFIG_OF_CONTROL to | |
617b867f | 326 | be turned on. Not every device on the board is configured via device tree, but |
5dad97ed BM |
327 | more and more devices will be added as time goes by. Check out the directory |
328 | arch/x86/dts/ for these device tree source files. | |
329 | ||
cb3b2e62 SG |
330 | Useful Commands |
331 | --------------- | |
cb3b2e62 SG |
332 | In keeping with the U-Boot philosophy of providing functions to check and |
333 | adjust internal settings, there are several x86-specific commands that may be | |
334 | useful: | |
335 | ||
62716ebb BM |
336 | fsp - Display information about Intel Firmware Support Package (FSP). |
337 | This is only available on platforms which use FSP, mostly Atom. | |
cb3b2e62 SG |
338 | iod - Display I/O memory |
339 | iow - Write I/O memory | |
340 | mtrr - List and set the Memory Type Range Registers (MTRR). These are used to | |
341 | tell the CPU whether memory is cacheable and if so the cache write | |
342 | mode to use. U-Boot sets up some reasonable values but you can | |
343 | adjust then with this command. | |
344 | ||
7bea5271 SG |
345 | Booting Ubuntu |
346 | -------------- | |
347 | As an example of how to set up your boot flow with U-Boot, here are | |
348 | instructions for starting Ubuntu from U-Boot. These instructions have been | |
349 | tested on Minnowboard MAX with a SATA driver but are equally applicable on | |
350 | other platforms and other media. There are really only four steps and its a | |
351 | very simple script, but a more detailed explanation is provided here for | |
352 | completeness. | |
353 | ||
354 | Note: It is possible to set up U-Boot to boot automatically using syslinux. | |
355 | It could also use the grub.cfg file (/efi/ubuntu/grub.cfg) to obtain the | |
356 | GUID. If you figure these out, please post patches to this README. | |
357 | ||
358 | Firstly, you will need Ubunutu installed on an available disk. It should be | |
359 | possible to make U-Boot start a USB start-up disk but for now let's assume | |
360 | that you used another boot loader to install Ubuntu. | |
361 | ||
362 | Use the U-Boot command line to find the UUID of the partition you want to | |
363 | boot. For example our disk is SCSI device 0: | |
364 | ||
365 | => part list scsi 0 | |
366 | ||
367 | Partition Map for SCSI device 0 -- Partition Type: EFI | |
368 | ||
369 | Part Start LBA End LBA Name | |
370 | Attributes | |
371 | Type GUID | |
372 | Partition GUID | |
373 | 1 0x00000800 0x001007ff "" | |
374 | attrs: 0x0000000000000000 | |
375 | type: c12a7328-f81f-11d2-ba4b-00a0c93ec93b | |
376 | guid: 9d02e8e4-4d59-408f-a9b0-fd497bc9291c | |
377 | 2 0x00100800 0x037d8fff "" | |
378 | attrs: 0x0000000000000000 | |
379 | type: 0fc63daf-8483-4772-8e79-3d69d8477de4 | |
380 | guid: 965c59ee-1822-4326-90d2-b02446050059 | |
381 | 3 0x037d9000 0x03ba27ff "" | |
382 | attrs: 0x0000000000000000 | |
383 | type: 0657fd6d-a4ab-43c4-84e5-0933c84b4f4f | |
384 | guid: 2c4282bd-1e82-4bcf-a5ff-51dedbf39f17 | |
385 | => | |
386 | ||
387 | This shows that your SCSI disk has three partitions. The really long hex | |
388 | strings are called Globally Unique Identifiers (GUIDs). You can look up the | |
389 | 'type' ones here [11]. On this disk the first partition is for EFI and is in | |
390 | VFAT format (DOS/Windows): | |
391 | ||
392 | => fatls scsi 0:1 | |
393 | efi/ | |
394 | ||
395 | 0 file(s), 1 dir(s) | |
396 | ||
397 | ||
398 | Partition 2 is 'Linux filesystem data' so that will be our root disk. It is | |
399 | in ext2 format: | |
400 | ||
401 | => ext2ls scsi 0:2 | |
402 | <DIR> 4096 . | |
403 | <DIR> 4096 .. | |
404 | <DIR> 16384 lost+found | |
405 | <DIR> 4096 boot | |
406 | <DIR> 12288 etc | |
407 | <DIR> 4096 media | |
408 | <DIR> 4096 bin | |
409 | <DIR> 4096 dev | |
410 | <DIR> 4096 home | |
411 | <DIR> 4096 lib | |
412 | <DIR> 4096 lib64 | |
413 | <DIR> 4096 mnt | |
414 | <DIR> 4096 opt | |
415 | <DIR> 4096 proc | |
416 | <DIR> 4096 root | |
417 | <DIR> 4096 run | |
418 | <DIR> 12288 sbin | |
419 | <DIR> 4096 srv | |
420 | <DIR> 4096 sys | |
421 | <DIR> 4096 tmp | |
422 | <DIR> 4096 usr | |
423 | <DIR> 4096 var | |
424 | <SYM> 33 initrd.img | |
425 | <SYM> 30 vmlinuz | |
426 | <DIR> 4096 cdrom | |
427 | <SYM> 33 initrd.img.old | |
428 | => | |
429 | ||
430 | and if you look in the /boot directory you will see the kernel: | |
431 | ||
432 | => ext2ls scsi 0:2 /boot | |
433 | <DIR> 4096 . | |
434 | <DIR> 4096 .. | |
435 | <DIR> 4096 efi | |
436 | <DIR> 4096 grub | |
437 | 3381262 System.map-3.13.0-32-generic | |
438 | 1162712 abi-3.13.0-32-generic | |
439 | 165611 config-3.13.0-32-generic | |
440 | 176500 memtest86+.bin | |
441 | 178176 memtest86+.elf | |
442 | 178680 memtest86+_multiboot.bin | |
443 | 5798112 vmlinuz-3.13.0-32-generic | |
444 | 165762 config-3.13.0-58-generic | |
445 | 1165129 abi-3.13.0-58-generic | |
446 | 5823136 vmlinuz-3.13.0-58-generic | |
447 | 19215259 initrd.img-3.13.0-58-generic | |
448 | 3391763 System.map-3.13.0-58-generic | |
449 | 5825048 vmlinuz-3.13.0-58-generic.efi.signed | |
450 | 28304443 initrd.img-3.13.0-32-generic | |
451 | => | |
452 | ||
453 | The 'vmlinuz' files contain a packaged Linux kernel. The format is a kind of | |
454 | self-extracting compressed file mixed with some 'setup' configuration data. | |
455 | Despite its size (uncompressed it is >10MB) this only includes a basic set of | |
456 | device drivers, enough to boot on most hardware types. | |
457 | ||
458 | The 'initrd' files contain a RAM disk. This is something that can be loaded | |
459 | into RAM and will appear to Linux like a disk. Ubuntu uses this to hold lots | |
460 | of drivers for whatever hardware you might have. It is loaded before the | |
461 | real root disk is accessed. | |
462 | ||
463 | The numbers after the end of each file are the version. Here it is Linux | |
464 | version 3.13. You can find the source code for this in the Linux tree with | |
465 | the tag v3.13. The '.0' allows for additional Linux releases to fix problems, | |
466 | but normally this is not needed. The '-58' is used by Ubuntu. Each time they | |
467 | release a new kernel they increment this number. New Ubuntu versions might | |
468 | include kernel patches to fix reported bugs. Stable kernels can exist for | |
469 | some years so this number can get quite high. | |
470 | ||
471 | The '.efi.signed' kernel is signed for EFI's secure boot. U-Boot has its own | |
472 | secure boot mechanism - see [12] [13] and cannot read .efi files at present. | |
473 | ||
474 | To boot Ubuntu from U-Boot the steps are as follows: | |
475 | ||
476 | 1. Set up the boot arguments. Use the GUID for the partition you want to | |
477 | boot: | |
478 | ||
479 | => setenv bootargs root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro | |
480 | ||
481 | Here root= tells Linux the location of its root disk. The disk is specified | |
482 | by its GUID, using '/dev/disk/by-partuuid/', a Linux path to a 'directory' | |
483 | containing all the GUIDs Linux has found. When it starts up, there will be a | |
484 | file in that directory with this name in it. It is also possible to use a | |
485 | device name here, see later. | |
486 | ||
487 | 2. Load the kernel. Since it is an ext2/4 filesystem we can do: | |
488 | ||
489 | => ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic | |
490 | ||
491 | The address 30000000 is arbitrary, but there seem to be problems with using | |
492 | small addresses (sometimes Linux cannot find the ramdisk). This is 48MB into | |
493 | the start of RAM (which is at 0 on x86). | |
494 | ||
495 | 3. Load the ramdisk (to 64MB): | |
496 | ||
497 | => ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic | |
498 | ||
499 | 4. Start up the kernel. We need to know the size of the ramdisk, but can use | |
500 | a variable for that. U-Boot sets 'filesize' to the size of the last file it | |
501 | loaded. | |
502 | ||
503 | => zboot 03000000 0 04000000 ${filesize} | |
504 | ||
505 | Type 'help zboot' if you want to see what the arguments are. U-Boot on x86 is | |
506 | quite verbose when it boots a kernel. You should see these messages from | |
507 | U-Boot: | |
508 | ||
509 | Valid Boot Flag | |
510 | Setup Size = 0x00004400 | |
511 | Magic signature found | |
512 | Using boot protocol version 2.0c | |
513 | Linux kernel version 3.13.0-58-generic (buildd@allspice) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 | |
514 | Building boot_params at 0x00090000 | |
515 | Loading bzImage at address 100000 (5805728 bytes) | |
516 | Magic signature found | |
517 | Initial RAM disk at linear address 0x04000000, size 19215259 bytes | |
518 | Kernel command line: "console=ttyS0,115200 root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro" | |
519 | ||
520 | Starting kernel ... | |
521 | ||
522 | U-Boot prints out some bootstage timing. This is more useful if you put the | |
523 | above commands into a script since then it will be faster. | |
524 | ||
525 | Timer summary in microseconds: | |
526 | Mark Elapsed Stage | |
527 | 0 0 reset | |
528 | 241,535 241,535 board_init_r | |
529 | 2,421,611 2,180,076 id=64 | |
530 | 2,421,790 179 id=65 | |
531 | 2,428,215 6,425 main_loop | |
532 | 48,860,584 46,432,369 start_kernel | |
533 | ||
534 | Accumulated time: | |
535 | 240,329 ahci | |
536 | 1,422,704 vesa display | |
537 | ||
538 | Now the kernel actually starts: | |
539 | ||
540 | [ 0.000000] Initializing cgroup subsys cpuset | |
541 | [ 0.000000] Initializing cgroup subsys cpu | |
542 | [ 0.000000] Initializing cgroup subsys cpuacct | |
543 | [ 0.000000] Linux version 3.13.0-58-generic (buildd@allspice) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 (Ubuntu 3.13.0-58.97-generic 3.13.11-ckt22) | |
544 | [ 0.000000] Command line: console=ttyS0,115200 root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro | |
545 | ||
546 | It continues for a long time. Along the way you will see it pick up your | |
547 | ramdisk: | |
548 | ||
549 | [ 0.000000] RAMDISK: [mem 0x04000000-0x05253fff] | |
550 | ... | |
551 | [ 0.788540] Trying to unpack rootfs image as initramfs... | |
552 | [ 1.540111] Freeing initrd memory: 18768K (ffff880004000000 - ffff880005254000) | |
553 | ... | |
554 | ||
555 | Later it actually starts using it: | |
556 | ||
557 | Begin: Running /scripts/local-premount ... done. | |
558 | ||
559 | You should also see your boot disk turn up: | |
560 | ||
561 | [ 4.357243] scsi 1:0:0:0: Direct-Access ATA ADATA SP310 5.2 PQ: 0 ANSI: 5 | |
562 | [ 4.366860] sd 1:0:0:0: [sda] 62533296 512-byte logical blocks: (32.0 GB/29.8 GiB) | |
563 | [ 4.375677] sd 1:0:0:0: Attached scsi generic sg0 type 0 | |
564 | [ 4.381859] sd 1:0:0:0: [sda] Write Protect is off | |
565 | [ 4.387452] sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA | |
566 | [ 4.399535] sda: sda1 sda2 sda3 | |
567 | ||
568 | Linux has found the three partitions (sda1-3). Mercifully it doesn't print out | |
569 | the GUIDs. In step 1 above we could have used: | |
570 | ||
571 | setenv bootargs root=/dev/sda2 ro | |
572 | ||
573 | instead of the GUID. However if you add another drive to your board the | |
574 | numbering may change whereas the GUIDs will not. So if your boot partition | |
575 | becomes sdb2, it will still boot. For embedded systems where you just want to | |
576 | boot the first disk, you have that option. | |
577 | ||
578 | The last thing you will see on the console is mention of plymouth (which | |
579 | displays the Ubuntu start-up screen) and a lot of 'Starting' messages: | |
580 | ||
581 | * Starting Mount filesystems on boot [ OK ] | |
582 | ||
583 | After a pause you should see a login screen on your display and you are done. | |
584 | ||
585 | If you want to put this in a script you can use something like this: | |
586 | ||
587 | setenv bootargs root=UUID=b2aaf743-0418-4d90-94cc-3e6108d7d968 ro | |
588 | setenv boot zboot 03000000 0 04000000 \${filesize} | |
589 | setenv bootcmd "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; run boot" | |
590 | saveenv | |
591 | ||
592 | The \ is to tell the shell not to evaluate ${filesize} as part of the setenv | |
593 | command. | |
594 | ||
595 | You will also need to add this to your board configuration file, e.g. | |
596 | include/configs/minnowmax.h: | |
597 | ||
598 | #define CONFIG_BOOTDELAY 2 | |
599 | ||
600 | Now when you reset your board it wait a few seconds (in case you want to | |
601 | interrupt) and then should boot straight into Ubuntu. | |
602 | ||
603 | You can also bake this behaviour into your build by hard-coding the | |
604 | environment variables if you add this to minnowmax.h: | |
605 | ||
606 | #undef CONFIG_BOOTARGS | |
607 | #undef CONFIG_BOOTCOMMAND | |
608 | ||
609 | #define CONFIG_BOOTARGS \ | |
610 | "root=/dev/sda2 ro" | |
611 | #define CONFIG_BOOTCOMMAND \ | |
612 | "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; " \ | |
613 | "ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; " \ | |
614 | "run boot" | |
615 | ||
616 | #undef CONFIG_EXTRA_ENV_SETTINGS | |
617 | #define CONFIG_EXTRA_ENV_SETTINGS "boot=zboot 03000000 0 04000000 ${filesize}" | |
618 | ||
619 | ||
00bdd952 SG |
620 | Development Flow |
621 | ---------------- | |
00bdd952 SG |
622 | These notes are for those who want to port U-Boot to a new x86 platform. |
623 | ||
624 | Since x86 CPUs boot from SPI flash, a SPI flash emulator is a good investment. | |
625 | The Dediprog em100 can be used on Linux. The em100 tool is available here: | |
626 | ||
627 | http://review.coreboot.org/p/em100.git | |
628 | ||
629 | On Minnowboard Max the following command line can be used: | |
630 | ||
631 | sudo em100 -s -p LOW -d u-boot.rom -c W25Q64DW -r | |
632 | ||
633 | A suitable clip for connecting over the SPI flash chip is here: | |
634 | ||
635 | http://www.dediprog.com/pd/programmer-accessories/EM-TC-8 | |
636 | ||
637 | This allows you to override the SPI flash contents for development purposes. | |
638 | Typically you can write to the em100 in around 1200ms, considerably faster | |
639 | than programming the real flash device each time. The only important | |
640 | limitation of the em100 is that it only supports SPI bus speeds up to 20MHz. | |
641 | This means that images must be set to boot with that speed. This is an | |
642 | Intel-specific feature - e.g. tools/ifttool has an option to set the SPI | |
643 | speed in the SPI descriptor region. | |
644 | ||
645 | If your chip/board uses an Intel Firmware Support Package (FSP) it is fairly | |
646 | easy to fit it in. You can follow the Minnowboard Max implementation, for | |
647 | example. Hopefully you will just need to create new files similar to those | |
648 | in arch/x86/cpu/baytrail which provide Bay Trail support. | |
649 | ||
650 | If you are not using an FSP you have more freedom and more responsibility. | |
651 | The ivybridge support works this way, although it still uses a ROM for | |
652 | graphics and still has binary blobs containing Intel code. You should aim to | |
653 | support all important peripherals on your platform including video and storage. | |
654 | Use the device tree for configuration where possible. | |
655 | ||
656 | For the microcode you can create a suitable device tree file using the | |
657 | microcode tool: | |
658 | ||
03e3c316 | 659 | ./tools/microcode-tool -d microcode.dat -m <model> create |
00bdd952 SG |
660 | |
661 | or if you only have header files and not the full Intel microcode.dat database: | |
662 | ||
663 | ./tools/microcode-tool -H BAY_TRAIL_FSP_KIT/Microcode/M0130673322.h \ | |
664 | -H BAY_TRAIL_FSP_KIT/Microcode/M0130679901.h \ | |
03e3c316 | 665 | -m all create |
00bdd952 SG |
666 | |
667 | These are written to arch/x86/dts/microcode/ by default. | |
668 | ||
669 | Note that it is possible to just add the micrcode for your CPU if you know its | |
670 | model. U-Boot prints this information when it starts | |
671 | ||
672 | CPU: x86_64, vendor Intel, device 30673h | |
673 | ||
674 | so here we can use the M0130673322 file. | |
675 | ||
676 | If you platform can display POST codes on two little 7-segment displays on | |
677 | the board, then you can use post_code() calls from C or assembler to monitor | |
678 | boot progress. This can be good for debugging. | |
679 | ||
680 | If not, you can try to get serial working as early as possible. The early | |
681 | debug serial port may be useful here. See setup_early_uart() for an example. | |
682 | ||
12c7510f BM |
683 | During the U-Boot porting, one of the important steps is to write correct PIRQ |
684 | routing information in the board device tree. Without it, device drivers in the | |
685 | Linux kernel won't function correctly due to interrupt is not working. Please | |
686 | refer to U-Boot doc [14] for the device tree bindings of Intel interrupt router. | |
687 | Here we have more details on the intel,pirq-routing property below. | |
688 | ||
689 | intel,pirq-routing = < | |
690 | PCI_BDF(0, 2, 0) INTA PIRQA | |
691 | ... | |
692 | >; | |
693 | ||
694 | As you see each entry has 3 cells. For the first one, we need describe all pci | |
695 | devices mounted on the board. For SoC devices, normally there is a chapter on | |
696 | the chipset datasheet which lists all the available PCI devices. For example on | |
697 | Bay Trail, this is chapter 4.3 (PCI configuration space). For the second one, we | |
698 | can get the interrupt pin either from datasheet or hardware via U-Boot shell. | |
699 | The reliable source is the hardware as sometimes chipset datasheet is not 100% | |
700 | up-to-date. Type 'pci header' plus the device's pci bus/device/function number | |
701 | from U-Boot shell below. | |
702 | ||
703 | => pci header 0.1e.1 | |
704 | vendor ID = 0x8086 | |
705 | device ID = 0x0f08 | |
706 | ... | |
707 | interrupt line = 0x09 | |
708 | interrupt pin = 0x04 | |
709 | ... | |
710 | ||
711 | It shows this PCI device is using INTD pin as it reports 4 in the interrupt pin | |
712 | register. Repeat this until you get interrupt pins for all the devices. The last | |
713 | cell is the PIRQ line which a particular interrupt pin is mapped to. On Intel | |
714 | chipset, the power-up default mapping is INTA/B/C/D maps to PIRQA/B/C/D. This | |
715 | can be changed by registers in LPC bridge. So far Intel FSP does not touch those | |
716 | registers so we can write down the PIRQ according to the default mapping rule. | |
717 | ||
718 | Once we get the PIRQ routing information in the device tree, the interrupt | |
719 | allocation and assignment will be done by U-Boot automatically. Now you can | |
720 | enable CONFIG_GENERATE_PIRQ_TABLE for testing Linux kernel using i8259 PIC and | |
721 | CONFIG_GENERATE_MP_TABLE for testing Linux kernel using local APIC and I/O APIC. | |
722 | ||
590870e7 SG |
723 | This script might be useful. If you feed it the output of 'pci long' from |
724 | U-Boot then it will generate a device tree fragment with the interrupt | |
725 | configuration for each device (note it needs gawk 4.0.0): | |
726 | ||
727 | $ cat console_output |awk '/PCI/ {device=$4} /interrupt line/ {line=$4} \ | |
728 | /interrupt pin/ {pin = $4; if (pin != "0x00" && pin != "0xff") \ | |
729 | {patsplit(device, bdf, "[0-9a-f]+"); \ | |
730 | printf "PCI_BDF(%d, %d, %d) INT%c PIRQ%c\n", strtonum("0x" bdf[1]), \ | |
731 | strtonum("0x" bdf[2]), bdf[3], strtonum(pin) + 64, 64 + strtonum(pin)}}' | |
732 | ||
733 | Example output: | |
734 | PCI_BDF(0, 2, 0) INTA PIRQA | |
735 | PCI_BDF(0, 3, 0) INTA PIRQA | |
736 | ... | |
737 | ||
448719c5 BM |
738 | Porting Hints |
739 | ------------- | |
740 | ||
741 | Quark-specific considerations: | |
742 | ||
743 | To port U-Boot to other boards based on the Intel Quark SoC, a few things need | |
744 | to be taken care of. The first important part is the Memory Reference Code (MRC) | |
745 | parameters. Quark MRC supports memory-down configuration only. All these MRC | |
746 | parameters are supplied via the board device tree. To get started, first copy | |
747 | the MRC section of arch/x86/dts/galileo.dts to your board's device tree, then | |
748 | change these values by consulting board manuals or your hardware vendor. | |
749 | Available MRC parameter values are listed in include/dt-bindings/mrc/quark.h. | |
750 | The other tricky part is with PCIe. Quark SoC integrates two PCIe root ports, | |
751 | but by default they are held in reset after power on. In U-Boot, PCIe | |
752 | initialization is properly handled as per Quark's firmware writer guide. | |
753 | In your board support codes, you need provide two routines to aid PCIe | |
754 | initialization, which are board_assert_perst() and board_deassert_perst(). | |
755 | The two routines need implement a board-specific mechanism to assert/deassert | |
756 | PCIe PERST# pin. Care must be taken that in those routines that any APIs that | |
757 | may trigger PCI enumeration process are strictly forbidden, as any access to | |
758 | PCIe root port's configuration registers will cause system hang while it is | |
759 | held in reset. For more details, check how they are implemented by the Intel | |
760 | Galileo board support codes in board/intel/galileo/galileo.c. | |
761 | ||
5dad97ed BM |
762 | TODO List |
763 | --------- | |
5dad97ed BM |
764 | - Audio |
765 | - Chrome OS verified boot | |
766 | - SMI and ACPI support, to provide platform info and facilities to Linux | |
767 | ||
768 | References | |
769 | ---------- | |
770 | [1] http://www.coreboot.org | |
1ae5b78c BM |
771 | [2] http://www.qemu.org |
772 | [3] http://www.coreboot.org/~stepan/pci8086,0166.rom | |
773 | [4] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html | |
774 | [5] http://www.intel.com/fsp | |
7aaff9bf BM |
775 | [6] http://www.intel.com/content/www/us/en/secure/intelligent-systems/privileged/e6xx-35-b1-cmc22211.html |
776 | [7] http://www.ami.com/products/bios-uefi-tools-and-utilities/bios-uefi-utilities/ | |
777 | [8] http://en.wikipedia.org/wiki/Microcode | |
778 | [9] http://simplefirmware.org | |
779 | [10] http://www.intel.com/design/archives/processors/pro/docs/242016.htm | |
7bea5271 SG |
780 | [11] https://en.wikipedia.org/wiki/GUID_Partition_Table |
781 | [12] http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy_vboot_0.pdf | |
782 | [13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf | |
12c7510f | 783 | [14] doc/device-tree-bindings/misc/intel,irq-router.txt |