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0044c42e SR |
1 | /* |
2 | * (C) Copyright 2011 | |
3 | * Heiko Schocher, DENX Software Engineering, hs@denx.de. | |
4 | * | |
abcaa6ee TR |
5 | * A bootcount driver for the RTC IP block found on many TI platforms. |
6 | * This requires the RTC clocks, etc, to be enabled prior to use and | |
7 | * not all boards with this IP block on it will have the RTC in use. | |
8 | * | |
1a459660 | 9 | * SPDX-License-Identifier: GPL-2.0+ |
0044c42e SR |
10 | */ |
11 | ||
12 | #include <bootcount.h> | |
155d424a | 13 | #include <asm/davinci_rtc.h> |
0044c42e SR |
14 | |
15 | void bootcount_store(ulong a) | |
16 | { | |
17 | struct davinci_rtc *reg = | |
18 | (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR; | |
19 | ||
20 | /* | |
bac9170f TM |
21 | * write RTC kick registers to enable write |
22 | * for RTC Scratch registers. Scratch register 2 is | |
23 | * used for bootcount value. | |
0044c42e SR |
24 | */ |
25 | writel(RTC_KICK0R_WE, ®->kick0r); | |
26 | writel(RTC_KICK1R_WE, ®->kick1r); | |
22ee3975 TR |
27 | raw_bootcount_store(®->scratch2, |
28 | (BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff)); | |
0044c42e SR |
29 | } |
30 | ||
31 | ulong bootcount_load(void) | |
32 | { | |
22ee3975 | 33 | unsigned long val; |
0044c42e SR |
34 | struct davinci_rtc *reg = |
35 | (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR; | |
36 | ||
22ee3975 TR |
37 | val = raw_bootcount_load(®->scratch2); |
38 | if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) | |
0044c42e SR |
39 | return 0; |
40 | else | |
22ee3975 | 41 | return val & 0x0000ffff; |
0044c42e | 42 | } |