[people/ms/u-boot.git] / drivers / clk / at91 / Kconfig

config CLK_AT91
	bool "AT91 clock drivers"
	depends on CLK
	select MISC
	help
	  This option is used to enable the AT91 clock driver.
	  The driver supports the AT91 clock generator, including
	  the oscillators and PLLs, such as main clock, slow clock,
	  PLLA, UTMI PLL. Clocks can also be a source clock of other
	  clocks a tree structure, such as master clock, usb device
	  clock, matrix clock and generic clock.
	  Devices can use a common clock API to request a particular
	  clock, enable it and get its rate.

config AT91_UTMI
	bool "Support UTMI PLL Clock"
	depends on CLK_AT91
	select REGMAP
	select SPL_REGMAP if SPL_DM
	select SYSCON
	select SPL_SYSCON if SPL_DM
	help
	  This option is used to enable the AT91 UTMI PLL clock
	  driver. It is the clock provider of USB, and UPLLCK is the
	  output of 480 MHz UTMI PLL, The souce clock of the UTMI
	  PLL is the main clock, so the main clock must select the
	  fast crystal oscillator to meet the frequency accuracy
	  required by USB.

config AT91_H32MX
	bool "Support H32MX 32-bit Matrix Clock"
	depends on CLK_AT91
	help
	  This option is used to enable the AT91 H32MX matrixes
	  clock driver. There are H64MX and H32MX matrixes clocks,
	  H64MX 64-bit matrix clocks are MCK. The H32MX 32-bit
	  matrix clock is to be configured as MCK if MCK does not
	  exceed 83 MHz, else it is to be configured as MCK/2.

config AT91_GENERIC_CLK
	bool "Support Generic Clock"
	depends on CLK_AT91
	help
	  This option is used to enable the AT91 generic clock
	  driver. Some peripherals may need a second clock source
	  that may be different from the system clock. This second
	  clock is the generic clock (GCLK) and is managed by
	  the PMC via PMC_PCR register.
Commit	Line	Data
9e5935c0 WY	1	config CLK_AT91
	2	bool "AT91 clock drivers"
	3	depends on CLK
6cadaa04	4	select MISC
9e5935c0 WY	5	help
	6	This option is used to enable the AT91 clock driver.
	7	The driver supports the AT91 clock generator, including
	8	the oscillators and PLLs, such as main clock, slow clock,
	9	PLLA, UTMI PLL. Clocks can also be a source clock of other
	10	clocks a tree structure, such as master clock, usb device
	11	clock, matrix clock and generic clock.
	12	Devices can use a common clock API to request a particular
	13	clock, enable it and get its rate.
	14
	15	config AT91_UTMI
	16	bool "Support UTMI PLL Clock"
9e0eb012	17	depends on CLK_AT91
e7c83154	18	select REGMAP
9e0eb012	19	select SPL_REGMAP if SPL_DM
e7c83154	20	select SYSCON
9e0eb012	21	select SPL_SYSCON if SPL_DM
9e5935c0 WY	22	help
	23	This option is used to enable the AT91 UTMI PLL clock
	24	driver. It is the clock provider of USB, and UPLLCK is the
	25	output of 480 MHz UTMI PLL, The souce clock of the UTMI
	26	PLL is the main clock, so the main clock must select the
	27	fast crystal oscillator to meet the frequency accuracy
	28	required by USB.
	29
	30	config AT91_H32MX
	31	bool "Support H32MX 32-bit Matrix Clock"
	32	depends on CLK_AT91
	33	help
	34	This option is used to enable the AT91 H32MX matrixes
	35	clock driver. There are H64MX and H32MX matrixes clocks,
	36	H64MX 64-bit matrix clocks are MCK. The H32MX 32-bit
	37	matrix clock is to be configured as MCK if MCK does not
	38	exceed 83 MHz, else it is to be configured as MCK/2.
	39
	40	config AT91_GENERIC_CLK
	41	bool "Support Generic Clock"
	42	depends on CLK_AT91
	43	help
	44	This option is used to enable the AT91 generic clock
	45	driver. Some peripherals may need a second clock source
	46	that may be different from the system clock. This second
	47	clock is the generic clock (GCLK) and is managed by
	48	the PMC via PMC_PCR register.