[people/ms/u-boot.git] / drivers / dma / dma-uclass.c

/*
 * Direct Memory Access U-Class driver
 *
 * (C) Copyright 2015
 *     Texas Instruments Incorporated, <www.ti.com>
 *
 * Author: Mugunthan V N <mugunthanvnm@ti.com>
 *
 * SPDX-License-Identifier:     GPL-2.0+
 */

#include <common.h>
#include <dma.h>
#include <dm.h>
#include <dm/uclass-internal.h>
#include <dm/device-internal.h>
#include <errno.h>

DECLARE_GLOBAL_DATA_PTR;

int dma_get_device(u32 transfer_type, struct udevice **devp)
{
	struct udevice *dev;
	int ret;

	for (ret = uclass_first_device(UCLASS_DMA, &dev); dev && !ret;
	     ret = uclass_next_device(&dev)) {
		struct dma_dev_priv *uc_priv;

		uc_priv = dev_get_uclass_priv(dev);
		if (uc_priv->supported & transfer_type)
			break;
	}

	if (!dev) {
		pr_err("No DMA device found that supports %x type\n",
		      transfer_type);
		return -EPROTONOSUPPORT;
	}

	*devp = dev;

	return ret;
}

int dma_memcpy(void *dst, void *src, size_t len)
{
	struct udevice *dev;
	const struct dma_ops *ops;
	int ret;

	ret = dma_get_device(DMA_SUPPORTS_MEM_TO_MEM, &dev);
	if (ret < 0)
		return ret;

	ops = device_get_ops(dev);
	if (!ops->transfer)
		return -ENOSYS;

	/* Invalidate the area, so no writeback into the RAM races with DMA */
	invalidate_dcache_range((unsigned long)dst, (unsigned long)dst +
				roundup(len, ARCH_DMA_MINALIGN));

	return ops->transfer(dev, DMA_MEM_TO_MEM, dst, src, len);
}

UCLASS_DRIVER(dma) = {
	.id		= UCLASS_DMA,
	.name		= "dma",
	.flags		= DM_UC_FLAG_SEQ_ALIAS,
	.per_device_auto_alloc_size = sizeof(struct dma_dev_priv),
};
Commit	Line	Data
a0594cef M	1	/*
	2	* Direct Memory Access U-Class driver
	3	*
	4	* (C) Copyright 2015
	5	* Texas Instruments Incorporated, <www.ti.com>
	6	*
	7	* Author: Mugunthan V N <mugunthanvnm@ti.com>
	8	*
	9	* SPDX-License-Identifier: GPL-2.0+
	10	*/
	11
	12	#include <common.h>
	13	#include <dma.h>
	14	#include <dm.h>
	15	#include <dm/uclass-internal.h>
	16	#include <dm/device-internal.h>
	17	#include <errno.h>
	18
	19	DECLARE_GLOBAL_DATA_PTR;
	20
	21	int dma_get_device(u32 transfer_type, struct udevice **devp)
	22	{
	23	struct udevice *dev;
	24	int ret;
	25
	26	for (ret = uclass_first_device(UCLASS_DMA, &dev); dev && !ret;
	27	ret = uclass_next_device(&dev)) {
	28	struct dma_dev_priv *uc_priv;
	29
	30	uc_priv = dev_get_uclass_priv(dev);
	31	if (uc_priv->supported & transfer_type)
	32	break;
	33	}
	34
	35	if (!dev) {
9b643e31	36	pr_err("No DMA device found that supports %x type\n",
a0594cef M	37	transfer_type);
	38	return -EPROTONOSUPPORT;
	39	}
	40
	41	*devp = dev;
	42
	43	return ret;
	44	}
	45
	46	int dma_memcpy(void dst, void src, size_t len)
	47	{
	48	struct udevice *dev;
	49	const struct dma_ops *ops;
	50	int ret;
	51
	52	ret = dma_get_device(DMA_SUPPORTS_MEM_TO_MEM, &dev);
	53	if (ret < 0)
	54	return ret;
	55
	56	ops = device_get_ops(dev);
	57	if (!ops->transfer)
	58	return -ENOSYS;
	59
	60	/* Invalidate the area, so no writeback into the RAM races with DMA */
	61	invalidate_dcache_range((unsigned long)dst, (unsigned long)dst +
	62	roundup(len, ARCH_DMA_MINALIGN));
	63
	64	return ops->transfer(dev, DMA_MEM_TO_MEM, dst, src, len);
	65	}
	66
	67	UCLASS_DRIVER(dma) = {
	68	.id = UCLASS_DMA,
	69	.name = "dma",
	70	.flags = DM_UC_FLAG_SEQ_ALIAS,
	71	.per_device_auto_alloc_size = sizeof(struct dma_dev_priv),
	72	};