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fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP
[people/ms/u-boot.git] / drivers / fpga / Makefile
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c8aa7dfc
JCPV
1#
2# (C) Copyright 2008
3# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4#
1a459660 5# SPDX-License-Identifier: GPL-2.0+
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JCPV
6#
7
710f1d3d
MY
8obj-y += fpga.o
9obj-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
10obj-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
11obj-$(CONFIG_FPGA_VIRTEX2) += virtex2.o
12obj-$(CONFIG_FPGA_ZYNQPL) += zynqpl.o
6b245014 13obj-$(CONFIG_FPGA_ZYNQMPPL) += zynqmppl.o
710f1d3d
MY
14obj-$(CONFIG_FPGA_XILINX) += xilinx.o
15obj-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o
c8aa7dfc 16ifdef CONFIG_FPGA_ALTERA
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MY
17obj-y += altera.o
18obj-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o
19obj-$(CONFIG_FPGA_CYCLON2) += cyclon2.o
20obj-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
ff9c4c53 21obj-$(CONFIG_FPGA_STRATIX_V) += stratixv.o
230fe9b2 22obj-$(CONFIG_FPGA_SOCFPGA) += socfpga.o
c8aa7dfc 23endif