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Commit | Line | Data |
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5b845b66 | 1 | /* |
5da627a4 WD |
2 | * (C) Copyright 2003 |
3 | * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de | |
4 | * | |
5b845b66 WD |
5 | * (C) Copyright 2002 |
6 | * Rich Ireland, Enterasys Networks, rireland@enterasys.com. | |
7 | * | |
1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
5b845b66 WD |
9 | */ |
10 | ||
5b845b66 WD |
11 | /* |
12 | * Altera FPGA support | |
13 | */ | |
14 | #include <common.h> | |
5da627a4 | 15 | #include <ACEX1K.h> |
3c735e74 | 16 | #include <stratixII.h> |
5b845b66 | 17 | |
5da627a4 WD |
18 | /* Define FPGA_DEBUG to get debug printf's */ |
19 | /* #define FPGA_DEBUG */ | |
5b845b66 WD |
20 | |
21 | #ifdef FPGA_DEBUG | |
22 | #define PRINTF(fmt,args...) printf (fmt ,##args) | |
23 | #else | |
24 | #define PRINTF(fmt,args...) | |
25 | #endif | |
26 | ||
5da627a4 | 27 | /* Local Static Functions */ |
3c735e74 | 28 | static int altera_validate (Altera_desc * desc, const char *fn); |
5da627a4 | 29 | |
5b845b66 | 30 | /* ------------------------------------------------------------------------- */ |
e6a857da | 31 | int altera_load(Altera_desc *desc, const void *buf, size_t bsize) |
5b845b66 | 32 | { |
5da627a4 WD |
33 | int ret_val = FPGA_FAIL; /* assume a failure */ |
34 | ||
64cd52ef | 35 | if (!altera_validate (desc, (char *)__FUNCTION__)) { |
5da627a4 WD |
36 | printf ("%s: Invalid device descriptor\n", __FUNCTION__); |
37 | } else { | |
38 | switch (desc->family) { | |
39 | case Altera_ACEX1K: | |
f0ff4692 | 40 | case Altera_CYC2: |
0133502e | 41 | #if defined(CONFIG_FPGA_ACEX1K) |
5da627a4 WD |
42 | PRINTF ("%s: Launching the ACEX1K Loader...\n", |
43 | __FUNCTION__); | |
44 | ret_val = ACEX1K_load (desc, buf, bsize); | |
3c735e74 | 45 | #elif defined(CONFIG_FPGA_CYCLON2) |
f18361b9 | 46 | PRINTF ("%s: Launching the CYCLONE II Loader...\n", |
f0ff4692 SR |
47 | __FUNCTION__); |
48 | ret_val = CYC2_load (desc, buf, bsize); | |
5da627a4 WD |
49 | #else |
50 | printf ("%s: No support for ACEX1K devices.\n", | |
51 | __FUNCTION__); | |
52 | #endif | |
53 | break; | |
54 | ||
3c735e74 | 55 | #if defined(CONFIG_FPGA_STRATIX_II) |
56 | case Altera_StratixII: | |
57 | PRINTF ("%s: Launching the Stratix II Loader...\n", | |
58 | __FUNCTION__); | |
59 | ret_val = StratixII_load (desc, buf, bsize); | |
60 | break; | |
61 | #endif | |
5da627a4 WD |
62 | default: |
63 | printf ("%s: Unsupported family type, %d\n", | |
64 | __FUNCTION__, desc->family); | |
65 | } | |
66 | } | |
67 | ||
68 | return ret_val; | |
5b845b66 WD |
69 | } |
70 | ||
e6a857da | 71 | int altera_dump(Altera_desc *desc, const void *buf, size_t bsize) |
5b845b66 | 72 | { |
5da627a4 WD |
73 | int ret_val = FPGA_FAIL; /* assume a failure */ |
74 | ||
64cd52ef | 75 | if (!altera_validate (desc, (char *)__FUNCTION__)) { |
5da627a4 WD |
76 | printf ("%s: Invalid device descriptor\n", __FUNCTION__); |
77 | } else { | |
78 | switch (desc->family) { | |
79 | case Altera_ACEX1K: | |
0133502e | 80 | #if defined(CONFIG_FPGA_ACEX) |
5da627a4 WD |
81 | PRINTF ("%s: Launching the ACEX1K Reader...\n", |
82 | __FUNCTION__); | |
83 | ret_val = ACEX1K_dump (desc, buf, bsize); | |
84 | #else | |
85 | printf ("%s: No support for ACEX1K devices.\n", | |
86 | __FUNCTION__); | |
87 | #endif | |
88 | break; | |
89 | ||
3c735e74 | 90 | #if defined(CONFIG_FPGA_STRATIX_II) |
91 | case Altera_StratixII: | |
92 | PRINTF ("%s: Launching the Stratix II Reader...\n", | |
93 | __FUNCTION__); | |
94 | ret_val = StratixII_dump (desc, buf, bsize); | |
95 | break; | |
96 | #endif | |
5da627a4 WD |
97 | default: |
98 | printf ("%s: Unsupported family type, %d\n", | |
99 | __FUNCTION__, desc->family); | |
100 | } | |
101 | } | |
102 | ||
103 | return ret_val; | |
5b845b66 WD |
104 | } |
105 | ||
106 | int altera_info( Altera_desc *desc ) | |
107 | { | |
5da627a4 WD |
108 | int ret_val = FPGA_FAIL; |
109 | ||
64cd52ef | 110 | if (altera_validate (desc, (char *)__FUNCTION__)) { |
5da627a4 WD |
111 | printf ("Family: \t"); |
112 | switch (desc->family) { | |
113 | case Altera_ACEX1K: | |
114 | printf ("ACEX1K\n"); | |
115 | break; | |
f0ff4692 SR |
116 | case Altera_CYC2: |
117 | printf ("CYCLON II\n"); | |
118 | break; | |
3c735e74 | 119 | case Altera_StratixII: |
120 | printf ("Stratix II\n"); | |
121 | break; | |
122 | /* Add new family types here */ | |
5da627a4 WD |
123 | default: |
124 | printf ("Unknown family type, %d\n", desc->family); | |
125 | } | |
126 | ||
127 | printf ("Interface type:\t"); | |
128 | switch (desc->iface) { | |
129 | case passive_serial: | |
130 | printf ("Passive Serial (PS)\n"); | |
131 | break; | |
132 | case passive_parallel_synchronous: | |
133 | printf ("Passive Parallel Synchronous (PPS)\n"); | |
134 | break; | |
135 | case passive_parallel_asynchronous: | |
136 | printf ("Passive Parallel Asynchronous (PPA)\n"); | |
137 | break; | |
138 | case passive_serial_asynchronous: | |
139 | printf ("Passive Serial Asynchronous (PSA)\n"); | |
140 | break; | |
141 | case altera_jtag_mode: /* Not used */ | |
142 | printf ("JTAG Mode\n"); | |
143 | break; | |
3c735e74 | 144 | case fast_passive_parallel: |
145 | printf ("Fast Passive Parallel (FPP)\n"); | |
146 | break; | |
147 | case fast_passive_parallel_security: | |
148 | printf | |
149 | ("Fast Passive Parallel with Security (FPPS) \n"); | |
150 | break; | |
5da627a4 WD |
151 | /* Add new interface types here */ |
152 | default: | |
153 | printf ("Unsupported interface type, %d\n", desc->iface); | |
154 | } | |
155 | ||
156 | printf ("Device Size: \t%d bytes\n" | |
157 | "Cookie: \t0x%x (%d)\n", | |
158 | desc->size, desc->cookie, desc->cookie); | |
159 | ||
160 | if (desc->iface_fns) { | |
161 | printf ("Device Function Table @ 0x%p\n", desc->iface_fns); | |
162 | switch (desc->family) { | |
163 | case Altera_ACEX1K: | |
f0ff4692 | 164 | case Altera_CYC2: |
0133502e | 165 | #if defined(CONFIG_FPGA_ACEX1K) |
5da627a4 | 166 | ACEX1K_info (desc); |
0133502e | 167 | #elif defined(CONFIG_FPGA_CYCLON2) |
f0ff4692 | 168 | CYC2_info (desc); |
5da627a4 WD |
169 | #else |
170 | /* just in case */ | |
171 | printf ("%s: No support for ACEX1K devices.\n", | |
172 | __FUNCTION__); | |
173 | #endif | |
174 | break; | |
3c735e74 | 175 | #if defined(CONFIG_FPGA_STRATIX_II) |
176 | case Altera_StratixII: | |
177 | StratixII_info (desc); | |
178 | break; | |
179 | #endif | |
5da627a4 WD |
180 | /* Add new family types here */ |
181 | default: | |
182 | /* we don't need a message here - we give one up above */ | |
b77fad3b | 183 | break; |
5da627a4 WD |
184 | } |
185 | } else { | |
186 | printf ("No Device Function Table.\n"); | |
187 | } | |
188 | ||
189 | ret_val = FPGA_SUCCESS; | |
190 | } else { | |
191 | printf ("%s: Invalid device descriptor\n", __FUNCTION__); | |
192 | } | |
193 | ||
194 | return ret_val; | |
195 | } | |
196 | ||
5b845b66 WD |
197 | /* ------------------------------------------------------------------------- */ |
198 | ||
3c735e74 | 199 | static int altera_validate (Altera_desc * desc, const char *fn) |
5da627a4 | 200 | { |
472d5460 | 201 | int ret_val = false; |
5da627a4 WD |
202 | |
203 | if (desc) { | |
204 | if ((desc->family > min_altera_type) && | |
205 | (desc->family < max_altera_type)) { | |
206 | if ((desc->iface > min_altera_iface_type) && | |
207 | (desc->iface < max_altera_iface_type)) { | |
208 | if (desc->size) { | |
472d5460 | 209 | ret_val = true; |
5da627a4 WD |
210 | } else { |
211 | printf ("%s: NULL part size\n", fn); | |
212 | } | |
213 | } else { | |
214 | printf ("%s: Invalid Interface type, %d\n", | |
215 | fn, desc->iface); | |
216 | } | |
217 | } else { | |
218 | printf ("%s: Invalid family type, %d\n", fn, desc->family); | |
219 | } | |
220 | } else { | |
221 | printf ("%s: NULL descriptor!\n", fn); | |
222 | } | |
223 | ||
224 | return ret_val; | |
225 | } | |
5b845b66 WD |
226 | |
227 | /* ------------------------------------------------------------------------- */ |