[people/ms/u-boot.git] / drivers / fpga / xilinx.c

/*
 * (C) Copyright 2012-2013, Xilinx, Michal Simek
 *
 * (C) Copyright 2002
 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
 * Keith Outwater, keith_outwater@mvis.com
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/*
 *  Xilinx FPGA support
 */

#include <common.h>
#include <fpga.h>
#include <virtex2.h>
#include <spartan2.h>
#include <spartan3.h>
#include <zynqpl.h>

#if 0
#define FPGA_DEBUG
#endif

/* Define FPGA_DEBUG to get debug printf's */
#ifdef	FPGA_DEBUG
#define	PRINTF(fmt,args...)	printf (fmt ,##args)
#else
#define PRINTF(fmt,args...)
#endif

/* Local Static Functions */
static int xilinx_validate(xilinx_desc *desc, char *fn);

/* ------------------------------------------------------------------------- */

int fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
{
	unsigned int length;
	unsigned int swapsize;
	char buffer[80];
	unsigned char *dataptr;
	unsigned int i;
	const fpga_desc *desc;
	xilinx_desc *xdesc;

	dataptr = (unsigned char *)fpgadata;
	/* Find out fpga_description */
	desc = fpga_validate(devnum, dataptr, 0, (char *)__func__);
	/* Assign xilinx device description */
	xdesc = desc->devdesc;

	/* skip the first bytes of the bitsteam, their meaning is unknown */
	length = (*dataptr << 8) + *(dataptr + 1);
	dataptr += 2;
	dataptr += length;

	/* get design name (identifier, length, string) */
	length = (*dataptr << 8) + *(dataptr + 1);
	dataptr += 2;
	if (*dataptr++ != 0x61) {
		debug("%s: Design name id not recognized in bitstream\n",
		      __func__);
		return FPGA_FAIL;
	}

	length = (*dataptr << 8) + *(dataptr + 1);
	dataptr += 2;
	for (i = 0; i < length; i++)
		buffer[i] = *dataptr++;

	printf("  design filename = \"%s\"\n", buffer);

	/* get part number (identifier, length, string) */
	if (*dataptr++ != 0x62) {
		printf("%s: Part number id not recognized in bitstream\n",
		       __func__);
		return FPGA_FAIL;
	}

	length = (*dataptr << 8) + *(dataptr + 1);
	dataptr += 2;
	for (i = 0; i < length; i++)
		buffer[i] = *dataptr++;

	if (xdesc->name) {
		i = strncmp(buffer, xdesc->name, strlen(xdesc->name));
		if (i) {
			printf("%s: Wrong bitstream ID for this device\n",
			       __func__);
			printf("%s: Bitstream ID %s, current device ID %d/%s\n",
			       __func__, buffer, devnum, xdesc->name);
			return FPGA_FAIL;
		}
	} else {
		printf("%s: Please fill correct device ID to xilinx_desc\n",
		       __func__);
	}
	printf("  part number = \"%s\"\n", buffer);

	/* get date (identifier, length, string) */
	if (*dataptr++ != 0x63) {
		printf("%s: Date identifier not recognized in bitstream\n",
		       __func__);
		return FPGA_FAIL;
	}

	length = (*dataptr << 8) + *(dataptr+1);
	dataptr += 2;
	for (i = 0; i < length; i++)
		buffer[i] = *dataptr++;
	printf("  date = \"%s\"\n", buffer);

	/* get time (identifier, length, string) */
	if (*dataptr++ != 0x64) {
		printf("%s: Time identifier not recognized in bitstream\n",
		       __func__);
		return FPGA_FAIL;
	}

	length = (*dataptr << 8) + *(dataptr+1);
	dataptr += 2;
	for (i = 0; i < length; i++)
		buffer[i] = *dataptr++;
	printf("  time = \"%s\"\n", buffer);

	/* get fpga data length (identifier, length) */
	if (*dataptr++ != 0x65) {
		printf("%s: Data length id not recognized in bitstream\n",
		       __func__);
		return FPGA_FAIL;
	}
	swapsize = ((unsigned int) *dataptr << 24) +
		   ((unsigned int) *(dataptr + 1) << 16) +
		   ((unsigned int) *(dataptr + 2) << 8) +
		   ((unsigned int) *(dataptr + 3));
	dataptr += 4;
	printf("  bytes in bitstream = %d\n", swapsize);

	return fpga_load(devnum, dataptr, swapsize);
}

int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
	int ret_val = FPGA_FAIL;	/* assume a failure */

	if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
	} else
		switch (desc->family) {
		case xilinx_spartan2:
#if defined(CONFIG_FPGA_SPARTAN2)
			PRINTF ("%s: Launching the Spartan-II Loader...\n",
					__FUNCTION__);
			ret_val = spartan2_load(desc, buf, bsize);
#else
			printf ("%s: No support for Spartan-II devices.\n",
					__FUNCTION__);
#endif
			break;
		case xilinx_spartan3:
#if defined(CONFIG_FPGA_SPARTAN3)
			PRINTF ("%s: Launching the Spartan-III Loader...\n",
					__FUNCTION__);
			ret_val = spartan3_load(desc, buf, bsize);
#else
			printf ("%s: No support for Spartan-III devices.\n",
					__FUNCTION__);
#endif
			break;
		case xilinx_virtex2:
#if defined(CONFIG_FPGA_VIRTEX2)
			PRINTF ("%s: Launching the Virtex-II Loader...\n",
					__FUNCTION__);
			ret_val = virtex2_load(desc, buf, bsize);
#else
			printf ("%s: No support for Virtex-II devices.\n",
					__FUNCTION__);
#endif
			break;
		case xilinx_zynq:
#if defined(CONFIG_FPGA_ZYNQPL)
			PRINTF("%s: Launching the Zynq PL Loader...\n",
			       __func__);
			ret_val = zynq_load(desc, buf, bsize);
#else
			printf("%s: No support for Zynq devices.\n",
			       __func__);
#endif
			break;

		default:
			printf ("%s: Unsupported family type, %d\n",
					__FUNCTION__, desc->family);
		}

	return ret_val;
}

int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
	int ret_val = FPGA_FAIL;	/* assume a failure */

	if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
	} else
		switch (desc->family) {
		case xilinx_spartan2:
#if defined(CONFIG_FPGA_SPARTAN2)
			PRINTF ("%s: Launching the Spartan-II Reader...\n",
					__FUNCTION__);
			ret_val = spartan2_dump(desc, buf, bsize);
#else
			printf ("%s: No support for Spartan-II devices.\n",
					__FUNCTION__);
#endif
			break;
		case xilinx_spartan3:
#if defined(CONFIG_FPGA_SPARTAN3)
			PRINTF ("%s: Launching the Spartan-III Reader...\n",
					__FUNCTION__);
			ret_val = spartan3_dump(desc, buf, bsize);
#else
			printf ("%s: No support for Spartan-III devices.\n",
					__FUNCTION__);
#endif
			break;
		case xilinx_virtex2:
#if defined( CONFIG_FPGA_VIRTEX2)
			PRINTF ("%s: Launching the Virtex-II Reader...\n",
					__FUNCTION__);
			ret_val = virtex2_dump(desc, buf, bsize);
#else
			printf ("%s: No support for Virtex-II devices.\n",
					__FUNCTION__);
#endif
			break;
		case xilinx_zynq:
#if defined(CONFIG_FPGA_ZYNQPL)
			PRINTF("%s: Launching the Zynq PL Reader...\n",
			       __func__);
			ret_val = zynq_dump(desc, buf, bsize);
#else
			printf("%s: No support for Zynq devices.\n",
			       __func__);
#endif
			break;

		default:
			printf ("%s: Unsupported family type, %d\n",
					__FUNCTION__, desc->family);
		}

	return ret_val;
}

int xilinx_info(xilinx_desc *desc)
{
	int ret_val = FPGA_FAIL;

	if (xilinx_validate (desc, (char *)__FUNCTION__)) {
		printf ("Family:        \t");
		switch (desc->family) {
		case xilinx_spartan2:
			printf ("Spartan-II\n");
			break;
		case xilinx_spartan3:
			printf ("Spartan-III\n");
			break;
		case xilinx_virtex2:
			printf ("Virtex-II\n");
			break;
		case xilinx_zynq:
			printf("Zynq PL\n");
			break;
			/* Add new family types here */
		default:
			printf ("Unknown family type, %d\n", desc->family);
		}

		printf ("Interface type:\t");
		switch (desc->iface) {
		case slave_serial:
			printf ("Slave Serial\n");
			break;
		case master_serial:	/* Not used */
			printf ("Master Serial\n");
			break;
		case slave_parallel:
			printf ("Slave Parallel\n");
			break;
		case jtag_mode:		/* Not used */
			printf ("JTAG Mode\n");
			break;
		case slave_selectmap:
			printf ("Slave SelectMap Mode\n");
			break;
		case master_selectmap:
			printf ("Master SelectMap Mode\n");
			break;
		case devcfg:
			printf("Device configuration interface (Zynq)\n");
			break;
			/* Add new interface types here */
		default:
			printf ("Unsupported interface type, %d\n", desc->iface);
		}

		printf ("Device Size:   \t%d bytes\n"
				"Cookie:        \t0x%x (%d)\n",
				desc->size, desc->cookie, desc->cookie);
		if (desc->name)
			printf("Device name:   \t%s\n", desc->name);

		if (desc->iface_fns) {
			printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
			switch (desc->family) {
			case xilinx_spartan2:
#if defined(CONFIG_FPGA_SPARTAN2)
				spartan2_info(desc);
#else
				/* just in case */
				printf ("%s: No support for Spartan-II devices.\n",
						__FUNCTION__);
#endif
				break;
			case xilinx_spartan3:
#if defined(CONFIG_FPGA_SPARTAN3)
				spartan3_info(desc);
#else
				/* just in case */
				printf ("%s: No support for Spartan-III devices.\n",
						__FUNCTION__);
#endif
				break;
			case xilinx_virtex2:
#if defined(CONFIG_FPGA_VIRTEX2)
				virtex2_info(desc);
#else
				/* just in case */
				printf ("%s: No support for Virtex-II devices.\n",
						__FUNCTION__);
#endif
				break;
			case xilinx_zynq:
#if defined(CONFIG_FPGA_ZYNQPL)
				zynq_info(desc);
#else
				/* just in case */
				printf("%s: No support for Zynq devices.\n",
				       __func__);
#endif
				/* Add new family types here */
			default:
				/* we don't need a message here - we give one up above */
				;
			}
		} else
			printf ("No Device Function Table.\n");

		ret_val = FPGA_SUCCESS;
	} else {
		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
	}

	return ret_val;
}

/* ------------------------------------------------------------------------- */

static int xilinx_validate(xilinx_desc *desc, char *fn)
{
	int ret_val = false;

	if (desc) {
		if ((desc->family > min_xilinx_type) &&
			(desc->family < max_xilinx_type)) {
			if ((desc->iface > min_xilinx_iface_type) &&
				(desc->iface < max_xilinx_iface_type)) {
				if (desc->size) {
					ret_val = true;
				} else
					printf ("%s: NULL part size\n", fn);
			} else
				printf ("%s: Invalid Interface type, %d\n",
						fn, desc->iface);
		} else
			printf ("%s: Invalid family type, %d\n", fn, desc->family);
	} else
		printf ("%s: NULL descriptor!\n", fn);

	return ret_val;
}
Commit	Line	Data
5d3207da	1	/*
d5dae85f MS	2	* (C) Copyright 2012-2013, Xilinx, Michal Simek
d5dae85f MS	3	*
5d3207da WD	4	* (C) Copyright 2002
	5	* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
	6	* Keith Outwater, keith_outwater@mvis.com
	7	*
1a459660	8	* SPDX-License-Identifier: GPL-2.0+
5d3207da WD	9	*/
	10
	11	/*
	12	* Xilinx FPGA support
	13	*/
	14
	15	#include <common.h>
6631db47	16	#include <fpga.h>
5d3207da WD	17	#include <virtex2.h>
5d3207da WD	18	#include <spartan2.h>
875c7893	19	#include <spartan3.h>
d5dae85f	20	#include <zynqpl.h>
5d3207da	21
5d3207da WD	22	#if 0
	23	#define FPGA_DEBUG
	24	#endif
	25
	26	/* Define FPGA_DEBUG to get debug printf's */
	27	#ifdef FPGA_DEBUG
	28	#define PRINTF(fmt,args...) printf (fmt ,##args)
	29	#else
	30	#define PRINTF(fmt,args...)
	31	#endif
	32
	33	/* Local Static Functions */
f8c1be98	34	static int xilinx_validate(xilinx_desc desc, char fn);
5d3207da WD	35
	36	/* ------------------------------------------------------------------------- */
	37
23f4bd75	38	int fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
52c20644 MS	39	{
	40	unsigned int length;
	41	unsigned int swapsize;
	42	char buffer[80];
	43	unsigned char *dataptr;
	44	unsigned int i;
6631db47	45	const fpga_desc *desc;
f8c1be98	46	xilinx_desc *xdesc;
52c20644 MS	47
52c20644 MS	48	dataptr = (unsigned char *)fpgadata;
6631db47 MS	49	/* Find out fpga_description */
	50	desc = fpga_validate(devnum, dataptr, 0, (char *)__func__);
	51	/* Assign xilinx device description */
	52	xdesc = desc->devdesc;
52c20644 MS	53
	54	/* skip the first bytes of the bitsteam, their meaning is unknown */
	55	length = (dataptr << 8) + (dataptr + 1);
	56	dataptr += 2;
	57	dataptr += length;
	58
	59	/* get design name (identifier, length, string) */
	60	length = (dataptr << 8) + (dataptr + 1);
	61	dataptr += 2;
	62	if (*dataptr++ != 0x61) {
	63	debug("%s: Design name id not recognized in bitstream\n",
	64	__func__);
	65	return FPGA_FAIL;
	66	}
	67
	68	length = (dataptr << 8) + (dataptr + 1);
	69	dataptr += 2;
	70	for (i = 0; i < length; i++)
	71	buffer[i] = *dataptr++;
	72
	73	printf(" design filename = \"%s\"\n", buffer);
	74
	75	/* get part number (identifier, length, string) */
	76	if (*dataptr++ != 0x62) {
	77	printf("%s: Part number id not recognized in bitstream\n",
	78	__func__);
	79	return FPGA_FAIL;
	80	}
	81
	82	length = (dataptr << 8) + (dataptr + 1);
	83	dataptr += 2;
	84	for (i = 0; i < length; i++)
	85	buffer[i] = *dataptr++;
6631db47 MS	86
	87	if (xdesc->name) {
	88	i = strncmp(buffer, xdesc->name, strlen(xdesc->name));
	89	if (i) {
	90	printf("%s: Wrong bitstream ID for this device\n",
	91	__func__);
	92	printf("%s: Bitstream ID %s, current device ID %d/%s\n",
	93	__func__, buffer, devnum, xdesc->name);
	94	return FPGA_FAIL;
	95	}
	96	} else {
f8c1be98	97	printf("%s: Please fill correct device ID to xilinx_desc\n",
6631db47 MS	98	__func__);
6631db47 MS	99	}
52c20644 MS	100	printf(" part number = \"%s\"\n", buffer);
	101
	102	/* get date (identifier, length, string) */
	103	if (*dataptr++ != 0x63) {
	104	printf("%s: Date identifier not recognized in bitstream\n",
	105	__func__);
	106	return FPGA_FAIL;
	107	}
	108
	109	length = (dataptr << 8) + (dataptr+1);
	110	dataptr += 2;
	111	for (i = 0; i < length; i++)
	112	buffer[i] = *dataptr++;
	113	printf(" date = \"%s\"\n", buffer);
	114
	115	/* get time (identifier, length, string) */
	116	if (*dataptr++ != 0x64) {
	117	printf("%s: Time identifier not recognized in bitstream\n",
	118	__func__);
	119	return FPGA_FAIL;
	120	}
	121
	122	length = (dataptr << 8) + (dataptr+1);
	123	dataptr += 2;
	124	for (i = 0; i < length; i++)
	125	buffer[i] = *dataptr++;
	126	printf(" time = \"%s\"\n", buffer);
	127
	128	/* get fpga data length (identifier, length) */
	129	if (*dataptr++ != 0x65) {
	130	printf("%s: Data length id not recognized in bitstream\n",
	131	__func__);
	132	return FPGA_FAIL;
	133	}
	134	swapsize = ((unsigned int) *dataptr << 24) +
	135	((unsigned int) *(dataptr + 1) << 16) +
	136	((unsigned int) *(dataptr + 2) << 8) +
	137	((unsigned int) *(dataptr + 3));
	138	dataptr += 4;
	139	printf(" bytes in bitstream = %d\n", swapsize);
	140
23f4bd75	141	return fpga_load(devnum, dataptr, swapsize);
52c20644 MS	142	}
52c20644 MS	143
f8c1be98	144	int xilinx_load(xilinx_desc desc, const void buf, size_t bsize)
5d3207da WD	145	{
	146	int ret_val = FPGA_FAIL; /* assume a failure */
	147
77ddac94	148	if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
5d3207da WD	149	printf ("%s: Invalid device descriptor\n", __FUNCTION__);
	150	} else
	151	switch (desc->family) {
b625b9ae	152	case xilinx_spartan2:
0133502e	153	#if defined(CONFIG_FPGA_SPARTAN2)
5d3207da WD	154	PRINTF ("%s: Launching the Spartan-II Loader...\n",
5d3207da WD	155	__FUNCTION__);
b625b9ae	156	ret_val = spartan2_load(desc, buf, bsize);
5d3207da WD	157	#else
	158	printf ("%s: No support for Spartan-II devices.\n",
	159	__FUNCTION__);
875c7893 WD	160	#endif
875c7893 WD	161	break;
2a6e3869	162	case xilinx_spartan3:
0133502e	163	#if defined(CONFIG_FPGA_SPARTAN3)
875c7893 WD	164	PRINTF ("%s: Launching the Spartan-III Loader...\n",
875c7893 WD	165	__FUNCTION__);
2a6e3869	166	ret_val = spartan3_load(desc, buf, bsize);
875c7893 WD	167	#else
	168	printf ("%s: No support for Spartan-III devices.\n",
	169	__FUNCTION__);
5d3207da WD	170	#endif
5d3207da WD	171	break;
d9071ce0	172	case xilinx_virtex2:
0133502e	173	#if defined(CONFIG_FPGA_VIRTEX2)
5d3207da WD	174	PRINTF ("%s: Launching the Virtex-II Loader...\n",
5d3207da WD	175	__FUNCTION__);
d9071ce0	176	ret_val = virtex2_load(desc, buf, bsize);
5d3207da WD	177	#else
	178	printf ("%s: No support for Virtex-II devices.\n",
	179	__FUNCTION__);
d5dae85f MS	180	#endif
	181	break;
	182	case xilinx_zynq:
	183	#if defined(CONFIG_FPGA_ZYNQPL)
	184	PRINTF("%s: Launching the Zynq PL Loader...\n",
	185	__func__);
	186	ret_val = zynq_load(desc, buf, bsize);
	187	#else
	188	printf("%s: No support for Zynq devices.\n",
	189	__func__);
5d3207da WD	190	#endif
	191	break;
	192
	193	default:
	194	printf ("%s: Unsupported family type, %d\n",
	195	__FUNCTION__, desc->family);
	196	}
	197
	198	return ret_val;
	199	}
	200
f8c1be98	201	int xilinx_dump(xilinx_desc desc, const void buf, size_t bsize)
5d3207da WD	202	{
	203	int ret_val = FPGA_FAIL; /* assume a failure */
	204
77ddac94	205	if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
5d3207da WD	206	printf ("%s: Invalid device descriptor\n", __FUNCTION__);
	207	} else
	208	switch (desc->family) {
b625b9ae	209	case xilinx_spartan2:
0133502e	210	#if defined(CONFIG_FPGA_SPARTAN2)
5d3207da WD	211	PRINTF ("%s: Launching the Spartan-II Reader...\n",
5d3207da WD	212	__FUNCTION__);
b625b9ae	213	ret_val = spartan2_dump(desc, buf, bsize);
5d3207da WD	214	#else
	215	printf ("%s: No support for Spartan-II devices.\n",
	216	__FUNCTION__);
875c7893 WD	217	#endif
875c7893 WD	218	break;
2a6e3869	219	case xilinx_spartan3:
0133502e	220	#if defined(CONFIG_FPGA_SPARTAN3)
875c7893 WD	221	PRINTF ("%s: Launching the Spartan-III Reader...\n",
875c7893 WD	222	__FUNCTION__);
2a6e3869	223	ret_val = spartan3_dump(desc, buf, bsize);
875c7893 WD	224	#else
	225	printf ("%s: No support for Spartan-III devices.\n",
	226	__FUNCTION__);
5d3207da WD	227	#endif
5d3207da WD	228	break;
d9071ce0	229	case xilinx_virtex2:
0133502e	230	#if defined( CONFIG_FPGA_VIRTEX2)
5d3207da WD	231	PRINTF ("%s: Launching the Virtex-II Reader...\n",
5d3207da WD	232	__FUNCTION__);
d9071ce0	233	ret_val = virtex2_dump(desc, buf, bsize);
5d3207da WD	234	#else
	235	printf ("%s: No support for Virtex-II devices.\n",
	236	__FUNCTION__);
d5dae85f MS	237	#endif
	238	break;
	239	case xilinx_zynq:
	240	#if defined(CONFIG_FPGA_ZYNQPL)
	241	PRINTF("%s: Launching the Zynq PL Reader...\n",
	242	__func__);
	243	ret_val = zynq_dump(desc, buf, bsize);
	244	#else
	245	printf("%s: No support for Zynq devices.\n",
	246	__func__);
5d3207da WD	247	#endif
	248	break;
	249
	250	default:
	251	printf ("%s: Unsupported family type, %d\n",
	252	__FUNCTION__, desc->family);
	253	}
	254
	255	return ret_val;
	256	}
	257
f8c1be98	258	int xilinx_info(xilinx_desc *desc)
5d3207da WD	259	{
	260	int ret_val = FPGA_FAIL;
	261
77ddac94	262	if (xilinx_validate (desc, (char *)__FUNCTION__)) {
5d3207da WD	263	printf ("Family: \t");
5d3207da WD	264	switch (desc->family) {
b625b9ae	265	case xilinx_spartan2:
5d3207da WD	266	printf ("Spartan-II\n");
5d3207da WD	267	break;
2a6e3869	268	case xilinx_spartan3:
875c7893 WD	269	printf ("Spartan-III\n");
875c7893 WD	270	break;
d9071ce0	271	case xilinx_virtex2:
5d3207da WD	272	printf ("Virtex-II\n");
5d3207da WD	273	break;
d5dae85f MS	274	case xilinx_zynq:
	275	printf("Zynq PL\n");
	276	break;
5d3207da WD	277	/* Add new family types here */
	278	default:
	279	printf ("Unknown family type, %d\n", desc->family);
	280	}
	281
	282	printf ("Interface type:\t");
	283	switch (desc->iface) {
	284	case slave_serial:
	285	printf ("Slave Serial\n");
	286	break;
	287	case master_serial: /* Not used */
	288	printf ("Master Serial\n");
	289	break;
	290	case slave_parallel:
	291	printf ("Slave Parallel\n");
	292	break;
	293	case jtag_mode: /* Not used */
	294	printf ("JTAG Mode\n");
	295	break;
	296	case slave_selectmap:
	297	printf ("Slave SelectMap Mode\n");
	298	break;
	299	case master_selectmap:
	300	printf ("Master SelectMap Mode\n");
	301	break;
d5dae85f MS	302	case devcfg:
	303	printf("Device configuration interface (Zynq)\n");
	304	break;
5d3207da WD	305	/* Add new interface types here */
	306	default:
	307	printf ("Unsupported interface type, %d\n", desc->iface);
	308	}
	309
	310	printf ("Device Size: \t%d bytes\n"
	311	"Cookie: \t0x%x (%d)\n",
	312	desc->size, desc->cookie, desc->cookie);
6631db47 MS	313	if (desc->name)
6631db47 MS	314	printf("Device name: \t%s\n", desc->name);
5d3207da WD	315
	316	if (desc->iface_fns) {
	317	printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
	318	switch (desc->family) {
b625b9ae	319	case xilinx_spartan2:
0133502e	320	#if defined(CONFIG_FPGA_SPARTAN2)
b625b9ae	321	spartan2_info(desc);
5d3207da WD	322	#else
	323	/* just in case */
	324	printf ("%s: No support for Spartan-II devices.\n",
	325	__FUNCTION__);
875c7893 WD	326	#endif
875c7893 WD	327	break;
2a6e3869	328	case xilinx_spartan3:
0133502e	329	#if defined(CONFIG_FPGA_SPARTAN3)
2a6e3869	330	spartan3_info(desc);
875c7893 WD	331	#else
	332	/* just in case */
	333	printf ("%s: No support for Spartan-III devices.\n",
	334	__FUNCTION__);
5d3207da WD	335	#endif
5d3207da WD	336	break;
d9071ce0	337	case xilinx_virtex2:
0133502e	338	#if defined(CONFIG_FPGA_VIRTEX2)
d9071ce0	339	virtex2_info(desc);
5d3207da WD	340	#else
	341	/* just in case */
	342	printf ("%s: No support for Virtex-II devices.\n",
	343	__FUNCTION__);
	344	#endif
	345	break;
d5dae85f MS	346	case xilinx_zynq:
	347	#if defined(CONFIG_FPGA_ZYNQPL)
	348	zynq_info(desc);
	349	#else
	350	/* just in case */
	351	printf("%s: No support for Zynq devices.\n",
	352	__func__);
	353	#endif
5d3207da WD	354	/* Add new family types here */
	355	default:
	356	/* we don't need a message here - we give one up above */
a8c7c708	357	;
5d3207da WD	358	}
	359	} else
	360	printf ("No Device Function Table.\n");
	361
	362	ret_val = FPGA_SUCCESS;
	363	} else {
	364	printf ("%s: Invalid device descriptor\n", __FUNCTION__);
	365	}
	366
	367	return ret_val;
	368	}
	369
5d3207da WD	370	/* ------------------------------------------------------------------------- */
5d3207da WD	371
f8c1be98	372	static int xilinx_validate(xilinx_desc desc, char fn)
5d3207da	373	{
472d5460	374	int ret_val = false;
5d3207da WD	375
	376	if (desc) {
	377	if ((desc->family > min_xilinx_type) &&
	378	(desc->family < max_xilinx_type)) {
	379	if ((desc->iface > min_xilinx_iface_type) &&
	380	(desc->iface < max_xilinx_iface_type)) {
	381	if (desc->size) {
472d5460	382	ret_val = true;
5d3207da WD	383	} else
	384	printf ("%s: NULL part size\n", fn);
	385	} else
	386	printf ("%s: Invalid Interface type, %d\n",
	387	fn, desc->iface);
	388	} else
	389	printf ("%s: Invalid family type, %d\n", fn, desc->family);
	390	} else
	391	printf ("%s: NULL descriptor!\n", fn);
	392
	393	return ret_val;
	394	}