projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 2403f8f4 VK |
1 | /* |
| 2 | * (C) Copyright 2009 | |
| 3 | * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. | |
| 4 | * | |
| 1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 2403f8f4 VK |
6 | */ |
| 7 | ||
| 031ed2fa VK |
8 | #ifndef __DW_I2C_H_ |
| 9 | #define __DW_I2C_H_ | |
| 2403f8f4 VK |
10 | |
| 11 | struct i2c_regs { | |
| e209828c SR |
12 | u32 ic_con; /* 0x00 */ |
| 13 | u32 ic_tar; /* 0x04 */ | |
| 14 | u32 ic_sar; /* 0x08 */ | |
| 15 | u32 ic_hs_maddr; /* 0x0c */ | |
| 16 | u32 ic_cmd_data; /* 0x10 */ | |
| 17 | u32 ic_ss_scl_hcnt; /* 0x14 */ | |
| 18 | u32 ic_ss_scl_lcnt; /* 0x18 */ | |
| 19 | u32 ic_fs_scl_hcnt; /* 0x1c */ | |
| 20 | u32 ic_fs_scl_lcnt; /* 0x20 */ | |
| 21 | u32 ic_hs_scl_hcnt; /* 0x24 */ | |
| 22 | u32 ic_hs_scl_lcnt; /* 0x28 */ | |
| 23 | u32 ic_intr_stat; /* 0x2c */ | |
| 24 | u32 ic_intr_mask; /* 0x30 */ | |
| 25 | u32 ic_raw_intr_stat; /* 0x34 */ | |
| 26 | u32 ic_rx_tl; /* 0x38 */ | |
| 27 | u32 ic_tx_tl; /* 0x3c */ | |
| 28 | u32 ic_clr_intr; /* 0x40 */ | |
| 29 | u32 ic_clr_rx_under; /* 0x44 */ | |
| 30 | u32 ic_clr_rx_over; /* 0x48 */ | |
| 31 | u32 ic_clr_tx_over; /* 0x4c */ | |
| 32 | u32 ic_clr_rd_req; /* 0x50 */ | |
| 33 | u32 ic_clr_tx_abrt; /* 0x54 */ | |
| 34 | u32 ic_clr_rx_done; /* 0x58 */ | |
| 35 | u32 ic_clr_activity; /* 0x5c */ | |
| 36 | u32 ic_clr_stop_det; /* 0x60 */ | |
| 37 | u32 ic_clr_start_det; /* 0x64 */ | |
| 38 | u32 ic_clr_gen_call; /* 0x68 */ | |
| 39 | u32 ic_enable; /* 0x6c */ | |
| 40 | u32 ic_status; /* 0x70 */ | |
| 41 | u32 ic_txflr; /* 0x74 */ | |
| 42 | u32 ic_rxflr; /* 0x78 */ | |
| 43 | u32 ic_sda_hold; /* 0x7c */ | |
| 44 | u32 ic_tx_abrt_source; /* 0x80 */ | |
| 45 | u8 res1[0x18]; /* 0x84 */ | |
| 46 | u32 ic_enable_status; /* 0x9c */ | |
| 2403f8f4 VK |
47 | }; |
| 48 | ||
| d40d914c | 49 | #if !defined(IC_CLK) |
| 2403f8f4 | 50 | #define IC_CLK 166 |
| d40d914c | 51 | #endif |
| 2403f8f4 VK |
52 | #define NANO_TO_MICRO 1000 |
| 53 | ||
| 54 | /* High and low times in different speed modes (in ns) */ | |
| 55 | #define MIN_SS_SCL_HIGHTIME 4000 | |
| ea31b7a7 AV |
56 | #define MIN_SS_SCL_LOWTIME 4700 |
| 57 | #define MIN_FS_SCL_HIGHTIME 600 | |
| 58 | #define MIN_FS_SCL_LOWTIME 1300 | |
| 2403f8f4 VK |
59 | #define MIN_HS_SCL_HIGHTIME 60 |
| 60 | #define MIN_HS_SCL_LOWTIME 160 | |
| 61 | ||
| 62 | /* Worst case timeout for 1 byte is kept as 2ms */ | |
| 63 | #define I2C_BYTE_TO (CONFIG_SYS_HZ/500) | |
| 64 | #define I2C_STOPDET_TO (CONFIG_SYS_HZ/500) | |
| 65 | #define I2C_BYTE_TO_BB (I2C_BYTE_TO * 16) | |
| 66 | ||
| 67 | /* i2c control register definitions */ | |
| 68 | #define IC_CON_SD 0x0040 | |
| 69 | #define IC_CON_RE 0x0020 | |
| 70 | #define IC_CON_10BITADDRMASTER 0x0010 | |
| 71 | #define IC_CON_10BITADDR_SLAVE 0x0008 | |
| 72 | #define IC_CON_SPD_MSK 0x0006 | |
| 73 | #define IC_CON_SPD_SS 0x0002 | |
| 74 | #define IC_CON_SPD_FS 0x0004 | |
| 75 | #define IC_CON_SPD_HS 0x0006 | |
| 76 | #define IC_CON_MM 0x0001 | |
| 77 | ||
| 78 | /* i2c target address register definitions */ | |
| 79 | #define TAR_ADDR 0x0050 | |
| 80 | ||
| 81 | /* i2c slave address register definitions */ | |
| 82 | #define IC_SLAVE_ADDR 0x0002 | |
| 83 | ||
| 84 | /* i2c data buffer and command register definitions */ | |
| 85 | #define IC_CMD 0x0100 | |
| 491739bb | 86 | #define IC_STOP 0x0200 |
| 2403f8f4 VK |
87 | |
| 88 | /* i2c interrupt status register definitions */ | |
| 89 | #define IC_GEN_CALL 0x0800 | |
| 90 | #define IC_START_DET 0x0400 | |
| 91 | #define IC_STOP_DET 0x0200 | |
| 92 | #define IC_ACTIVITY 0x0100 | |
| 93 | #define IC_RX_DONE 0x0080 | |
| 94 | #define IC_TX_ABRT 0x0040 | |
| 95 | #define IC_RD_REQ 0x0020 | |
| 96 | #define IC_TX_EMPTY 0x0010 | |
| 97 | #define IC_TX_OVER 0x0008 | |
| 98 | #define IC_RX_FULL 0x0004 | |
| 99 | #define IC_RX_OVER 0x0002 | |
| 100 | #define IC_RX_UNDER 0x0001 | |
| 101 | ||
| 102 | /* fifo threshold register definitions */ | |
| 103 | #define IC_TL0 0x00 | |
| 104 | #define IC_TL1 0x01 | |
| 105 | #define IC_TL2 0x02 | |
| 106 | #define IC_TL3 0x03 | |
| 107 | #define IC_TL4 0x04 | |
| 108 | #define IC_TL5 0x05 | |
| 109 | #define IC_TL6 0x06 | |
| 110 | #define IC_TL7 0x07 | |
| 111 | #define IC_RX_TL IC_TL0 | |
| 112 | #define IC_TX_TL IC_TL0 | |
| 113 | ||
| 114 | /* i2c enable register definitions */ | |
| 115 | #define IC_ENABLE_0B 0x0001 | |
| 116 | ||
| 117 | /* i2c status register definitions */ | |
| 118 | #define IC_STATUS_SA 0x0040 | |
| 119 | #define IC_STATUS_MA 0x0020 | |
| 120 | #define IC_STATUS_RFF 0x0010 | |
| 121 | #define IC_STATUS_RFNE 0x0008 | |
| 122 | #define IC_STATUS_TFE 0x0004 | |
| 123 | #define IC_STATUS_TFNF 0x0002 | |
| 124 | #define IC_STATUS_ACT 0x0001 | |
| 125 | ||
| 126 | /* Speed Selection */ | |
| 127 | #define IC_SPEED_MODE_STANDARD 1 | |
| 128 | #define IC_SPEED_MODE_FAST 2 | |
| 129 | #define IC_SPEED_MODE_MAX 3 | |
| 130 | ||
| 131 | #define I2C_MAX_SPEED 3400000 | |
| 132 | #define I2C_FAST_SPEED 400000 | |
| 133 | #define I2C_STANDARD_SPEED 100000 | |
| 134 | ||
| 031ed2fa | 135 | #endif /* __DW_I2C_H_ */ |