[people/ms/u-boot.git] / drivers / i2c / designware_i2c.h

/*
 * (C) Copyright 2009
 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __DW_I2C_H_
#define __DW_I2C_H_

struct i2c_regs {
	u32 ic_con;
	u32 ic_tar;
	u32 ic_sar;
	u32 ic_hs_maddr;
	u32 ic_cmd_data;
	u32 ic_ss_scl_hcnt;
	u32 ic_ss_scl_lcnt;
	u32 ic_fs_scl_hcnt;
	u32 ic_fs_scl_lcnt;
	u32 ic_hs_scl_hcnt;
	u32 ic_hs_scl_lcnt;
	u32 ic_intr_stat;
	u32 ic_intr_mask;
	u32 ic_raw_intr_stat;
	u32 ic_rx_tl;
	u32 ic_tx_tl;
	u32 ic_clr_intr;
	u32 ic_clr_rx_under;
	u32 ic_clr_rx_over;
	u32 ic_clr_tx_over;
	u32 ic_clr_rd_req;
	u32 ic_clr_tx_abrt;
	u32 ic_clr_rx_done;
	u32 ic_clr_activity;
	u32 ic_clr_stop_det;
	u32 ic_clr_start_det;
	u32 ic_clr_gen_call;
	u32 ic_enable;
	u32 ic_status;
	u32 ic_txflr;
	u32 ix_rxflr;
	u32 reserved_1;
	u32 ic_tx_abrt_source;
};

#if !defined(IC_CLK)
#define IC_CLK			166
#endif
#define NANO_TO_MICRO		1000

/* High and low times in different speed modes (in ns) */
#define MIN_SS_SCL_HIGHTIME	4000
#define MIN_SS_SCL_LOWTIME	4700
#define MIN_FS_SCL_HIGHTIME	600
#define MIN_FS_SCL_LOWTIME	1300
#define MIN_HS_SCL_HIGHTIME	60
#define MIN_HS_SCL_LOWTIME	160

/* Worst case timeout for 1 byte is kept as 2ms */
#define I2C_BYTE_TO		(CONFIG_SYS_HZ/500)
#define I2C_STOPDET_TO		(CONFIG_SYS_HZ/500)
#define I2C_BYTE_TO_BB		(I2C_BYTE_TO * 16)

/* i2c control register definitions */
#define IC_CON_SD		0x0040
#define IC_CON_RE		0x0020
#define IC_CON_10BITADDRMASTER	0x0010
#define IC_CON_10BITADDR_SLAVE	0x0008
#define IC_CON_SPD_MSK		0x0006
#define IC_CON_SPD_SS		0x0002
#define IC_CON_SPD_FS		0x0004
#define IC_CON_SPD_HS		0x0006
#define IC_CON_MM		0x0001

/* i2c target address register definitions */
#define TAR_ADDR		0x0050

/* i2c slave address register definitions */
#define IC_SLAVE_ADDR		0x0002

/* i2c data buffer and command register definitions */
#define IC_CMD			0x0100
#define IC_STOP			0x0200

/* i2c interrupt status register definitions */
#define IC_GEN_CALL		0x0800
#define IC_START_DET		0x0400
#define IC_STOP_DET		0x0200
#define IC_ACTIVITY		0x0100
#define IC_RX_DONE		0x0080
#define IC_TX_ABRT		0x0040
#define IC_RD_REQ		0x0020
#define IC_TX_EMPTY		0x0010
#define IC_TX_OVER		0x0008
#define IC_RX_FULL		0x0004
#define IC_RX_OVER 		0x0002
#define IC_RX_UNDER		0x0001

/* fifo threshold register definitions */
#define IC_TL0			0x00
#define IC_TL1			0x01
#define IC_TL2			0x02
#define IC_TL3			0x03
#define IC_TL4			0x04
#define IC_TL5			0x05
#define IC_TL6			0x06
#define IC_TL7			0x07
#define IC_RX_TL		IC_TL0
#define IC_TX_TL		IC_TL0

/* i2c enable register definitions */
#define IC_ENABLE_0B		0x0001

/* i2c status register  definitions */
#define IC_STATUS_SA		0x0040
#define IC_STATUS_MA		0x0020
#define IC_STATUS_RFF		0x0010
#define IC_STATUS_RFNE		0x0008
#define IC_STATUS_TFE		0x0004
#define IC_STATUS_TFNF		0x0002
#define IC_STATUS_ACT		0x0001

/* Speed Selection */
#define IC_SPEED_MODE_STANDARD	1
#define IC_SPEED_MODE_FAST	2
#define IC_SPEED_MODE_MAX	3

#define I2C_MAX_SPEED		3400000
#define I2C_FAST_SPEED		400000
#define I2C_STANDARD_SPEED	100000

#endif /* __DW_I2C_H_ */
Commit	Line	Data
2403f8f4 VK	1	/*
	2	* (C) Copyright 2009
	3	* Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
2403f8f4 VK	6	*/
2403f8f4 VK	7
031ed2fa VK	8	#ifndef __DW_I2C_H_
031ed2fa VK	9	#define __DW_I2C_H_
2403f8f4 VK	10
	11	struct i2c_regs {
	12	u32 ic_con;
	13	u32 ic_tar;
	14	u32 ic_sar;
	15	u32 ic_hs_maddr;
	16	u32 ic_cmd_data;
	17	u32 ic_ss_scl_hcnt;
	18	u32 ic_ss_scl_lcnt;
	19	u32 ic_fs_scl_hcnt;
	20	u32 ic_fs_scl_lcnt;
	21	u32 ic_hs_scl_hcnt;
	22	u32 ic_hs_scl_lcnt;
	23	u32 ic_intr_stat;
	24	u32 ic_intr_mask;
	25	u32 ic_raw_intr_stat;
	26	u32 ic_rx_tl;
	27	u32 ic_tx_tl;
	28	u32 ic_clr_intr;
	29	u32 ic_clr_rx_under;
	30	u32 ic_clr_rx_over;
	31	u32 ic_clr_tx_over;
	32	u32 ic_clr_rd_req;
	33	u32 ic_clr_tx_abrt;
	34	u32 ic_clr_rx_done;
	35	u32 ic_clr_activity;
	36	u32 ic_clr_stop_det;
	37	u32 ic_clr_start_det;
	38	u32 ic_clr_gen_call;
	39	u32 ic_enable;
	40	u32 ic_status;
	41	u32 ic_txflr;
	42	u32 ix_rxflr;
	43	u32 reserved_1;
	44	u32 ic_tx_abrt_source;
	45	};
	46
d40d914c	47	#if !defined(IC_CLK)
2403f8f4	48	#define IC_CLK 166
d40d914c	49	#endif
2403f8f4 VK	50	#define NANO_TO_MICRO 1000
	51
	52	/* High and low times in different speed modes (in ns) */
	53	#define MIN_SS_SCL_HIGHTIME 4000
ea31b7a7 AV	54	#define MIN_SS_SCL_LOWTIME 4700
	55	#define MIN_FS_SCL_HIGHTIME 600
	56	#define MIN_FS_SCL_LOWTIME 1300
2403f8f4 VK	57	#define MIN_HS_SCL_HIGHTIME 60
	58	#define MIN_HS_SCL_LOWTIME 160
	59
	60	/* Worst case timeout for 1 byte is kept as 2ms */
	61	#define I2C_BYTE_TO (CONFIG_SYS_HZ/500)
	62	#define I2C_STOPDET_TO (CONFIG_SYS_HZ/500)
	63	#define I2C_BYTE_TO_BB (I2C_BYTE_TO * 16)
	64
	65	/* i2c control register definitions */
	66	#define IC_CON_SD 0x0040
	67	#define IC_CON_RE 0x0020
	68	#define IC_CON_10BITADDRMASTER 0x0010
	69	#define IC_CON_10BITADDR_SLAVE 0x0008
	70	#define IC_CON_SPD_MSK 0x0006
	71	#define IC_CON_SPD_SS 0x0002
	72	#define IC_CON_SPD_FS 0x0004
	73	#define IC_CON_SPD_HS 0x0006
	74	#define IC_CON_MM 0x0001
	75
	76	/* i2c target address register definitions */
	77	#define TAR_ADDR 0x0050
	78
	79	/* i2c slave address register definitions */
	80	#define IC_SLAVE_ADDR 0x0002
	81
	82	/* i2c data buffer and command register definitions */
	83	#define IC_CMD 0x0100
491739bb	84	#define IC_STOP 0x0200
2403f8f4 VK	85
	86	/* i2c interrupt status register definitions */
	87	#define IC_GEN_CALL 0x0800
	88	#define IC_START_DET 0x0400
	89	#define IC_STOP_DET 0x0200
	90	#define IC_ACTIVITY 0x0100
	91	#define IC_RX_DONE 0x0080
	92	#define IC_TX_ABRT 0x0040
	93	#define IC_RD_REQ 0x0020
	94	#define IC_TX_EMPTY 0x0010
	95	#define IC_TX_OVER 0x0008
	96	#define IC_RX_FULL 0x0004
	97	#define IC_RX_OVER 0x0002
	98	#define IC_RX_UNDER 0x0001
	99
	100	/* fifo threshold register definitions */
	101	#define IC_TL0 0x00
	102	#define IC_TL1 0x01
	103	#define IC_TL2 0x02
	104	#define IC_TL3 0x03
	105	#define IC_TL4 0x04
	106	#define IC_TL5 0x05
	107	#define IC_TL6 0x06
	108	#define IC_TL7 0x07
	109	#define IC_RX_TL IC_TL0
	110	#define IC_TX_TL IC_TL0
	111
	112	/* i2c enable register definitions */
	113	#define IC_ENABLE_0B 0x0001
	114
	115	/* i2c status register definitions */
	116	#define IC_STATUS_SA 0x0040
	117	#define IC_STATUS_MA 0x0020
	118	#define IC_STATUS_RFF 0x0010
	119	#define IC_STATUS_RFNE 0x0008
	120	#define IC_STATUS_TFE 0x0004
	121	#define IC_STATUS_TFNF 0x0002
	122	#define IC_STATUS_ACT 0x0001
	123
	124	/* Speed Selection */
	125	#define IC_SPEED_MODE_STANDARD 1
	126	#define IC_SPEED_MODE_FAST 2
	127	#define IC_SPEED_MODE_MAX 3
	128
	129	#define I2C_MAX_SPEED 3400000
	130	#define I2C_FAST_SPEED 400000
	131	#define I2C_STANDARD_SPEED 100000
	132
031ed2fa	133	#endif /* __DW_I2C_H_ */