[people/ms/u-boot.git] / drivers / i2c / rk_i2c.c

/*
 * (C) Copyright 2015 Google, Inc
 *
 * (C) Copyright 2008-2014 Rockchip Electronics
 * Peter, Software Engineering, <superpeter.cai@gmail.com>.
 *
 * SPDX-License-Identifier:     GPL-2.0+
 */

#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/i2c.h>
#include <asm/arch/periph.h>
#include <dm/pinctrl.h>
#include <linux/sizes.h>

DECLARE_GLOBAL_DATA_PTR;

/* i2c timerout */
#define I2C_TIMEOUT_MS		100
#define I2C_RETRY_COUNT		3

/* rk i2c fifo max transfer bytes */
#define RK_I2C_FIFO_SIZE	32

struct rk_i2c {
	struct clk clk;
	struct i2c_regs *regs;
	unsigned int speed;
};

static inline void rk_i2c_get_div(int div, int *divh, int *divl)
{
	*divl = div / 2;
	if (div % 2 == 0)
		*divh = div / 2;
	else
		*divh = DIV_ROUND_UP(div, 2);
}

/*
 * SCL Divisor = 8 * (CLKDIVL+1 + CLKDIVH+1)
 * SCL = PCLK / SCLK Divisor
 * i2c_rate = PCLK
 */
static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate)
{
	uint32_t i2c_rate;
	int div, divl, divh;

	/* First get i2c rate from pclk */
	i2c_rate = clk_get_rate(&i2c->clk);

	div = DIV_ROUND_UP(i2c_rate, scl_rate * 8) - 2;
	divh = 0;
	divl = 0;
	if (div >= 0)
		rk_i2c_get_div(div, &divh, &divl);
	writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv);

	debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate,
	      scl_rate);
	debug("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl);
	debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv));
}

static void rk_i2c_show_regs(struct i2c_regs *regs)
{
#ifdef DEBUG
	uint i;

	debug("i2c_con: 0x%08x\n", readl(&regs->con));
	debug("i2c_clkdiv: 0x%08x\n", readl(&regs->clkdiv));
	debug("i2c_mrxaddr: 0x%08x\n", readl(&regs->mrxaddr));
	debug("i2c_mrxraddR: 0x%08x\n", readl(&regs->mrxraddr));
	debug("i2c_mtxcnt: 0x%08x\n", readl(&regs->mtxcnt));
	debug("i2c_mrxcnt: 0x%08x\n", readl(&regs->mrxcnt));
	debug("i2c_ien: 0x%08x\n", readl(&regs->ien));
	debug("i2c_ipd: 0x%08x\n", readl(&regs->ipd));
	debug("i2c_fcnt: 0x%08x\n", readl(&regs->fcnt));
	for (i = 0; i < 8; i++)
		debug("i2c_txdata%d: 0x%08x\n", i, readl(&regs->txdata[i]));
	for (i = 0; i < 8; i++)
		debug("i2c_rxdata%d: 0x%08x\n", i, readl(&regs->rxdata[i]));
#endif
}

static int rk_i2c_send_start_bit(struct rk_i2c *i2c)
{
	struct i2c_regs *regs = i2c->regs;
	ulong start;

	debug("I2c Send Start bit.\n");
	writel(I2C_IPD_ALL_CLEAN, &regs->ipd);

	writel(I2C_CON_EN | I2C_CON_START, &regs->con);
	writel(I2C_STARTIEN, &regs->ien);

	start = get_timer(0);
	while (1) {
		if (readl(&regs->ipd) & I2C_STARTIPD) {
			writel(I2C_STARTIPD, &regs->ipd);
			break;
		}
		if (get_timer(start) > I2C_TIMEOUT_MS) {
			debug("I2C Send Start Bit Timeout\n");
			rk_i2c_show_regs(regs);
			return -ETIMEDOUT;
		}
		udelay(1);
	}

	return 0;
}

static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)
{
	struct i2c_regs *regs = i2c->regs;
	ulong start;

	debug("I2c Send Stop bit.\n");
	writel(I2C_IPD_ALL_CLEAN, &regs->ipd);

	writel(I2C_CON_EN | I2C_CON_STOP, &regs->con);
	writel(I2C_CON_STOP, &regs->ien);

	start = get_timer(0);
	while (1) {
		if (readl(&regs->ipd) & I2C_STOPIPD) {
			writel(I2C_STOPIPD, &regs->ipd);
			break;
		}
		if (get_timer(start) > I2C_TIMEOUT_MS) {
			debug("I2C Send Start Bit Timeout\n");
			rk_i2c_show_regs(regs);
			return -ETIMEDOUT;
		}
		udelay(1);
	}

	return 0;
}

static inline void rk_i2c_disable(struct rk_i2c *i2c)
{
	writel(0, &i2c->regs->con);
}

static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
		       uchar *buf, uint b_len)
{
	struct i2c_regs *regs = i2c->regs;
	uchar *pbuf = buf;
	uint bytes_remain_len = b_len;
	uint bytes_xferred = 0;
	uint words_xferred = 0;
	ulong start;
	uint con = 0;
	uint rxdata;
	uint i, j;
	int err;

	debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
	      chip, reg, r_len, b_len);

	err = rk_i2c_send_start_bit(i2c);
	if (err)
		return err;

	writel(I2C_MRXADDR_SET(1, chip << 1 | 1), &regs->mrxaddr);
	if (r_len == 0) {
		writel(0, &regs->mrxraddr);
	} else if (r_len < 4) {
		writel(I2C_MRXRADDR_SET(r_len, reg), &regs->mrxraddr);
	} else {
		debug("I2C Read: addr len %d not supported\n", r_len);
		return -EIO;
	}

	while (bytes_remain_len) {
		if (bytes_remain_len > RK_I2C_FIFO_SIZE) {
			con = I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TRX);
			bytes_xferred = 32;
		} else {
			con = I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TRX) |
				I2C_CON_LASTACK;
			bytes_xferred = bytes_remain_len;
		}
		words_xferred = DIV_ROUND_UP(bytes_xferred, 4);

		writel(con, &regs->con);
		writel(bytes_xferred, &regs->mrxcnt);
		writel(I2C_MBRFIEN | I2C_NAKRCVIEN, &regs->ien);

		start = get_timer(0);
		while (1) {
			if (readl(&regs->ipd) & I2C_NAKRCVIPD) {
				writel(I2C_NAKRCVIPD, &regs->ipd);
				err = -EREMOTEIO;
			}
			if (readl(&regs->ipd) & I2C_MBRFIPD) {
				writel(I2C_MBRFIPD, &regs->ipd);
				break;
			}
			if (get_timer(start) > I2C_TIMEOUT_MS) {
				debug("I2C Read Data Timeout\n");
				err =  -ETIMEDOUT;
				rk_i2c_show_regs(regs);
				goto i2c_exit;
			}
			udelay(1);
		}

		for (i = 0; i < words_xferred; i++) {
			rxdata = readl(&regs->rxdata[i]);
			debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata);
			for (j = 0; j < 4; j++) {
				if ((i * 4 + j) == bytes_xferred)
					break;
				*pbuf++ = (rxdata >> (j * 8)) & 0xff;
			}
		}

		bytes_remain_len -= bytes_xferred;
		debug("I2C Read bytes_remain_len %d\n", bytes_remain_len);
	}

i2c_exit:
	rk_i2c_send_stop_bit(i2c);
	rk_i2c_disable(i2c);

	return err;
}

static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
			uchar *buf, uint b_len)
{
	struct i2c_regs *regs = i2c->regs;
	int err;
	uchar *pbuf = buf;
	uint bytes_remain_len = b_len + r_len + 1;
	uint bytes_xferred = 0;
	uint words_xferred = 0;
	ulong start;
	uint txdata;
	uint i, j;

	debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
	      chip, reg, r_len, b_len);
	err = rk_i2c_send_start_bit(i2c);
	if (err)
		return err;

	while (bytes_remain_len) {
		if (bytes_remain_len > RK_I2C_FIFO_SIZE)
			bytes_xferred = RK_I2C_FIFO_SIZE;
		else
			bytes_xferred = bytes_remain_len;
		words_xferred = DIV_ROUND_UP(bytes_xferred, 4);

		for (i = 0; i < words_xferred; i++) {
			txdata = 0;
			for (j = 0; j < 4; j++) {
				if ((i * 4 + j) == bytes_xferred)
					break;

				if (i == 0 && j == 0 && pbuf == buf) {
					txdata |= (chip << 1);
				} else if (i == 0 && j <= r_len && pbuf == buf) {
					txdata |= (reg &
						(0xff << ((j - 1) * 8))) << 8;
				} else {
					txdata |= (*pbuf++)<<(j * 8);
				}
			}
			writel(txdata, &regs->txdata[i]);
			debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata);
		}

		writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), &regs->con);
		writel(bytes_xferred, &regs->mtxcnt);
		writel(I2C_MBTFIEN | I2C_NAKRCVIEN, &regs->ien);

		start = get_timer(0);
		while (1) {
			if (readl(&regs->ipd) & I2C_NAKRCVIPD) {
				writel(I2C_NAKRCVIPD, &regs->ipd);
				err = -EREMOTEIO;
			}
			if (readl(&regs->ipd) & I2C_MBTFIPD) {
				writel(I2C_MBTFIPD, &regs->ipd);
				break;
			}
			if (get_timer(start) > I2C_TIMEOUT_MS) {
				debug("I2C Write Data Timeout\n");
				err =  -ETIMEDOUT;
				rk_i2c_show_regs(regs);
				goto i2c_exit;
			}
			udelay(1);
		}

		bytes_remain_len -= bytes_xferred;
		debug("I2C Write bytes_remain_len %d\n", bytes_remain_len);
	}

i2c_exit:
	rk_i2c_send_stop_bit(i2c);
	rk_i2c_disable(i2c);

	return err;
}

static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
			     int nmsgs)
{
	struct rk_i2c *i2c = dev_get_priv(bus);
	int ret;

	debug("i2c_xfer: %d messages\n", nmsgs);
	for (; nmsgs > 0; nmsgs--, msg++) {
		debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
		if (msg->flags & I2C_M_RD) {
			ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf,
					  msg->len);
		} else {
			ret = rk_i2c_write(i2c, msg->addr, 0, 0, msg->buf,
					   msg->len);
		}
		if (ret) {
			debug("i2c_write: error sending\n");
			return -EREMOTEIO;
		}
	}

	return 0;
}

int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
{
	struct rk_i2c *i2c = dev_get_priv(bus);

	rk_i2c_set_clk(i2c, speed);

	return 0;
}

static int rockchip_i2c_ofdata_to_platdata(struct udevice *bus)
{
	struct rk_i2c *priv = dev_get_priv(bus);
	int ret;

	ret = clk_get_by_index(bus, 0, &priv->clk);
	if (ret < 0) {
		debug("%s: Could not get clock for %s: %d\n", __func__,
		      bus->name, ret);
		return ret;
	}

	return 0;
}

static int rockchip_i2c_probe(struct udevice *bus)
{
	struct rk_i2c *priv = dev_get_priv(bus);

	priv->regs = (void *)devfdt_get_addr(bus);

	return 0;
}

static const struct dm_i2c_ops rockchip_i2c_ops = {
	.xfer		= rockchip_i2c_xfer,
	.set_bus_speed	= rockchip_i2c_set_bus_speed,
};

static const struct udevice_id rockchip_i2c_ids[] = {
	{ .compatible = "rockchip,rk3066-i2c" },
	{ .compatible = "rockchip,rk3188-i2c" },
	{ .compatible = "rockchip,rk3288-i2c" },
	{ .compatible = "rockchip,rk3399-i2c" },
	{ }
};

U_BOOT_DRIVER(i2c_rockchip) = {
	.name	= "i2c_rockchip",
	.id	= UCLASS_I2C,
	.of_match = rockchip_i2c_ids,
	.ofdata_to_platdata = rockchip_i2c_ofdata_to_platdata,
	.probe	= rockchip_i2c_probe,
	.priv_auto_alloc_size = sizeof(struct rk_i2c),
	.ops	= &rockchip_i2c_ops,
};
Commit	Line	Data
34374699 SG	1	/*
	2	* (C) Copyright 2015 Google, Inc
	3	*
	4	* (C) Copyright 2008-2014 Rockchip Electronics
	5	* Peter, Software Engineering, <superpeter.cai@gmail.com>.
	6	*
	7	* SPDX-License-Identifier: GPL-2.0+
	8	*/
	9
	10	#include <common.h>
	11	#include <clk.h>
	12	#include <dm.h>
	13	#include <errno.h>
	14	#include <i2c.h>
	15	#include <asm/io.h>
	16	#include <asm/arch/clock.h>
	17	#include <asm/arch/i2c.h>
	18	#include <asm/arch/periph.h>
	19	#include <dm/pinctrl.h>
	20	#include <linux/sizes.h>
	21
	22	DECLARE_GLOBAL_DATA_PTR;
	23
	24	/* i2c timerout */
	25	#define I2C_TIMEOUT_MS 100
	26	#define I2C_RETRY_COUNT 3
	27
	28	/* rk i2c fifo max transfer bytes */
	29	#define RK_I2C_FIFO_SIZE 32
	30
	31	struct rk_i2c {
135aa950	32	struct clk clk;
34374699 SG	33	struct i2c_regs *regs;
34374699 SG	34	unsigned int speed;
34374699 SG	35	};
	36
	37	static inline void rk_i2c_get_div(int div, int divh, int divl)
	38	{
	39	*divl = div / 2;
	40	if (div % 2 == 0)
	41	*divh = div / 2;
	42	else
	43	*divh = DIV_ROUND_UP(div, 2);
	44	}
	45
	46	/*
	47	* SCL Divisor = 8 * (CLKDIVL+1 + CLKDIVH+1)
	48	* SCL = PCLK / SCLK Divisor
	49	* i2c_rate = PCLK
	50	*/
	51	static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate)
	52	{
	53	uint32_t i2c_rate;
	54	int div, divl, divh;
	55
	56	/* First get i2c rate from pclk */
135aa950	57	i2c_rate = clk_get_rate(&i2c->clk);
34374699 SG	58
	59	div = DIV_ROUND_UP(i2c_rate, scl_rate * 8) - 2;
	60	divh = 0;
	61	divl = 0;
	62	if (div >= 0)
	63	rk_i2c_get_div(div, &divh, &divl);
	64	writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv);
	65
	66	debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate,
	67	scl_rate);
	68	debug("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl);
	69	debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv));
	70	}
	71
	72	static void rk_i2c_show_regs(struct i2c_regs *regs)
	73	{
	74	#ifdef DEBUG
	75	uint i;
	76
	77	debug("i2c_con: 0x%08x\n", readl(&regs->con));
	78	debug("i2c_clkdiv: 0x%08x\n", readl(&regs->clkdiv));
	79	debug("i2c_mrxaddr: 0x%08x\n", readl(&regs->mrxaddr));
	80	debug("i2c_mrxraddR: 0x%08x\n", readl(&regs->mrxraddr));
	81	debug("i2c_mtxcnt: 0x%08x\n", readl(&regs->mtxcnt));
	82	debug("i2c_mrxcnt: 0x%08x\n", readl(&regs->mrxcnt));
	83	debug("i2c_ien: 0x%08x\n", readl(&regs->ien));
	84	debug("i2c_ipd: 0x%08x\n", readl(&regs->ipd));
	85	debug("i2c_fcnt: 0x%08x\n", readl(&regs->fcnt));
	86	for (i = 0; i < 8; i++)
	87	debug("i2c_txdata%d: 0x%08x\n", i, readl(&regs->txdata[i]));
	88	for (i = 0; i < 8; i++)
	89	debug("i2c_rxdata%d: 0x%08x\n", i, readl(&regs->rxdata[i]));
	90	#endif
	91	}
	92
	93	static int rk_i2c_send_start_bit(struct rk_i2c *i2c)
	94	{
	95	struct i2c_regs *regs = i2c->regs;
	96	ulong start;
	97
	98	debug("I2c Send Start bit.\n");
	99	writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
	100
	101	writel(I2C_CON_EN \| I2C_CON_START, &regs->con);
	102	writel(I2C_STARTIEN, &regs->ien);
	103
	104	start = get_timer(0);
	105	while (1) {
	106	if (readl(&regs->ipd) & I2C_STARTIPD) {
	107	writel(I2C_STARTIPD, &regs->ipd);
	108	break;
	109	}
	110	if (get_timer(start) > I2C_TIMEOUT_MS) {
	111	debug("I2C Send Start Bit Timeout\n");
	112	rk_i2c_show_regs(regs);
	113	return -ETIMEDOUT;
	114	}
	115	udelay(1);
	116	}
	117
	118	return 0;
	119	}
	120
	121	static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)
122	{
123	struct i2c_regs *regs = i2c->regs;
124	ulong start;
125
126	debug("I2c Send Stop bit.\n");
127	writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
128
129	writel(I2C_CON_EN \| I2C_CON_STOP, &regs->con);
130	writel(I2C_CON_STOP, &regs->ien);
131
132	start = get_timer(0);
133	while (1) {
134	if (readl(&regs->ipd) & I2C_STOPIPD) {
135	writel(I2C_STOPIPD, &regs->ipd);
136	break;
137	}
138	if (get_timer(start) > I2C_TIMEOUT_MS) {
139	debug("I2C Send Start Bit Timeout\n");
140	rk_i2c_show_regs(regs);
141	return -ETIMEDOUT;
142	}
143	udelay(1);
144	}
145
146	return 0;
147	}
148
149	static inline void rk_i2c_disable(struct rk_i2c *i2c)
150	{
151	writel(0, &i2c->regs->con);
152	}
153
154	static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
155	uchar *buf, uint b_len)
156	{
157	struct i2c_regs *regs = i2c->regs;
158	uchar *pbuf = buf;
159	uint bytes_remain_len = b_len;
160	uint bytes_xferred = 0;
161	uint words_xferred = 0;
162	ulong start;
163	uint con = 0;
164	uint rxdata;
165	uint i, j;
166	int err;
167
168	debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
169	chip, reg, r_len, b_len);
170
171	err = rk_i2c_send_start_bit(i2c);
172	if (err)
173	return err;
174
175	writel(I2C_MRXADDR_SET(1, chip << 1 \| 1), &regs->mrxaddr);
176	if (r_len == 0) {
177	writel(0, &regs->mrxraddr);
178	} else if (r_len < 4) {
179	writel(I2C_MRXRADDR_SET(r_len, reg), &regs->mrxraddr);
180	} else {
181	debug("I2C Read: addr len %d not supported\n", r_len);
182	return -EIO;
183	}
184
185	while (bytes_remain_len) {
186	if (bytes_remain_len > RK_I2C_FIFO_SIZE) {
187	con = I2C_CON_EN \| I2C_CON_MOD(I2C_MODE_TRX);
188	bytes_xferred = 32;
189	} else {
190	con = I2C_CON_EN \| I2C_CON_MOD(I2C_MODE_TRX) \|
191	I2C_CON_LASTACK;
192	bytes_xferred = bytes_remain_len;
193	}
194	words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
195
196	writel(con, &regs->con);
197	writel(bytes_xferred, &regs->mrxcnt);
198	writel(I2C_MBRFIEN \| I2C_NAKRCVIEN, &regs->ien);
199
200	start = get_timer(0);
201	while (1) {
202	if (readl(&regs->ipd) & I2C_NAKRCVIPD) {
203	writel(I2C_NAKRCVIPD, &regs->ipd);
204	err = -EREMOTEIO;
205	}
206	if (readl(&regs->ipd) & I2C_MBRFIPD) {
207	writel(I2C_MBRFIPD, &regs->ipd);
208	break;
209	}
210	if (get_timer(start) > I2C_TIMEOUT_MS) {
211	debug("I2C Read Data Timeout\n");
212	err = -ETIMEDOUT;
213	rk_i2c_show_regs(regs);
214	goto i2c_exit;
215	}
216	udelay(1);
217	}
218
219	for (i = 0; i < words_xferred; i++) {
220	rxdata = readl(&regs->rxdata[i]);
221	debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata);
222	for (j = 0; j < 4; j++) {
223	if ((i * 4 + j) == bytes_xferred)
224	break;
225	pbuf++ = (rxdata >> (j 8)) & 0xff;
226	}
227	}
228
229	bytes_remain_len -= bytes_xferred;
230	debug("I2C Read bytes_remain_len %d\n", bytes_remain_len);
231	}
232
233	i2c_exit:
234	rk_i2c_send_stop_bit(i2c);
235	rk_i2c_disable(i2c);
236
237	return err;
238	}
239
240	static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
241	uchar *buf, uint b_len)
242	{
243	struct i2c_regs *regs = i2c->regs;
244	int err;
245	uchar *pbuf = buf;
246	uint bytes_remain_len = b_len + r_len + 1;
247	uint bytes_xferred = 0;
248	uint words_xferred = 0;
249	ulong start;
250	uint txdata;
251	uint i, j;
252
253	debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
254	chip, reg, r_len, b_len);
255	err = rk_i2c_send_start_bit(i2c);
256	if (err)
257	return err;
258
259	while (bytes_remain_len) {
260	if (bytes_remain_len > RK_I2C_FIFO_SIZE)
80333fd8	261	bytes_xferred = RK_I2C_FIFO_SIZE;
34374699 SG	262	else
	263	bytes_xferred = bytes_remain_len;
	264	words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
	265
	266	for (i = 0; i < words_xferred; i++) {
	267	txdata = 0;
	268	for (j = 0; j < 4; j++) {
	269	if ((i * 4 + j) == bytes_xferred)
	270	break;
	271
21d4b7d4	272	if (i == 0 && j == 0 && pbuf == buf) {
34374699	273	txdata \|= (chip << 1);
21d4b7d4	274	} else if (i == 0 && j <= r_len && pbuf == buf) {
34374699 SG	275	txdata \|= (reg &
	276	(0xff << ((j - 1) * 8))) << 8;
	277	} else {
	278	txdata \|= (pbuf++)<<(j 8);
	279	}
34374699	280	}
551288bd JK	281	writel(txdata, &regs->txdata[i]);
551288bd JK	282	debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata);
34374699 SG	283	}
	284
	285	writel(I2C_CON_EN \| I2C_CON_MOD(I2C_MODE_TX), &regs->con);
	286	writel(bytes_xferred, &regs->mtxcnt);
	287	writel(I2C_MBTFIEN \| I2C_NAKRCVIEN, &regs->ien);
	288
	289	start = get_timer(0);
	290	while (1) {
	291	if (readl(&regs->ipd) & I2C_NAKRCVIPD) {
	292	writel(I2C_NAKRCVIPD, &regs->ipd);
	293	err = -EREMOTEIO;
	294	}
	295	if (readl(&regs->ipd) & I2C_MBTFIPD) {
	296	writel(I2C_MBTFIPD, &regs->ipd);
	297	break;
	298	}
	299	if (get_timer(start) > I2C_TIMEOUT_MS) {
	300	debug("I2C Write Data Timeout\n");
	301	err = -ETIMEDOUT;
	302	rk_i2c_show_regs(regs);
	303	goto i2c_exit;
	304	}
	305	udelay(1);
	306	}
	307
	308	bytes_remain_len -= bytes_xferred;
	309	debug("I2C Write bytes_remain_len %d\n", bytes_remain_len);
	310	}
	311
	312	i2c_exit:
	313	rk_i2c_send_stop_bit(i2c);
	314	rk_i2c_disable(i2c);
	315
	316	return err;
	317	}
	318
	319	static int rockchip_i2c_xfer(struct udevice bus, struct i2c_msg msg,
	320	int nmsgs)
	321	{
	322	struct rk_i2c *i2c = dev_get_priv(bus);
	323	int ret;
	324
	325	debug("i2c_xfer: %d messages\n", nmsgs);
	326	for (; nmsgs > 0; nmsgs--, msg++) {
	327	debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
	328	if (msg->flags & I2C_M_RD) {
	329	ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf,
	330	msg->len);
	331	} else {
	332	ret = rk_i2c_write(i2c, msg->addr, 0, 0, msg->buf,
	333	msg->len);
	334	}
	335	if (ret) {
	336	debug("i2c_write: error sending\n");
	337	return -EREMOTEIO;
	338	}
	339	}
	340
	341	return 0;
	342	}
	343
	344	int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
	345	{
	346	struct rk_i2c *i2c = dev_get_priv(bus);
347
348	rk_i2c_set_clk(i2c, speed);
349
350	return 0;
351	}
352
930bc374	353	static int rockchip_i2c_ofdata_to_platdata(struct udevice *bus)
34374699	354	{
930bc374	355	struct rk_i2c *priv = dev_get_priv(bus);
34374699 SG	356	int ret;
34374699 SG	357
930bc374 SG	358	ret = clk_get_by_index(bus, 0, &priv->clk);
	359	if (ret < 0) {
	360	debug("%s: Could not get clock for %s: %d\n", __func__,
	361	bus->name, ret);
34374699	362	return ret;
930bc374	363	}
930bc374 SG	364
	365	return 0;
	366	}
	367
	368	static int rockchip_i2c_probe(struct udevice *bus)
	369	{
	370	struct rk_i2c *priv = dev_get_priv(bus);
	371
a821c4af	372	priv->regs = (void *)devfdt_get_addr(bus);
930bc374 SG	373
930bc374 SG	374	return 0;
34374699 SG	375	}
	376
	377	static const struct dm_i2c_ops rockchip_i2c_ops = {
	378	.xfer = rockchip_i2c_xfer,
	379	.set_bus_speed = rockchip_i2c_set_bus_speed,
	380	};
	381
	382	static const struct udevice_id rockchip_i2c_ids[] = {
02a7d833 HS	383	{ .compatible = "rockchip,rk3066-i2c" },
02a7d833 HS	384	{ .compatible = "rockchip,rk3188-i2c" },
34374699	385	{ .compatible = "rockchip,rk3288-i2c" },
b644354a	386	{ .compatible = "rockchip,rk3399-i2c" },
34374699 SG	387	{ }
	388	};
	389
	390	U_BOOT_DRIVER(i2c_rockchip) = {
	391	.name = "i2c_rockchip",
	392	.id = UCLASS_I2C,
	393	.of_match = rockchip_i2c_ids,
930bc374	394	.ofdata_to_platdata = rockchip_i2c_ofdata_to_platdata,
34374699 SG	395	.probe = rockchip_i2c_probe,
	396	.priv_auto_alloc_size = sizeof(struct rk_i2c),
	397	.ops = &rockchip_i2c_ops,
	398	};