[people/ms/u-boot.git] / drivers / misc / ds4510.c

/*
 * Copyright 2008 Extreme Engineering Solutions, Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0
 */

/*
 * Driver for DS4510, a CPU supervisor with integrated EEPROM, SRAM,
 * and 4 programmable non-volatile GPIO pins.
 */

#include <common.h>
#include <i2c.h>
#include <command.h>
#include "ds4510.h"

/* Default to an address that hopefully won't corrupt other i2c devices */
#ifndef CONFIG_SYS_I2C_DS4510_ADDR
#define CONFIG_SYS_I2C_DS4510_ADDR	(~0)
#endif

enum {
	DS4510_CMD_INFO,
	DS4510_CMD_DEVICE,
	DS4510_CMD_NV,
	DS4510_CMD_RSTDELAY,
	DS4510_CMD_OUTPUT,
	DS4510_CMD_INPUT,
	DS4510_CMD_PULLUP,
	DS4510_CMD_EEPROM,
	DS4510_CMD_SEEPROM,
	DS4510_CMD_SRAM,
};

/*
 * Write to DS4510, taking page boundaries into account
 */
static int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)
{
	int wrlen;
	int i = 0;

	do {
		wrlen = DS4510_EEPROM_PAGE_SIZE -
			DS4510_EEPROM_PAGE_OFFSET(offset);
		if (count < wrlen)
			wrlen = count;
		if (i2c_write(chip, offset, 1, &buf[i], wrlen))
			return -1;

		/*
		 * This delay isn't needed for SRAM writes but shouldn't delay
		 * things too much, so do it unconditionally for simplicity
		 */
		udelay(DS4510_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
		count -= wrlen;
		offset += wrlen;
		i += wrlen;
	} while (count > 0);

	return 0;
}

/*
 * General read from DS4510
 */
static int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count)
{
	return i2c_read(chip, offset, 1, buf, count);
}

/*
 * Write SEE bit in config register.
 * nv = 0 - Writes to SEEPROM registers behave like EEPROM
 * nv = 1 - Writes to SEEPROM registers behave like SRAM
 */
static int ds4510_see_write(uint8_t chip, uint8_t nv)
{
	uint8_t data;

	if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
		return -1;

	if (nv)	/* Treat SEEPROM bits as EEPROM */
		data &= ~DS4510_CFG_SEE;
	else	/* Treat SEEPROM bits as SRAM */
		data |= DS4510_CFG_SEE;

	return ds4510_mem_write(chip, DS4510_CFG, &data, 1);
}

/*
 * Write de-assertion of reset signal delay
 */
static int ds4510_rstdelay_write(uint8_t chip, uint8_t delay)
{
	uint8_t data;

	if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1))
		return -1;

	data &= ~DS4510_RSTDELAY_MASK;
	data |= delay & DS4510_RSTDELAY_MASK;

	return ds4510_mem_write(chip, DS4510_RSTDELAY, &data, 1);
}

/*
 * Write pullup characteristics of IO pins
 */
static int ds4510_pullup_write(uint8_t chip, uint8_t val)
{
	val &= DS4510_IO_MASK;

	return ds4510_mem_write(chip, DS4510_PULLUP, (uint8_t *)&val, 1);
}

/*
 * Read pullup characteristics of IO pins
 */
static int ds4510_pullup_read(uint8_t chip)
{
	uint8_t val;

	if (i2c_read(chip, DS4510_PULLUP, 1, &val, 1))
		return -1;

	return val & DS4510_IO_MASK;
}

/*
 * Write drive level of IO pins
 */
static int ds4510_gpio_write(uint8_t chip, uint8_t val)
{
	uint8_t data;
	int i;

	for (i = 0; i < DS4510_NUM_IO; i++) {
		if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1))
			return -1;

		if (val & (0x1 << i))
			data |= 0x1;
		else
			data &= ~0x1;

		if (ds4510_mem_write(chip, DS4510_IO0 - i, &data, 1))
			return -1;
	}

	return 0;
}

/*
 * Read drive level of IO pins
 */
static int ds4510_gpio_read(uint8_t chip)
{
	uint8_t data;
	int val = 0;
	int i;

	for (i = 0; i < DS4510_NUM_IO; i++) {
		if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1))
			return -1;

		if (data & 1)
			val |= (1 << i);
	}

	return val;
}

/*
 * Read physical level of IO pins
 */
static int ds4510_gpio_read_val(uint8_t chip)
{
	uint8_t val;

	if (i2c_read(chip, DS4510_IO_STATUS, 1, &val, 1))
		return -1;

	return val & DS4510_IO_MASK;
}

/*
 * Display DS4510 information
 */
static int ds4510_info(uint8_t chip)
{
	int i;
	int tmp;
	uint8_t data;

	printf("DS4510 @ 0x%x:\n\n", chip);

	if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1))
		return -1;
	printf("rstdelay = 0x%x\n\n", data & DS4510_RSTDELAY_MASK);

	if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
		return -1;
	printf("config   = 0x%x\n", data);
	printf(" /ready  = %d\n", data & DS4510_CFG_READY ? 1 : 0);
	printf(" trip pt = %d\n", data & DS4510_CFG_TRIP_POINT ? 1 : 0);
	printf(" rst sts = %d\n", data & DS4510_CFG_RESET ? 1 : 0);
	printf(" /see    = %d\n", data & DS4510_CFG_SEE ? 1 : 0);
	printf(" swrst   = %d\n\n", data & DS4510_CFG_SWRST ? 1 : 0);

	printf("gpio pins: 3210\n");
	printf("---------------\n");
	printf("pullup     ");

	tmp = ds4510_pullup_read(chip);
	if (tmp == -1)
		return tmp;
	for (i = DS4510_NUM_IO - 1; i >= 0; i--)
		printf("%d", (tmp & (1 << i)) ? 1 : 0);
	printf("\n");

	printf("driven     ");
	tmp = ds4510_gpio_read(chip);
	if (tmp == -1)
		return -1;
	for (i = DS4510_NUM_IO - 1; i >= 0; i--)
		printf("%d", (tmp & (1 << i)) ? 1 : 0);
	printf("\n");

	printf("read       ");
	tmp = ds4510_gpio_read_val(chip);
	if (tmp == -1)
		return -1;
	for (i = DS4510_NUM_IO - 1; i >= 0; i--)
		printf("%d", (tmp & (1 << i)) ? 1 : 0);
	printf("\n");

	return 0;
}

cmd_tbl_t cmd_ds4510[] = {
	U_BOOT_CMD_MKENT(device, 3, 0, (void *)DS4510_CMD_DEVICE, "", ""),
	U_BOOT_CMD_MKENT(nv, 3, 0, (void *)DS4510_CMD_NV, "", ""),
	U_BOOT_CMD_MKENT(output, 4, 0, (void *)DS4510_CMD_OUTPUT, "", ""),
	U_BOOT_CMD_MKENT(input, 3, 0, (void *)DS4510_CMD_INPUT, "", ""),
	U_BOOT_CMD_MKENT(pullup, 4, 0, (void *)DS4510_CMD_PULLUP, "", ""),
	U_BOOT_CMD_MKENT(info, 2, 0, (void *)DS4510_CMD_INFO, "", ""),
	U_BOOT_CMD_MKENT(rstdelay, 3, 0, (void *)DS4510_CMD_RSTDELAY, "", ""),
	U_BOOT_CMD_MKENT(eeprom, 6, 0, (void *)DS4510_CMD_EEPROM, "", ""),
	U_BOOT_CMD_MKENT(seeprom, 6, 0, (void *)DS4510_CMD_SEEPROM, "", ""),
	U_BOOT_CMD_MKENT(sram, 6, 0, (void *)DS4510_CMD_SRAM, "", ""),
};

int do_ds4510(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	static uint8_t chip = CONFIG_SYS_I2C_DS4510_ADDR;
	cmd_tbl_t *c;
	ulong ul_arg2 = 0;
	ulong ul_arg3 = 0;
	int tmp;
	ulong addr;
	ulong off;
	ulong cnt;
	int end;
	int (*rw_func)(uint8_t, int, uint8_t *, int);

	c = find_cmd_tbl(argv[1], cmd_ds4510, ARRAY_SIZE(cmd_ds4510));

	/* All commands but "device" require 'maxargs' arguments */
	if (!c || !((argc == (c->maxargs)) ||
		(((int)c->cmd == DS4510_CMD_DEVICE) &&
		 (argc == (c->maxargs - 1))))) {
		return cmd_usage(cmdtp);
	}

	/* arg2 used as chip addr and pin number */
	if (argc > 2)
		ul_arg2 = simple_strtoul(argv[2], NULL, 16);

	/* arg3 used as output/pullup value */
	if (argc > 3)
		ul_arg3 = simple_strtoul(argv[3], NULL, 16);

	switch ((int)c->cmd) {
	case DS4510_CMD_DEVICE:
		if (argc == 3)
			chip = ul_arg2;
		printf("Current device address: 0x%x\n", chip);
		return 0;
	case DS4510_CMD_NV:
		return ds4510_see_write(chip, ul_arg2);
	case DS4510_CMD_OUTPUT:
		tmp = ds4510_gpio_read(chip);
		if (tmp == -1)
			return -1;
		if (ul_arg3)
			tmp |= (1 << ul_arg2);
		else
			tmp &= ~(1 << ul_arg2);
		return ds4510_gpio_write(chip, tmp);
	case DS4510_CMD_INPUT:
		tmp = ds4510_gpio_read_val(chip);
		if (tmp == -1)
			return -1;
		return (tmp & (1 << ul_arg2)) != 0;
	case DS4510_CMD_PULLUP:
		tmp = ds4510_pullup_read(chip);
		if (tmp == -1)
			return -1;
		if (ul_arg3)
			tmp |= (1 << ul_arg2);
		else
			tmp &= ~(1 << ul_arg2);
		return ds4510_pullup_write(chip, tmp);
	case DS4510_CMD_INFO:
		return ds4510_info(chip);
	case DS4510_CMD_RSTDELAY:
		return ds4510_rstdelay_write(chip, ul_arg2);
	case DS4510_CMD_EEPROM:
		end = DS4510_EEPROM + DS4510_EEPROM_SIZE;
		off = DS4510_EEPROM;
		break;
	case DS4510_CMD_SEEPROM:
		end = DS4510_SEEPROM + DS4510_SEEPROM_SIZE;
		off = DS4510_SEEPROM;
		break;
	case DS4510_CMD_SRAM:
		end = DS4510_SRAM + DS4510_SRAM_SIZE;
		off = DS4510_SRAM;
		break;
	default:
		/* We should never get here... */
		return 1;
	}

	/* Only eeprom, seeprom, and sram commands should make it here */
	if (strcmp(argv[2], "read") == 0)
		rw_func = ds4510_mem_read;
	else if (strcmp(argv[2], "write") == 0)
		rw_func = ds4510_mem_write;
	else
		return cmd_usage(cmdtp);

	addr = simple_strtoul(argv[3], NULL, 16);
	off += simple_strtoul(argv[4], NULL, 16);
	cnt = simple_strtoul(argv[5], NULL, 16);

	if ((off + cnt) > end) {
		printf("ERROR: invalid len\n");
		return -1;
	}

	return rw_func(chip, off, (uint8_t *)addr, cnt);
}

U_BOOT_CMD(
	ds4510,	6,	1,	do_ds4510,
	"ds4510 eeprom/seeprom/sram/gpio access",
	"device [dev]\n"
	"	- show or set current device address\n"
	"ds4510 info\n"
	"	- display ds4510 info\n"
	"ds4510 output pin 0|1\n"
	"	- set pin low or high-Z\n"
	"ds4510 input pin\n"
	"	- read value of pin\n"
	"ds4510 pullup pin 0|1\n"
	"	- disable/enable pullup on specified pin\n"
	"ds4510 nv 0|1\n"
	"	- make gpio and seeprom writes volatile/non-volatile"
	"\n"
	"ds4510 rstdelay 0-3\n"
	"	- set reset output delay"
	"\n"
	"ds4510 eeprom read addr off cnt\n"
	"ds4510 eeprom write addr off cnt\n"
	"	- read/write 'cnt' bytes at EEPROM offset 'off'\n"
	"ds4510 seeprom read addr off cnt\n"
	"ds4510 seeprom write addr off cnt\n"
	"	- read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n"
	"ds4510 sram read addr off cnt\n"
	"ds4510 sram write addr off cnt\n"
	"	- read/write 'cnt' bytes at SRAM offset 'off'"
);
Commit	Line	Data
a7c93104 PT	1	/*
	2	* Copyright 2008 Extreme Engineering Solutions, Inc.
	3	*
5b8031cc	4	* SPDX-License-Identifier: GPL-2.0
a7c93104 PT	5	*/
	6
	7	/*
	8	* Driver for DS4510, a CPU supervisor with integrated EEPROM, SRAM,
	9	* and 4 programmable non-volatile GPIO pins.
	10	*/
	11
	12	#include <common.h>
	13	#include <i2c.h>
	14	#include <command.h>
1136eb5e	15	#include "ds4510.h"
a7c93104 PT	16
	17	/* Default to an address that hopefully won't corrupt other i2c devices */
	18	#ifndef CONFIG_SYS_I2C_DS4510_ADDR
	19	#define CONFIG_SYS_I2C_DS4510_ADDR (~0)
	20	#endif
	21
	22	enum {
	23	DS4510_CMD_INFO,
	24	DS4510_CMD_DEVICE,
	25	DS4510_CMD_NV,
	26	DS4510_CMD_RSTDELAY,
	27	DS4510_CMD_OUTPUT,
	28	DS4510_CMD_INPUT,
	29	DS4510_CMD_PULLUP,
	30	DS4510_CMD_EEPROM,
	31	DS4510_CMD_SEEPROM,
	32	DS4510_CMD_SRAM,
	33	};
	34
	35	/*
	36	* Write to DS4510, taking page boundaries into account
	37	*/
1136eb5e	38	static int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)
a7c93104 PT	39	{
	40	int wrlen;
	41	int i = 0;
	42
	43	do {
	44	wrlen = DS4510_EEPROM_PAGE_SIZE -
	45	DS4510_EEPROM_PAGE_OFFSET(offset);
	46	if (count < wrlen)
	47	wrlen = count;
	48	if (i2c_write(chip, offset, 1, &buf[i], wrlen))
	49	return -1;
	50
	51	/*
	52	* This delay isn't needed for SRAM writes but shouldn't delay
	53	* things too much, so do it unconditionally for simplicity
	54	*/
	55	udelay(DS4510_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
	56	count -= wrlen;
	57	offset += wrlen;
	58	i += wrlen;
	59	} while (count > 0);
	60
	61	return 0;
	62	}
	63
	64	/*
	65	* General read from DS4510
	66	*/
1136eb5e	67	static int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count)
a7c93104 PT	68	{
	69	return i2c_read(chip, offset, 1, buf, count);
	70	}
	71
	72	/*
	73	* Write SEE bit in config register.
	74	* nv = 0 - Writes to SEEPROM registers behave like EEPROM
	75	* nv = 1 - Writes to SEEPROM registers behave like SRAM
	76	*/
1136eb5e	77	static int ds4510_see_write(uint8_t chip, uint8_t nv)
a7c93104 PT	78	{
	79	uint8_t data;
	80
	81	if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
	82	return -1;
	83
	84	if (nv) /* Treat SEEPROM bits as EEPROM */
	85	data &= ~DS4510_CFG_SEE;
	86	else /* Treat SEEPROM bits as SRAM */
	87	data \|= DS4510_CFG_SEE;
	88
	89	return ds4510_mem_write(chip, DS4510_CFG, &data, 1);
	90	}
	91
	92	/*
	93	* Write de-assertion of reset signal delay
	94	*/
1136eb5e	95	static int ds4510_rstdelay_write(uint8_t chip, uint8_t delay)
a7c93104 PT	96	{
	97	uint8_t data;
	98
	99	if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1))
	100	return -1;
	101
	102	data &= ~DS4510_RSTDELAY_MASK;
	103	data \|= delay & DS4510_RSTDELAY_MASK;
	104
	105	return ds4510_mem_write(chip, DS4510_RSTDELAY, &data, 1);
	106	}
	107
	108	/*
	109	* Write pullup characteristics of IO pins
	110	*/
1136eb5e	111	static int ds4510_pullup_write(uint8_t chip, uint8_t val)
a7c93104 PT	112	{
	113	val &= DS4510_IO_MASK;
	114
	115	return ds4510_mem_write(chip, DS4510_PULLUP, (uint8_t *)&val, 1);
	116	}
	117
	118	/*
	119	* Read pullup characteristics of IO pins
	120	*/
1136eb5e	121	static int ds4510_pullup_read(uint8_t chip)
a7c93104 PT	122	{
	123	uint8_t val;
	124
	125	if (i2c_read(chip, DS4510_PULLUP, 1, &val, 1))
	126	return -1;
	127
	128	return val & DS4510_IO_MASK;
	129	}
	130
	131	/*
	132	* Write drive level of IO pins
	133	*/
1136eb5e	134	static int ds4510_gpio_write(uint8_t chip, uint8_t val)
a7c93104 PT	135	{
	136	uint8_t data;
	137	int i;
	138
	139	for (i = 0; i < DS4510_NUM_IO; i++) {
	140	if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1))
	141	return -1;
	142
	143	if (val & (0x1 << i))
	144	data \|= 0x1;
	145	else
	146	data &= ~0x1;
	147
	148	if (ds4510_mem_write(chip, DS4510_IO0 - i, &data, 1))
	149	return -1;
	150	}
	151
	152	return 0;
	153	}
	154
	155	/*
	156	* Read drive level of IO pins
	157	*/
1136eb5e	158	static int ds4510_gpio_read(uint8_t chip)
a7c93104 PT	159	{
	160	uint8_t data;
	161	int val = 0;
	162	int i;
	163
	164	for (i = 0; i < DS4510_NUM_IO; i++) {
	165	if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1))
	166	return -1;
	167
	168	if (data & 1)
	169	val \|= (1 << i);
	170	}
	171
	172	return val;
	173	}
	174
	175	/*
	176	* Read physical level of IO pins
	177	*/
1136eb5e	178	static int ds4510_gpio_read_val(uint8_t chip)
a7c93104 PT	179	{
	180	uint8_t val;
	181
	182	if (i2c_read(chip, DS4510_IO_STATUS, 1, &val, 1))
	183	return -1;
	184
	185	return val & DS4510_IO_MASK;
	186	}
	187
a7c93104 PT	188	/*
	189	* Display DS4510 information
	190	*/
	191	static int ds4510_info(uint8_t chip)
	192	{
	193	int i;
	194	int tmp;
	195	uint8_t data;
	196
	197	printf("DS4510 @ 0x%x:\n\n", chip);
	198
	199	if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1))
	200	return -1;
	201	printf("rstdelay = 0x%x\n\n", data & DS4510_RSTDELAY_MASK);
	202
	203	if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
	204	return -1;
	205	printf("config = 0x%x\n", data);
	206	printf(" /ready = %d\n", data & DS4510_CFG_READY ? 1 : 0);
	207	printf(" trip pt = %d\n", data & DS4510_CFG_TRIP_POINT ? 1 : 0);
	208	printf(" rst sts = %d\n", data & DS4510_CFG_RESET ? 1 : 0);
	209	printf(" /see = %d\n", data & DS4510_CFG_SEE ? 1 : 0);
	210	printf(" swrst = %d\n\n", data & DS4510_CFG_SWRST ? 1 : 0);
	211
	212	printf("gpio pins: 3210\n");
	213	printf("---------------\n");
	214	printf("pullup ");
	215
	216	tmp = ds4510_pullup_read(chip);
	217	if (tmp == -1)
	218	return tmp;
	219	for (i = DS4510_NUM_IO - 1; i >= 0; i--)
	220	printf("%d", (tmp & (1 << i)) ? 1 : 0);
	221	printf("\n");
	222
	223	printf("driven ");
	224	tmp = ds4510_gpio_read(chip);
	225	if (tmp == -1)
	226	return -1;
	227	for (i = DS4510_NUM_IO - 1; i >= 0; i--)
	228	printf("%d", (tmp & (1 << i)) ? 1 : 0);
	229	printf("\n");
	230
	231	printf("read ");
	232	tmp = ds4510_gpio_read_val(chip);
	233	if (tmp == -1)
	234	return -1;
	235	for (i = DS4510_NUM_IO - 1; i >= 0; i--)
	236	printf("%d", (tmp & (1 << i)) ? 1 : 0);
	237	printf("\n");
	238
	239	return 0;
	240	}
a7c93104 PT	241
	242	cmd_tbl_t cmd_ds4510[] = {
	243	U_BOOT_CMD_MKENT(device, 3, 0, (void *)DS4510_CMD_DEVICE, "", ""),
	244	U_BOOT_CMD_MKENT(nv, 3, 0, (void *)DS4510_CMD_NV, "", ""),
	245	U_BOOT_CMD_MKENT(output, 4, 0, (void *)DS4510_CMD_OUTPUT, "", ""),
	246	U_BOOT_CMD_MKENT(input, 3, 0, (void *)DS4510_CMD_INPUT, "", ""),
	247	U_BOOT_CMD_MKENT(pullup, 4, 0, (void *)DS4510_CMD_PULLUP, "", ""),
a7c93104	248	U_BOOT_CMD_MKENT(info, 2, 0, (void *)DS4510_CMD_INFO, "", ""),
a7c93104	249	U_BOOT_CMD_MKENT(rstdelay, 3, 0, (void *)DS4510_CMD_RSTDELAY, "", ""),
a7c93104 PT	250	U_BOOT_CMD_MKENT(eeprom, 6, 0, (void *)DS4510_CMD_EEPROM, "", ""),
	251	U_BOOT_CMD_MKENT(seeprom, 6, 0, (void *)DS4510_CMD_SEEPROM, "", ""),
	252	U_BOOT_CMD_MKENT(sram, 6, 0, (void *)DS4510_CMD_SRAM, "", ""),
a7c93104 PT	253	};
a7c93104 PT	254
54841ab5	255	int do_ds4510(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
a7c93104 PT	256	{
	257	static uint8_t chip = CONFIG_SYS_I2C_DS4510_ADDR;
	258	cmd_tbl_t *c;
	259	ulong ul_arg2 = 0;
	260	ulong ul_arg3 = 0;
	261	int tmp;
a7c93104 PT	262	ulong addr;
	263	ulong off;
	264	ulong cnt;
	265	int end;
	266	int (rw_func)(uint8_t, int, uint8_t , int);
a7c93104 PT	267
	268	c = find_cmd_tbl(argv[1], cmd_ds4510, ARRAY_SIZE(cmd_ds4510));
	269
	270	/* All commands but "device" require 'maxargs' arguments */
	271	if (!c \|\| !((argc == (c->maxargs)) \|\|
	272	(((int)c->cmd == DS4510_CMD_DEVICE) &&
	273	(argc == (c->maxargs - 1))))) {
47e26b1b	274	return cmd_usage(cmdtp);
a7c93104 PT	275	}
	276
	277	/* arg2 used as chip addr and pin number */
	278	if (argc > 2)
	279	ul_arg2 = simple_strtoul(argv[2], NULL, 16);
	280
	281	/* arg3 used as output/pullup value */
	282	if (argc > 3)
	283	ul_arg3 = simple_strtoul(argv[3], NULL, 16);
	284
	285	switch ((int)c->cmd) {
	286	case DS4510_CMD_DEVICE:
	287	if (argc == 3)
	288	chip = ul_arg2;
	289	printf("Current device address: 0x%x\n", chip);
	290	return 0;
	291	case DS4510_CMD_NV:
	292	return ds4510_see_write(chip, ul_arg2);
	293	case DS4510_CMD_OUTPUT:
	294	tmp = ds4510_gpio_read(chip);
	295	if (tmp == -1)
	296	return -1;
	297	if (ul_arg3)
	298	tmp \|= (1 << ul_arg2);
	299	else
	300	tmp &= ~(1 << ul_arg2);
	301	return ds4510_gpio_write(chip, tmp);
	302	case DS4510_CMD_INPUT:
	303	tmp = ds4510_gpio_read_val(chip);
	304	if (tmp == -1)
	305	return -1;
	306	return (tmp & (1 << ul_arg2)) != 0;
	307	case DS4510_CMD_PULLUP:
	308	tmp = ds4510_pullup_read(chip);
	309	if (tmp == -1)
	310	return -1;
	311	if (ul_arg3)
	312	tmp \|= (1 << ul_arg2);
	313	else
	314	tmp &= ~(1 << ul_arg2);
	315	return ds4510_pullup_write(chip, tmp);
a7c93104 PT	316	case DS4510_CMD_INFO:
a7c93104 PT	317	return ds4510_info(chip);
a7c93104 PT	318	case DS4510_CMD_RSTDELAY:
a7c93104 PT	319	return ds4510_rstdelay_write(chip, ul_arg2);
a7c93104 PT	320	case DS4510_CMD_EEPROM:
	321	end = DS4510_EEPROM + DS4510_EEPROM_SIZE;
	322	off = DS4510_EEPROM;
	323	break;
	324	case DS4510_CMD_SEEPROM:
	325	end = DS4510_SEEPROM + DS4510_SEEPROM_SIZE;
	326	off = DS4510_SEEPROM;
	327	break;
	328	case DS4510_CMD_SRAM:
	329	end = DS4510_SRAM + DS4510_SRAM_SIZE;
	330	off = DS4510_SRAM;
	331	break;
a7c93104 PT	332	default:
	333	/* We should never get here... */
	334	return 1;
	335	}
	336
a7c93104	337	/* Only eeprom, seeprom, and sram commands should make it here */
47e26b1b	338	if (strcmp(argv[2], "read") == 0)
a7c93104	339	rw_func = ds4510_mem_read;
47e26b1b	340	else if (strcmp(argv[2], "write") == 0)
a7c93104	341	rw_func = ds4510_mem_write;
47e26b1b WD	342	else
47e26b1b WD	343	return cmd_usage(cmdtp);
a7c93104 PT	344
	345	addr = simple_strtoul(argv[3], NULL, 16);
	346	off += simple_strtoul(argv[4], NULL, 16);
	347	cnt = simple_strtoul(argv[5], NULL, 16);
	348
	349	if ((off + cnt) > end) {
	350	printf("ERROR: invalid len\n");
	351	return -1;
	352	}
	353
	354	return rw_func(chip, off, (uint8_t *)addr, cnt);
a7c93104 PT	355	}
	356
	357	U_BOOT_CMD(
	358	ds4510, 6, 1, do_ds4510,
2fb2604d	359	"ds4510 eeprom/seeprom/sram/gpio access",
a7c93104 PT	360	"device [dev]\n"
a7c93104 PT	361	" - show or set current device address\n"
a7c93104 PT	362	"ds4510 info\n"
a7c93104 PT	363	" - display ds4510 info\n"
a7c93104 PT	364	"ds4510 output pin 0\|1\n"
	365	" - set pin low or high-Z\n"
	366	"ds4510 input pin\n"
	367	" - read value of pin\n"
	368	"ds4510 pullup pin 0\|1\n"
	369	" - disable/enable pullup on specified pin\n"
	370	"ds4510 nv 0\|1\n"
a89c33db	371	" - make gpio and seeprom writes volatile/non-volatile"
a89c33db	372	"\n"
a7c93104	373	"ds4510 rstdelay 0-3\n"
a89c33db	374	" - set reset output delay"
a89c33db	375	"\n"
a7c93104 PT	376	"ds4510 eeprom read addr off cnt\n"
	377	"ds4510 eeprom write addr off cnt\n"
	378	" - read/write 'cnt' bytes at EEPROM offset 'off'\n"
	379	"ds4510 seeprom read addr off cnt\n"
	380	"ds4510 seeprom write addr off cnt\n"
	381	" - read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n"
	382	"ds4510 sram read addr off cnt\n"
	383	"ds4510 sram write addr off cnt\n"
a89c33db	384	" - read/write 'cnt' bytes at SRAM offset 'off'"
a7c93104	385	);