]> git.ipfire.org Git - people/ms/u-boot.git/blame - drivers/mmc/Makefile
mmc: disable UHS modes if Vcc cannot be switched on and off
[people/ms/u-boot.git] / drivers / mmc / Makefile
CommitLineData
5ce13051
HS
1#
2# (C) Copyright 2006
3# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4#
1a459660 5# SPDX-License-Identifier: GPL-2.0+
5ce13051
HS
6#
7
792f0054 8obj-y += mmc.o
c4d660d4 9obj-$(CONFIG_$(SPL_)DM_MMC) += mmc-uclass.o
e7ecf7cb 10
c4d660d4 11ifndef CONFIG_$(SPL_)BLK
792f0054
MY
12obj-y += mmc_legacy.o
13endif
14
15obj-$(CONFIG_SUPPORT_EMMC_BOOT) += mmc_boot.o
16
17ifdef CONFIG_SPL_BUILD
18obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
19obj-$(CONFIG_SPL_SAVEENV) += mmc_write.o
20else
21obj-y += mmc_write.o
c40fdca6
SG
22endif
23
389b89c7 24obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o
1d2c0506 25obj-$(CONFIG_MMC_DAVINCI) += davinci_mmc.o
ae4c81e9
MY
26obj-$(CONFIG_MMC_DW) += dw_mmc.o
27obj-$(CONFIG_MMC_DW_EXYNOS) += exynos_dw_mmc.o
28obj-$(CONFIG_MMC_DW_K3) += hi6220_dw_mmc.o
29obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o
30obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o
710f1d3d
MY
31obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
32obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o
710f1d3d 33obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o
93738620 34obj-$(CONFIG_MMC_MESON_GX) += meson_gx_mmc.o
710f1d3d 35obj-$(CONFIG_MMC_SPI) += mmc_spi.o
389b89c7 36obj-$(CONFIG_MVEBU_MMC) += mvebu_mmc.o
1d2c0506
MY
37obj-$(CONFIG_MMC_OMAP_HS) += omap_hsmmc.o
38obj-$(CONFIG_MMC_MXC) += mxcmmc.o
39obj-$(CONFIG_MMC_MXS) += mxsmmc.o
b706b1c2 40obj-$(CONFIG_MMC_PCI) += pci_mmc.o
710f1d3d 41obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
389b89c7 42obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o
a5995a5d 43obj-$(CONFIG_MMC_SANDBOX) += sandbox_mmc.o
710f1d3d 44obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
72d42bad 45obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
b312c590 46obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o
9f678ab1 47obj-$(CONFIG_MMC_NDS32) += nds32_mmc.o
389b89c7 48
45a68fe2
MY
49# SDHCI
50obj-$(CONFIG_MMC_SDHCI) += sdhci.o
dd3b64eb 51obj-$(CONFIG_MMC_SDHCI_ATMEL) += atmel_sdhci.o
45a68fe2 52obj-$(CONFIG_MMC_SDHCI_BCM2835) += bcm2835_sdhci.o
e5e7a7c2 53obj-$(CONFIG_MMC_SDHCI_CADENCE) += sdhci-cadence.o
45a68fe2 54obj-$(CONFIG_MMC_SDHCI_KONA) += kona_sdhci.o
360c67d5 55obj-$(CONFIG_MMC_SDHCI_MSM) += msm_sdhci.o
45a68fe2 56obj-$(CONFIG_MMC_SDHCI_MV) += mv_sdhci.o
1b858770 57obj-$(CONFIG_MMC_SDHCI_PIC32) += pic32_sdhci.o
facc8058 58obj-$(CONFIG_MMC_SDHCI_ROCKCHIP) += rockchip_sdhci.o
45a68fe2
MY
59obj-$(CONFIG_MMC_SDHCI_S5P) += s5p_sdhci.o
60obj-$(CONFIG_MMC_SDHCI_SPEAR) += spear_sdhci.o
eee20f81 61obj-$(CONFIG_MMC_SDHCI_STI) += sti_sdhci.o
83b3248e 62obj-$(CONFIG_MMC_SDHCI_TANGIER) += tangier_sdhci.o
1d2c0506 63obj-$(CONFIG_MMC_SDHCI_TEGRA) += tegra_mmc.o
b6acb5f1 64obj-$(CONFIG_MMC_SDHCI_XENON) += xenon_sdhci.o
08aa0334 65obj-$(CONFIG_MMC_SDHCI_ZYNQ) += zynq_sdhci.o
1d2c0506
MY
66
67obj-$(CONFIG_MMC_SUNXI) += sunxi_mmc.o
68obj-$(CONFIG_MMC_UNIPHIER) += uniphier-sd.o