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README: document CONFIG_ENV_IS_IN_MMC
[people/ms/u-boot.git] / drivers / mmc / mmc.c
CommitLineData
272cc70b
AF
1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <config.h>
27#include <common.h>
28#include <command.h>
29#include <mmc.h>
30#include <part.h>
31#include <malloc.h>
32#include <linux/list.h>
9b1f942c 33#include <div64.h>
272cc70b 34
ce0fbcd2
MW
35/* Set block count limit because of 16 bit register limit on some hardware*/
36#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
37#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
38#endif
39
272cc70b
AF
40static struct list_head mmc_devices;
41static int cur_dev_num = -1;
42
d23d8d7e
NK
43int __weak board_mmc_getwp(struct mmc *mmc)
44{
45 return -1;
46}
47
48int mmc_getwp(struct mmc *mmc)
49{
50 int wp;
51
52 wp = board_mmc_getwp(mmc);
53
d4e1da4e
PK
54 if (wp < 0) {
55 if (mmc->getwp)
56 wp = mmc->getwp(mmc);
57 else
58 wp = 0;
59 }
d23d8d7e
NK
60
61 return wp;
62}
63
314284b1 64int __board_mmc_getcd(struct mmc *mmc) {
11fdade2
SB
65 return -1;
66}
67
314284b1 68int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
11fdade2
SB
69 alias("__board_mmc_getcd")));
70
fdbb873e
KP
71static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
72 struct mmc_data *data)
272cc70b 73{
8635ff9e 74 struct mmc_data backup;
5db2fe3a 75 int ret;
8635ff9e
MV
76
77 memset(&backup, 0, sizeof(backup));
78
8635ff9e 79#ifdef CONFIG_MMC_TRACE
5db2fe3a
RR
80 int i;
81 u8 *ptr;
82
83 printf("CMD_SEND:%d\n", cmd->cmdidx);
84 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
5db2fe3a
RR
85 ret = mmc->send_cmd(mmc, cmd, data);
86 switch (cmd->resp_type) {
87 case MMC_RSP_NONE:
88 printf("\t\tMMC_RSP_NONE\n");
89 break;
90 case MMC_RSP_R1:
91 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
92 cmd->response[0]);
93 break;
94 case MMC_RSP_R1b:
95 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
96 cmd->response[0]);
97 break;
98 case MMC_RSP_R2:
99 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
100 cmd->response[0]);
101 printf("\t\t \t\t 0x%08X \n",
102 cmd->response[1]);
103 printf("\t\t \t\t 0x%08X \n",
104 cmd->response[2]);
105 printf("\t\t \t\t 0x%08X \n",
106 cmd->response[3]);
107 printf("\n");
108 printf("\t\t\t\t\tDUMPING DATA\n");
109 for (i = 0; i < 4; i++) {
110 int j;
111 printf("\t\t\t\t\t%03d - ", i*4);
146bec79 112 ptr = (u8 *)&cmd->response[i];
5db2fe3a
RR
113 ptr += 3;
114 for (j = 0; j < 4; j++)
115 printf("%02X ", *ptr--);
116 printf("\n");
117 }
118 break;
119 case MMC_RSP_R3:
120 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
121 cmd->response[0]);
122 break;
123 default:
124 printf("\t\tERROR MMC rsp not supported\n");
125 break;
126 }
5db2fe3a 127#else
8635ff9e 128 ret = mmc->send_cmd(mmc, cmd, data);
5db2fe3a 129#endif
8635ff9e 130 return ret;
272cc70b
AF
131}
132
fdbb873e 133static int mmc_send_status(struct mmc *mmc, int timeout)
5d4fc8d9
RR
134{
135 struct mmc_cmd cmd;
d617c426 136 int err, retries = 5;
5d4fc8d9
RR
137#ifdef CONFIG_MMC_TRACE
138 int status;
139#endif
140
141 cmd.cmdidx = MMC_CMD_SEND_STATUS;
142 cmd.resp_type = MMC_RSP_R1;
aaf3d41a
MV
143 if (!mmc_host_is_spi(mmc))
144 cmd.cmdarg = mmc->rca << 16;
5d4fc8d9
RR
145
146 do {
147 err = mmc_send_cmd(mmc, &cmd, NULL);
d617c426
JK
148 if (!err) {
149 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
150 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
151 MMC_STATE_PRG)
152 break;
153 else if (cmd.response[0] & MMC_STATUS_MASK) {
154 printf("Status Error: 0x%08X\n",
155 cmd.response[0]);
156 return COMM_ERR;
157 }
158 } else if (--retries < 0)
5d4fc8d9 159 return err;
5d4fc8d9
RR
160
161 udelay(1000);
162
5d4fc8d9
RR
163 } while (timeout--);
164
5db2fe3a
RR
165#ifdef CONFIG_MMC_TRACE
166 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
167 printf("CURR STATE:%d\n", status);
168#endif
5b0c942f 169 if (timeout <= 0) {
5d4fc8d9
RR
170 printf("Timeout waiting card ready\n");
171 return TIMEOUT;
172 }
173
174 return 0;
175}
176
fdbb873e 177static int mmc_set_blocklen(struct mmc *mmc, int len)
272cc70b
AF
178{
179 struct mmc_cmd cmd;
180
181 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
182 cmd.resp_type = MMC_RSP_R1;
183 cmd.cmdarg = len;
272cc70b
AF
184
185 return mmc_send_cmd(mmc, &cmd, NULL);
186}
187
188struct mmc *find_mmc_device(int dev_num)
189{
190 struct mmc *m;
191 struct list_head *entry;
192
193 list_for_each(entry, &mmc_devices) {
194 m = list_entry(entry, struct mmc, link);
195
196 if (m->block_dev.dev == dev_num)
197 return m;
198 }
199
200 printf("MMC Device %d not found\n", dev_num);
201
202 return NULL;
203}
204
e6f99a56
LW
205static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
206{
207 struct mmc_cmd cmd;
208 ulong end;
209 int err, start_cmd, end_cmd;
210
211 if (mmc->high_capacity)
212 end = start + blkcnt - 1;
213 else {
214 end = (start + blkcnt - 1) * mmc->write_bl_len;
215 start *= mmc->write_bl_len;
216 }
217
218 if (IS_SD(mmc)) {
219 start_cmd = SD_CMD_ERASE_WR_BLK_START;
220 end_cmd = SD_CMD_ERASE_WR_BLK_END;
221 } else {
222 start_cmd = MMC_CMD_ERASE_GROUP_START;
223 end_cmd = MMC_CMD_ERASE_GROUP_END;
224 }
225
226 cmd.cmdidx = start_cmd;
227 cmd.cmdarg = start;
228 cmd.resp_type = MMC_RSP_R1;
e6f99a56
LW
229
230 err = mmc_send_cmd(mmc, &cmd, NULL);
231 if (err)
232 goto err_out;
233
234 cmd.cmdidx = end_cmd;
235 cmd.cmdarg = end;
236
237 err = mmc_send_cmd(mmc, &cmd, NULL);
238 if (err)
239 goto err_out;
240
241 cmd.cmdidx = MMC_CMD_ERASE;
242 cmd.cmdarg = SECURE_ERASE;
243 cmd.resp_type = MMC_RSP_R1b;
244
245 err = mmc_send_cmd(mmc, &cmd, NULL);
246 if (err)
247 goto err_out;
248
249 return 0;
250
251err_out:
252 puts("mmc erase failed\n");
253 return err;
254}
255
256static unsigned long
257mmc_berase(int dev_num, unsigned long start, lbaint_t blkcnt)
258{
259 int err = 0;
260 struct mmc *mmc = find_mmc_device(dev_num);
261 lbaint_t blk = 0, blk_r = 0;
d2d8afae 262 int timeout = 1000;
e6f99a56
LW
263
264 if (!mmc)
265 return -1;
266
267 if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size))
268 printf("\n\nCaution! Your devices Erase group is 0x%x\n"
269 "The erase range would be change to 0x%lx~0x%lx\n\n",
270 mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
271 ((start + blkcnt + mmc->erase_grp_size)
272 & ~(mmc->erase_grp_size - 1)) - 1);
273
274 while (blk < blkcnt) {
275 blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
276 mmc->erase_grp_size : (blkcnt - blk);
277 err = mmc_erase_t(mmc, start + blk, blk_r);
278 if (err)
279 break;
280
281 blk += blk_r;
d2d8afae
JH
282
283 /* Waiting for the ready status */
284 if (mmc_send_status(mmc, timeout))
285 return 0;
e6f99a56
LW
286 }
287
288 return blk;
289}
290
272cc70b 291static ulong
0158126e 292mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t blkcnt, const void*src)
272cc70b
AF
293{
294 struct mmc_cmd cmd;
295 struct mmc_data data;
5d4fc8d9 296 int timeout = 1000;
272cc70b 297
d2bf29e3 298 if ((start + blkcnt) > mmc->block_dev.lba) {
def412b6 299 printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
d2bf29e3
LW
300 start + blkcnt, mmc->block_dev.lba);
301 return 0;
302 }
272cc70b 303
a586c0aa
RC
304 if (blkcnt == 0)
305 return 0;
306 else if (blkcnt == 1)
272cc70b 307 cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK;
a586c0aa
RC
308 else
309 cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK;
272cc70b
AF
310
311 if (mmc->high_capacity)
312 cmd.cmdarg = start;
313 else
def412b6 314 cmd.cmdarg = start * mmc->write_bl_len;
272cc70b
AF
315
316 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
317
318 data.src = src;
319 data.blocks = blkcnt;
def412b6 320 data.blocksize = mmc->write_bl_len;
272cc70b
AF
321 data.flags = MMC_DATA_WRITE;
322
def412b6
SS
323 if (mmc_send_cmd(mmc, &cmd, &data)) {
324 printf("mmc write failed\n");
325 return 0;
272cc70b
AF
326 }
327
d52ebf10
TC
328 /* SPI multiblock writes terminate using a special
329 * token, not a STOP_TRANSMISSION request.
330 */
331 if (!mmc_host_is_spi(mmc) && blkcnt > 1) {
272cc70b
AF
332 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
333 cmd.cmdarg = 0;
334 cmd.resp_type = MMC_RSP_R1b;
def412b6
SS
335 if (mmc_send_cmd(mmc, &cmd, NULL)) {
336 printf("mmc fail to send stop cmd\n");
337 return 0;
0158126e 338 }
272cc70b
AF
339 }
340
93ad0d18
JK
341 /* Waiting for the ready status */
342 if (mmc_send_status(mmc, timeout))
343 return 0;
344
272cc70b
AF
345 return blkcnt;
346}
347
0158126e
LW
348static ulong
349mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const void*src)
350{
0158126e
LW
351 lbaint_t cur, blocks_todo = blkcnt;
352
def412b6 353 struct mmc *mmc = find_mmc_device(dev_num);
0158126e 354 if (!mmc)
def412b6 355 return 0;
0158126e 356
def412b6
SS
357 if (mmc_set_blocklen(mmc, mmc->write_bl_len))
358 return 0;
0158126e
LW
359
360 do {
8feafcc4 361 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
0158126e 362 if(mmc_write_blocks(mmc, start, cur, src) != cur)
def412b6 363 return 0;
0158126e
LW
364 blocks_todo -= cur;
365 start += cur;
366 src += cur * mmc->write_bl_len;
367 } while (blocks_todo > 0);
368
369 return blkcnt;
370}
371
fdbb873e
KP
372static int mmc_read_blocks(struct mmc *mmc, void *dst, ulong start,
373 lbaint_t blkcnt)
272cc70b
AF
374{
375 struct mmc_cmd cmd;
376 struct mmc_data data;
377
4a1a06bc
AS
378 if (blkcnt > 1)
379 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
380 else
381 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
272cc70b
AF
382
383 if (mmc->high_capacity)
4a1a06bc 384 cmd.cmdarg = start;
272cc70b 385 else
4a1a06bc 386 cmd.cmdarg = start * mmc->read_bl_len;
272cc70b
AF
387
388 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
389
390 data.dest = dst;
4a1a06bc 391 data.blocks = blkcnt;
272cc70b
AF
392 data.blocksize = mmc->read_bl_len;
393 data.flags = MMC_DATA_READ;
394
4a1a06bc
AS
395 if (mmc_send_cmd(mmc, &cmd, &data))
396 return 0;
272cc70b 397
4a1a06bc
AS
398 if (blkcnt > 1) {
399 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
400 cmd.cmdarg = 0;
401 cmd.resp_type = MMC_RSP_R1b;
4a1a06bc
AS
402 if (mmc_send_cmd(mmc, &cmd, NULL)) {
403 printf("mmc fail to send stop cmd\n");
404 return 0;
405 }
272cc70b
AF
406 }
407
4a1a06bc 408 return blkcnt;
272cc70b
AF
409}
410
411static ulong mmc_bread(int dev_num, ulong start, lbaint_t blkcnt, void *dst)
412{
4a1a06bc
AS
413 lbaint_t cur, blocks_todo = blkcnt;
414
415 if (blkcnt == 0)
416 return 0;
272cc70b 417
4a1a06bc 418 struct mmc *mmc = find_mmc_device(dev_num);
272cc70b
AF
419 if (!mmc)
420 return 0;
421
d2bf29e3 422 if ((start + blkcnt) > mmc->block_dev.lba) {
4a1a06bc 423 printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
d2bf29e3
LW
424 start + blkcnt, mmc->block_dev.lba);
425 return 0;
426 }
272cc70b 427
4a1a06bc 428 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
272cc70b 429 return 0;
272cc70b 430
4a1a06bc 431 do {
8feafcc4 432 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
4a1a06bc
AS
433 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
434 return 0;
435 blocks_todo -= cur;
436 start += cur;
437 dst += cur * mmc->read_bl_len;
438 } while (blocks_todo > 0);
272cc70b
AF
439
440 return blkcnt;
441}
442
fdbb873e 443static int mmc_go_idle(struct mmc *mmc)
272cc70b
AF
444{
445 struct mmc_cmd cmd;
446 int err;
447
448 udelay(1000);
449
450 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
451 cmd.cmdarg = 0;
452 cmd.resp_type = MMC_RSP_NONE;
272cc70b
AF
453
454 err = mmc_send_cmd(mmc, &cmd, NULL);
455
456 if (err)
457 return err;
458
459 udelay(2000);
460
461 return 0;
462}
463
fdbb873e 464static int sd_send_op_cond(struct mmc *mmc)
272cc70b
AF
465{
466 int timeout = 1000;
467 int err;
468 struct mmc_cmd cmd;
469
470 do {
471 cmd.cmdidx = MMC_CMD_APP_CMD;
472 cmd.resp_type = MMC_RSP_R1;
473 cmd.cmdarg = 0;
272cc70b
AF
474
475 err = mmc_send_cmd(mmc, &cmd, NULL);
476
477 if (err)
478 return err;
479
480 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
481 cmd.resp_type = MMC_RSP_R3;
250de12b
SB
482
483 /*
484 * Most cards do not answer if some reserved bits
485 * in the ocr are set. However, Some controller
486 * can set bit 7 (reserved for low voltages), but
487 * how to manage low voltages SD card is not yet
488 * specified.
489 */
d52ebf10
TC
490 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
491 (mmc->voltages & 0xff8000);
272cc70b
AF
492
493 if (mmc->version == SD_VERSION_2)
494 cmd.cmdarg |= OCR_HCS;
495
496 err = mmc_send_cmd(mmc, &cmd, NULL);
497
498 if (err)
499 return err;
500
501 udelay(1000);
502 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
503
504 if (timeout <= 0)
505 return UNUSABLE_ERR;
506
507 if (mmc->version != SD_VERSION_2)
508 mmc->version = SD_VERSION_1_0;
509
d52ebf10
TC
510 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
511 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
512 cmd.resp_type = MMC_RSP_R3;
513 cmd.cmdarg = 0;
d52ebf10
TC
514
515 err = mmc_send_cmd(mmc, &cmd, NULL);
516
517 if (err)
518 return err;
519 }
520
998be3dd 521 mmc->ocr = cmd.response[0];
272cc70b
AF
522
523 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
524 mmc->rca = 0;
525
526 return 0;
527}
528
e9550449
CLC
529/* We pass in the cmd since otherwise the init seems to fail */
530static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
531 int use_arg)
272cc70b 532{
272cc70b
AF
533 int err;
534
e9550449
CLC
535 cmd->cmdidx = MMC_CMD_SEND_OP_COND;
536 cmd->resp_type = MMC_RSP_R3;
537 cmd->cmdarg = 0;
538 if (use_arg && !mmc_host_is_spi(mmc)) {
539 cmd->cmdarg =
540 (mmc->voltages &
541 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
542 (mmc->op_cond_response & OCR_ACCESS_MODE);
543
544 if (mmc->host_caps & MMC_MODE_HC)
545 cmd->cmdarg |= OCR_HCS;
546 }
547 err = mmc_send_cmd(mmc, cmd, NULL);
548 if (err)
549 return err;
550 mmc->op_cond_response = cmd->response[0];
551 return 0;
552}
553
554int mmc_send_op_cond(struct mmc *mmc)
555{
556 struct mmc_cmd cmd;
557 int err, i;
558
272cc70b
AF
559 /* Some cards seem to need this */
560 mmc_go_idle(mmc);
561
31cacbab 562 /* Asking to the card its capabilities */
e9550449
CLC
563 mmc->op_cond_pending = 1;
564 for (i = 0; i < 2; i++) {
565 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
566 if (err)
567 return err;
cd6881b5 568
e9550449
CLC
569 /* exit if not busy (flag seems to be inverted) */
570 if (mmc->op_cond_response & OCR_BUSY)
571 return 0;
572 }
573 return IN_PROGRESS;
574}
cd6881b5 575
e9550449
CLC
576int mmc_complete_op_cond(struct mmc *mmc)
577{
578 struct mmc_cmd cmd;
579 int timeout = 1000;
580 uint start;
581 int err;
cd6881b5 582
e9550449
CLC
583 mmc->op_cond_pending = 0;
584 start = get_timer(0);
272cc70b 585 do {
e9550449 586 err = mmc_send_op_cond_iter(mmc, &cmd, 1);
272cc70b
AF
587 if (err)
588 return err;
e9550449
CLC
589 if (get_timer(start) > timeout)
590 return UNUSABLE_ERR;
591 udelay(100);
592 } while (!(mmc->op_cond_response & OCR_BUSY));
272cc70b 593
d52ebf10
TC
594 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
595 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
596 cmd.resp_type = MMC_RSP_R3;
597 cmd.cmdarg = 0;
d52ebf10
TC
598
599 err = mmc_send_cmd(mmc, &cmd, NULL);
600
601 if (err)
602 return err;
603 }
604
272cc70b 605 mmc->version = MMC_VERSION_UNKNOWN;
998be3dd 606 mmc->ocr = cmd.response[0];
272cc70b
AF
607
608 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
609 mmc->rca = 0;
610
611 return 0;
612}
613
614
fdbb873e 615static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
272cc70b
AF
616{
617 struct mmc_cmd cmd;
618 struct mmc_data data;
619 int err;
620
621 /* Get the Card Status Register */
622 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
623 cmd.resp_type = MMC_RSP_R1;
624 cmd.cmdarg = 0;
272cc70b 625
cdfd1ac6 626 data.dest = (char *)ext_csd;
272cc70b 627 data.blocks = 1;
8bfa195e 628 data.blocksize = MMC_MAX_BLOCK_LEN;
272cc70b
AF
629 data.flags = MMC_DATA_READ;
630
631 err = mmc_send_cmd(mmc, &cmd, &data);
632
633 return err;
634}
635
636
fdbb873e 637static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
272cc70b
AF
638{
639 struct mmc_cmd cmd;
5d4fc8d9
RR
640 int timeout = 1000;
641 int ret;
272cc70b
AF
642
643 cmd.cmdidx = MMC_CMD_SWITCH;
644 cmd.resp_type = MMC_RSP_R1b;
645 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
5d4fc8d9
RR
646 (index << 16) |
647 (value << 8);
272cc70b 648
5d4fc8d9
RR
649 ret = mmc_send_cmd(mmc, &cmd, NULL);
650
651 /* Waiting for the ready status */
93ad0d18
JK
652 if (!ret)
653 ret = mmc_send_status(mmc, timeout);
5d4fc8d9
RR
654
655 return ret;
656
272cc70b
AF
657}
658
fdbb873e 659static int mmc_change_freq(struct mmc *mmc)
272cc70b 660{
8bfa195e 661 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
272cc70b
AF
662 char cardtype;
663 int err;
664
665 mmc->card_caps = 0;
666
d52ebf10
TC
667 if (mmc_host_is_spi(mmc))
668 return 0;
669
272cc70b
AF
670 /* Only version 4 supports high-speed */
671 if (mmc->version < MMC_VERSION_4)
672 return 0;
673
272cc70b
AF
674 err = mmc_send_ext_csd(mmc, ext_csd);
675
676 if (err)
677 return err;
678
0560db18 679 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
272cc70b
AF
680
681 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
682
683 if (err)
684 return err;
685
686 /* Now check to see that it worked */
687 err = mmc_send_ext_csd(mmc, ext_csd);
688
689 if (err)
690 return err;
691
692 /* No high-speed support */
0560db18 693 if (!ext_csd[EXT_CSD_HS_TIMING])
272cc70b
AF
694 return 0;
695
696 /* High Speed is set, there are two types: 52MHz and 26MHz */
697 if (cardtype & MMC_HS_52MHZ)
698 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
699 else
700 mmc->card_caps |= MMC_MODE_HS;
701
702 return 0;
703}
704
bc897b1d
LW
705int mmc_switch_part(int dev_num, unsigned int part_num)
706{
707 struct mmc *mmc = find_mmc_device(dev_num);
708
709 if (!mmc)
710 return -1;
711
712 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
713 (mmc->part_config & ~PART_ACCESS_MASK)
714 | (part_num & PART_ACCESS_MASK));
715}
716
48972d90
TR
717int mmc_getcd(struct mmc *mmc)
718{
719 int cd;
720
721 cd = board_mmc_getcd(mmc);
722
d4e1da4e
PK
723 if (cd < 0) {
724 if (mmc->getcd)
725 cd = mmc->getcd(mmc);
726 else
727 cd = 1;
728 }
48972d90
TR
729
730 return cd;
731}
732
fdbb873e 733static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
272cc70b
AF
734{
735 struct mmc_cmd cmd;
736 struct mmc_data data;
737
738 /* Switch the frequency */
739 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
740 cmd.resp_type = MMC_RSP_R1;
741 cmd.cmdarg = (mode << 31) | 0xffffff;
742 cmd.cmdarg &= ~(0xf << (group * 4));
743 cmd.cmdarg |= value << (group * 4);
272cc70b
AF
744
745 data.dest = (char *)resp;
746 data.blocksize = 64;
747 data.blocks = 1;
748 data.flags = MMC_DATA_READ;
749
750 return mmc_send_cmd(mmc, &cmd, &data);
751}
752
753
fdbb873e 754static int sd_change_freq(struct mmc *mmc)
272cc70b
AF
755{
756 int err;
757 struct mmc_cmd cmd;
f781dd38
A
758 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
759 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
272cc70b
AF
760 struct mmc_data data;
761 int timeout;
762
763 mmc->card_caps = 0;
764
d52ebf10
TC
765 if (mmc_host_is_spi(mmc))
766 return 0;
767
272cc70b
AF
768 /* Read the SCR to find out if this card supports higher speeds */
769 cmd.cmdidx = MMC_CMD_APP_CMD;
770 cmd.resp_type = MMC_RSP_R1;
771 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
772
773 err = mmc_send_cmd(mmc, &cmd, NULL);
774
775 if (err)
776 return err;
777
778 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
779 cmd.resp_type = MMC_RSP_R1;
780 cmd.cmdarg = 0;
272cc70b
AF
781
782 timeout = 3;
783
784retry_scr:
f781dd38 785 data.dest = (char *)scr;
272cc70b
AF
786 data.blocksize = 8;
787 data.blocks = 1;
788 data.flags = MMC_DATA_READ;
789
790 err = mmc_send_cmd(mmc, &cmd, &data);
791
792 if (err) {
793 if (timeout--)
794 goto retry_scr;
795
796 return err;
797 }
798
4e3d89ba
YK
799 mmc->scr[0] = __be32_to_cpu(scr[0]);
800 mmc->scr[1] = __be32_to_cpu(scr[1]);
272cc70b
AF
801
802 switch ((mmc->scr[0] >> 24) & 0xf) {
803 case 0:
804 mmc->version = SD_VERSION_1_0;
805 break;
806 case 1:
807 mmc->version = SD_VERSION_1_10;
808 break;
809 case 2:
810 mmc->version = SD_VERSION_2;
1741c64d
JC
811 if ((mmc->scr[0] >> 15) & 0x1)
812 mmc->version = SD_VERSION_3;
272cc70b
AF
813 break;
814 default:
815 mmc->version = SD_VERSION_1_0;
816 break;
817 }
818
b44c7083
AS
819 if (mmc->scr[0] & SD_DATA_4BIT)
820 mmc->card_caps |= MMC_MODE_4BIT;
821
272cc70b
AF
822 /* Version 1.0 doesn't support switching */
823 if (mmc->version == SD_VERSION_1_0)
824 return 0;
825
826 timeout = 4;
827 while (timeout--) {
828 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
f781dd38 829 (u8 *)switch_status);
272cc70b
AF
830
831 if (err)
832 return err;
833
834 /* The high-speed function is busy. Try again */
4e3d89ba 835 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
272cc70b
AF
836 break;
837 }
838
272cc70b 839 /* If high-speed isn't supported, we return */
4e3d89ba 840 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
272cc70b
AF
841 return 0;
842
2c3fbf4c
ML
843 /*
844 * If the host doesn't support SD_HIGHSPEED, do not switch card to
845 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
846 * This can avoid furthur problem when the card runs in different
847 * mode between the host.
848 */
849 if (!((mmc->host_caps & MMC_MODE_HS_52MHz) &&
850 (mmc->host_caps & MMC_MODE_HS)))
851 return 0;
852
f781dd38 853 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
272cc70b
AF
854
855 if (err)
856 return err;
857
4e3d89ba 858 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
272cc70b
AF
859 mmc->card_caps |= MMC_MODE_HS;
860
861 return 0;
862}
863
864/* frequency bases */
865/* divided by 10 to be nice to platforms without floating point */
5f837c2c 866static const int fbase[] = {
272cc70b
AF
867 10000,
868 100000,
869 1000000,
870 10000000,
871};
872
873/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
874 * to platforms without floating point.
875 */
5f837c2c 876static const int multipliers[] = {
272cc70b
AF
877 0, /* reserved */
878 10,
879 12,
880 13,
881 15,
882 20,
883 25,
884 30,
885 35,
886 40,
887 45,
888 50,
889 55,
890 60,
891 70,
892 80,
893};
894
fdbb873e 895static void mmc_set_ios(struct mmc *mmc)
272cc70b
AF
896{
897 mmc->set_ios(mmc);
898}
899
900void mmc_set_clock(struct mmc *mmc, uint clock)
901{
902 if (clock > mmc->f_max)
903 clock = mmc->f_max;
904
905 if (clock < mmc->f_min)
906 clock = mmc->f_min;
907
908 mmc->clock = clock;
909
910 mmc_set_ios(mmc);
911}
912
fdbb873e 913static void mmc_set_bus_width(struct mmc *mmc, uint width)
272cc70b
AF
914{
915 mmc->bus_width = width;
916
917 mmc_set_ios(mmc);
918}
919
fdbb873e 920static int mmc_startup(struct mmc *mmc)
272cc70b 921{
7798f6db 922 int err;
272cc70b 923 uint mult, freq;
639b7827 924 u64 cmult, csize, capacity;
272cc70b 925 struct mmc_cmd cmd;
8bfa195e
SG
926 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
927 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
5d4fc8d9 928 int timeout = 1000;
272cc70b 929
d52ebf10
TC
930#ifdef CONFIG_MMC_SPI_CRC_ON
931 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
932 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
933 cmd.resp_type = MMC_RSP_R1;
934 cmd.cmdarg = 1;
d52ebf10
TC
935 err = mmc_send_cmd(mmc, &cmd, NULL);
936
937 if (err)
938 return err;
939 }
940#endif
941
272cc70b 942 /* Put the Card in Identify Mode */
d52ebf10
TC
943 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
944 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
272cc70b
AF
945 cmd.resp_type = MMC_RSP_R2;
946 cmd.cmdarg = 0;
272cc70b
AF
947
948 err = mmc_send_cmd(mmc, &cmd, NULL);
949
950 if (err)
951 return err;
952
953 memcpy(mmc->cid, cmd.response, 16);
954
955 /*
956 * For MMC cards, set the Relative Address.
957 * For SD cards, get the Relatvie Address.
958 * This also puts the cards into Standby State
959 */
d52ebf10
TC
960 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
961 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
962 cmd.cmdarg = mmc->rca << 16;
963 cmd.resp_type = MMC_RSP_R6;
272cc70b 964
d52ebf10 965 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 966
d52ebf10
TC
967 if (err)
968 return err;
272cc70b 969
d52ebf10
TC
970 if (IS_SD(mmc))
971 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
972 }
272cc70b
AF
973
974 /* Get the Card-Specific Data */
975 cmd.cmdidx = MMC_CMD_SEND_CSD;
976 cmd.resp_type = MMC_RSP_R2;
977 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
978
979 err = mmc_send_cmd(mmc, &cmd, NULL);
980
5d4fc8d9
RR
981 /* Waiting for the ready status */
982 mmc_send_status(mmc, timeout);
983
272cc70b
AF
984 if (err)
985 return err;
986
998be3dd
RV
987 mmc->csd[0] = cmd.response[0];
988 mmc->csd[1] = cmd.response[1];
989 mmc->csd[2] = cmd.response[2];
990 mmc->csd[3] = cmd.response[3];
272cc70b
AF
991
992 if (mmc->version == MMC_VERSION_UNKNOWN) {
0b453ffe 993 int version = (cmd.response[0] >> 26) & 0xf;
272cc70b
AF
994
995 switch (version) {
996 case 0:
997 mmc->version = MMC_VERSION_1_2;
998 break;
999 case 1:
1000 mmc->version = MMC_VERSION_1_4;
1001 break;
1002 case 2:
1003 mmc->version = MMC_VERSION_2_2;
1004 break;
1005 case 3:
1006 mmc->version = MMC_VERSION_3;
1007 break;
1008 case 4:
1009 mmc->version = MMC_VERSION_4;
1010 break;
1011 default:
1012 mmc->version = MMC_VERSION_1_2;
1013 break;
1014 }
1015 }
1016
1017 /* divide frequency by 10, since the mults are 10x bigger */
0b453ffe
RV
1018 freq = fbase[(cmd.response[0] & 0x7)];
1019 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
272cc70b
AF
1020
1021 mmc->tran_speed = freq * mult;
1022
998be3dd 1023 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
272cc70b
AF
1024
1025 if (IS_SD(mmc))
1026 mmc->write_bl_len = mmc->read_bl_len;
1027 else
998be3dd 1028 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
272cc70b
AF
1029
1030 if (mmc->high_capacity) {
1031 csize = (mmc->csd[1] & 0x3f) << 16
1032 | (mmc->csd[2] & 0xffff0000) >> 16;
1033 cmult = 8;
1034 } else {
1035 csize = (mmc->csd[1] & 0x3ff) << 2
1036 | (mmc->csd[2] & 0xc0000000) >> 30;
1037 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1038 }
1039
1040 mmc->capacity = (csize + 1) << (cmult + 2);
1041 mmc->capacity *= mmc->read_bl_len;
1042
8bfa195e
SG
1043 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1044 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b 1045
8bfa195e
SG
1046 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1047 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b
AF
1048
1049 /* Select the card, and put it into Transfer Mode */
d52ebf10
TC
1050 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1051 cmd.cmdidx = MMC_CMD_SELECT_CARD;
fe8f7066 1052 cmd.resp_type = MMC_RSP_R1;
d52ebf10 1053 cmd.cmdarg = mmc->rca << 16;
d52ebf10 1054 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 1055
d52ebf10
TC
1056 if (err)
1057 return err;
1058 }
272cc70b 1059
e6f99a56
LW
1060 /*
1061 * For SD, its erase group is always one sector
1062 */
1063 mmc->erase_grp_size = 1;
bc897b1d 1064 mmc->part_config = MMCPART_NOAVAILABLE;
d23e2c09
SG
1065 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1066 /* check ext_csd version and capacity */
1067 err = mmc_send_ext_csd(mmc, ext_csd);
fdbb873e 1068 if (!err && (ext_csd[EXT_CSD_REV] >= 2)) {
639b7827
YS
1069 /*
1070 * According to the JEDEC Standard, the value of
1071 * ext_csd's capacity is valid if the value is more
1072 * than 2GB
1073 */
0560db18
LW
1074 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1075 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1076 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1077 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
8bfa195e 1078 capacity *= MMC_MAX_BLOCK_LEN;
b1f1e821 1079 if ((capacity >> 20) > 2 * 1024)
639b7827 1080 mmc->capacity = capacity;
d23e2c09 1081 }
bc897b1d 1082
64f4a619
JC
1083 switch (ext_csd[EXT_CSD_REV]) {
1084 case 1:
1085 mmc->version = MMC_VERSION_4_1;
1086 break;
1087 case 2:
1088 mmc->version = MMC_VERSION_4_2;
1089 break;
1090 case 3:
1091 mmc->version = MMC_VERSION_4_3;
1092 break;
1093 case 5:
1094 mmc->version = MMC_VERSION_4_41;
1095 break;
1096 case 6:
1097 mmc->version = MMC_VERSION_4_5;
1098 break;
1099 }
1100
e6f99a56
LW
1101 /*
1102 * Check whether GROUP_DEF is set, if yes, read out
1103 * group size from ext_csd directly, or calculate
1104 * the group size from the csd value.
1105 */
8bfa195e 1106 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF]) {
0560db18 1107 mmc->erase_grp_size =
8bfa195e
SG
1108 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] *
1109 MMC_MAX_BLOCK_LEN * 1024;
1110 } else {
e6f99a56
LW
1111 int erase_gsz, erase_gmul;
1112 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1113 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1114 mmc->erase_grp_size = (erase_gsz + 1)
1115 * (erase_gmul + 1);
1116 }
1117
bc897b1d 1118 /* store the partition info of emmc */
8948ea83
SW
1119 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1120 ext_csd[EXT_CSD_BOOT_MULT])
0560db18 1121 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
d23e2c09
SG
1122 }
1123
272cc70b
AF
1124 if (IS_SD(mmc))
1125 err = sd_change_freq(mmc);
1126 else
1127 err = mmc_change_freq(mmc);
1128
1129 if (err)
1130 return err;
1131
1132 /* Restrict card's capabilities by what the host can do */
1133 mmc->card_caps &= mmc->host_caps;
1134
1135 if (IS_SD(mmc)) {
1136 if (mmc->card_caps & MMC_MODE_4BIT) {
1137 cmd.cmdidx = MMC_CMD_APP_CMD;
1138 cmd.resp_type = MMC_RSP_R1;
1139 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
1140
1141 err = mmc_send_cmd(mmc, &cmd, NULL);
1142 if (err)
1143 return err;
1144
1145 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1146 cmd.resp_type = MMC_RSP_R1;
1147 cmd.cmdarg = 2;
272cc70b
AF
1148 err = mmc_send_cmd(mmc, &cmd, NULL);
1149 if (err)
1150 return err;
1151
1152 mmc_set_bus_width(mmc, 4);
1153 }
1154
1155 if (mmc->card_caps & MMC_MODE_HS)
ad5fd922 1156 mmc->tran_speed = 50000000;
272cc70b 1157 else
ad5fd922 1158 mmc->tran_speed = 25000000;
272cc70b 1159 } else {
7798f6db
AF
1160 int idx;
1161
1162 /* An array of possible bus widths in order of preference */
1163 static unsigned ext_csd_bits[] = {
1164 EXT_CSD_BUS_WIDTH_8,
1165 EXT_CSD_BUS_WIDTH_4,
1166 EXT_CSD_BUS_WIDTH_1,
1167 };
1168
1169 /* An array to map CSD bus widths to host cap bits */
1170 static unsigned ext_to_hostcaps[] = {
1171 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1172 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1173 };
1174
1175 /* An array to map chosen bus width to an integer */
1176 static unsigned widths[] = {
1177 8, 4, 1,
1178 };
1179
1180 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1181 unsigned int extw = ext_csd_bits[idx];
1182
1183 /*
1184 * Check to make sure the controller supports
1185 * this bus width, if it's more than 1
1186 */
1187 if (extw != EXT_CSD_BUS_WIDTH_1 &&
1188 !(mmc->host_caps & ext_to_hostcaps[extw]))
1189 continue;
1190
272cc70b 1191 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
7798f6db 1192 EXT_CSD_BUS_WIDTH, extw);
272cc70b
AF
1193
1194 if (err)
4137894e 1195 continue;
272cc70b 1196
7798f6db 1197 mmc_set_bus_width(mmc, widths[idx]);
4137894e
LW
1198
1199 err = mmc_send_ext_csd(mmc, test_csd);
1200 if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \
1201 == test_csd[EXT_CSD_PARTITIONING_SUPPORT]
1202 && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \
1203 == test_csd[EXT_CSD_ERASE_GROUP_DEF] \
1204 && ext_csd[EXT_CSD_REV] \
1205 == test_csd[EXT_CSD_REV]
1206 && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \
1207 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1208 && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \
1209 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) {
1210
7798f6db 1211 mmc->card_caps |= ext_to_hostcaps[extw];
4137894e
LW
1212 break;
1213 }
272cc70b
AF
1214 }
1215
1216 if (mmc->card_caps & MMC_MODE_HS) {
1217 if (mmc->card_caps & MMC_MODE_HS_52MHz)
ad5fd922 1218 mmc->tran_speed = 52000000;
272cc70b 1219 else
ad5fd922
JC
1220 mmc->tran_speed = 26000000;
1221 }
272cc70b
AF
1222 }
1223
ad5fd922
JC
1224 mmc_set_clock(mmc, mmc->tran_speed);
1225
272cc70b
AF
1226 /* fill in device description */
1227 mmc->block_dev.lun = 0;
1228 mmc->block_dev.type = 0;
1229 mmc->block_dev.blksz = mmc->read_bl_len;
0472fbfd 1230 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
9b1f942c 1231 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
babce5f6
TH
1232 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1233 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1234 (mmc->cid[3] >> 16) & 0xffff);
1235 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1236 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1237 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1238 (mmc->cid[2] >> 24) & 0xff);
1239 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1240 (mmc->cid[2] >> 16) & 0xf);
122efd43 1241#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
272cc70b 1242 init_part(&mmc->block_dev);
122efd43 1243#endif
272cc70b
AF
1244
1245 return 0;
1246}
1247
fdbb873e 1248static int mmc_send_if_cond(struct mmc *mmc)
272cc70b
AF
1249{
1250 struct mmc_cmd cmd;
1251 int err;
1252
1253 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1254 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1255 cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa;
1256 cmd.resp_type = MMC_RSP_R7;
272cc70b
AF
1257
1258 err = mmc_send_cmd(mmc, &cmd, NULL);
1259
1260 if (err)
1261 return err;
1262
998be3dd 1263 if ((cmd.response[0] & 0xff) != 0xaa)
272cc70b
AF
1264 return UNUSABLE_ERR;
1265 else
1266 mmc->version = SD_VERSION_2;
1267
1268 return 0;
1269}
1270
1271int mmc_register(struct mmc *mmc)
1272{
1273 /* Setup the universal parts of the block interface just once */
1274 mmc->block_dev.if_type = IF_TYPE_MMC;
1275 mmc->block_dev.dev = cur_dev_num++;
1276 mmc->block_dev.removable = 1;
1277 mmc->block_dev.block_read = mmc_bread;
1278 mmc->block_dev.block_write = mmc_bwrite;
e6f99a56 1279 mmc->block_dev.block_erase = mmc_berase;
8feafcc4
JR
1280 if (!mmc->b_max)
1281 mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
272cc70b
AF
1282
1283 INIT_LIST_HEAD (&mmc->link);
1284
1285 list_add_tail (&mmc->link, &mmc_devices);
1286
1287 return 0;
1288}
1289
df3fc526 1290#ifdef CONFIG_PARTITIONS
272cc70b
AF
1291block_dev_desc_t *mmc_get_dev(int dev)
1292{
1293 struct mmc *mmc = find_mmc_device(dev);
6bb4b4bc 1294 if (!mmc || mmc_init(mmc))
40242bc3 1295 return NULL;
272cc70b 1296
40242bc3 1297 return &mmc->block_dev;
272cc70b 1298}
df3fc526 1299#endif
272cc70b 1300
e9550449 1301int mmc_start_init(struct mmc *mmc)
272cc70b 1302{
afd5932b 1303 int err;
272cc70b 1304
48972d90
TR
1305 if (mmc_getcd(mmc) == 0) {
1306 mmc->has_init = 0;
1307 printf("MMC: no card present\n");
1308 return NO_CARD_ERR;
1309 }
1310
bc897b1d
LW
1311 if (mmc->has_init)
1312 return 0;
1313
272cc70b
AF
1314 err = mmc->init(mmc);
1315
1316 if (err)
1317 return err;
1318
b86b85e2
IY
1319 mmc_set_bus_width(mmc, 1);
1320 mmc_set_clock(mmc, 1);
1321
272cc70b
AF
1322 /* Reset the Card */
1323 err = mmc_go_idle(mmc);
1324
1325 if (err)
1326 return err;
1327
bc897b1d
LW
1328 /* The internal partition reset to user partition(0) at every CMD0*/
1329 mmc->part_num = 0;
1330
272cc70b 1331 /* Test for SD version 2 */
afd5932b 1332 err = mmc_send_if_cond(mmc);
272cc70b 1333
272cc70b
AF
1334 /* Now try to get the SD card's operating condition */
1335 err = sd_send_op_cond(mmc);
1336
1337 /* If the command timed out, we check for an MMC card */
1338 if (err == TIMEOUT) {
1339 err = mmc_send_op_cond(mmc);
1340
e9550449 1341 if (err && err != IN_PROGRESS) {
272cc70b
AF
1342 printf("Card did not respond to voltage select!\n");
1343 return UNUSABLE_ERR;
1344 }
1345 }
1346
e9550449
CLC
1347 if (err == IN_PROGRESS)
1348 mmc->init_in_progress = 1;
1349
1350 return err;
1351}
1352
1353static int mmc_complete_init(struct mmc *mmc)
1354{
1355 int err = 0;
1356
1357 if (mmc->op_cond_pending)
1358 err = mmc_complete_op_cond(mmc);
1359
1360 if (!err)
1361 err = mmc_startup(mmc);
bc897b1d
LW
1362 if (err)
1363 mmc->has_init = 0;
1364 else
1365 mmc->has_init = 1;
e9550449
CLC
1366 mmc->init_in_progress = 0;
1367 return err;
1368}
1369
1370int mmc_init(struct mmc *mmc)
1371{
1372 int err = IN_PROGRESS;
1373 unsigned start = get_timer(0);
1374
1375 if (mmc->has_init)
1376 return 0;
1377 if (!mmc->init_in_progress)
1378 err = mmc_start_init(mmc);
1379
1380 if (!err || err == IN_PROGRESS)
1381 err = mmc_complete_init(mmc);
1382 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
bc897b1d 1383 return err;
272cc70b
AF
1384}
1385
1386/*
1387 * CPU and board-specific MMC initializations. Aliased function
1388 * signals caller to move on
1389 */
1390static int __def_mmc_init(bd_t *bis)
1391{
1392 return -1;
1393}
1394
f9a109b3
PT
1395int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
1396int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
272cc70b
AF
1397
1398void print_mmc_devices(char separator)
1399{
1400 struct mmc *m;
1401 struct list_head *entry;
1402
1403 list_for_each(entry, &mmc_devices) {
1404 m = list_entry(entry, struct mmc, link);
1405
1406 printf("%s: %d", m->name, m->block_dev.dev);
1407
1408 if (entry->next != &mmc_devices)
1409 printf("%c ", separator);
1410 }
1411
1412 printf("\n");
1413}
1414
ea6ebe21
LW
1415int get_mmc_num(void)
1416{
1417 return cur_dev_num;
1418}
1419
e9550449
CLC
1420void mmc_set_preinit(struct mmc *mmc, int preinit)
1421{
1422 mmc->preinit = preinit;
1423}
1424
1425static void do_preinit(void)
1426{
1427 struct mmc *m;
1428 struct list_head *entry;
1429
1430 list_for_each(entry, &mmc_devices) {
1431 m = list_entry(entry, struct mmc, link);
1432
1433 if (m->preinit)
1434 mmc_start_init(m);
1435 }
1436}
1437
1438
272cc70b
AF
1439int mmc_initialize(bd_t *bis)
1440{
1441 INIT_LIST_HEAD (&mmc_devices);
1442 cur_dev_num = 0;
1443
1444 if (board_mmc_init(bis) < 0)
1445 cpu_mmc_init(bis);
1446
1447 print_mmc_devices(',');
1448
e9550449 1449 do_preinit();
272cc70b
AF
1450 return 0;
1451}