]> git.ipfire.org Git - people/ms/u-boot.git/blame - drivers/mmc/mmc.c
spl_mmc: only call printf or puts with CONFIG_SPL_LIBCOMMON_SUPPORT
[people/ms/u-boot.git] / drivers / mmc / mmc.c
CommitLineData
272cc70b
AF
1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
1a459660 7 * SPDX-License-Identifier: GPL-2.0+
272cc70b
AF
8 */
9
10#include <config.h>
11#include <common.h>
12#include <command.h>
13#include <mmc.h>
14#include <part.h>
15#include <malloc.h>
16#include <linux/list.h>
9b1f942c 17#include <div64.h>
272cc70b 18
ce0fbcd2
MW
19/* Set block count limit because of 16 bit register limit on some hardware*/
20#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
21#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
22#endif
23
272cc70b
AF
24static struct list_head mmc_devices;
25static int cur_dev_num = -1;
26
d23d8d7e
NK
27int __weak board_mmc_getwp(struct mmc *mmc)
28{
29 return -1;
30}
31
32int mmc_getwp(struct mmc *mmc)
33{
34 int wp;
35
36 wp = board_mmc_getwp(mmc);
37
d4e1da4e
PK
38 if (wp < 0) {
39 if (mmc->getwp)
40 wp = mmc->getwp(mmc);
41 else
42 wp = 0;
43 }
d23d8d7e
NK
44
45 return wp;
46}
47
314284b1 48int __board_mmc_getcd(struct mmc *mmc) {
11fdade2
SB
49 return -1;
50}
51
314284b1 52int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
11fdade2
SB
53 alias("__board_mmc_getcd")));
54
fdbb873e
KP
55static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
56 struct mmc_data *data)
272cc70b 57{
5db2fe3a 58 int ret;
8635ff9e 59
8635ff9e 60#ifdef CONFIG_MMC_TRACE
5db2fe3a
RR
61 int i;
62 u8 *ptr;
63
64 printf("CMD_SEND:%d\n", cmd->cmdidx);
65 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
5db2fe3a
RR
66 ret = mmc->send_cmd(mmc, cmd, data);
67 switch (cmd->resp_type) {
68 case MMC_RSP_NONE:
69 printf("\t\tMMC_RSP_NONE\n");
70 break;
71 case MMC_RSP_R1:
72 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
73 cmd->response[0]);
74 break;
75 case MMC_RSP_R1b:
76 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
77 cmd->response[0]);
78 break;
79 case MMC_RSP_R2:
80 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
81 cmd->response[0]);
82 printf("\t\t \t\t 0x%08X \n",
83 cmd->response[1]);
84 printf("\t\t \t\t 0x%08X \n",
85 cmd->response[2]);
86 printf("\t\t \t\t 0x%08X \n",
87 cmd->response[3]);
88 printf("\n");
89 printf("\t\t\t\t\tDUMPING DATA\n");
90 for (i = 0; i < 4; i++) {
91 int j;
92 printf("\t\t\t\t\t%03d - ", i*4);
146bec79 93 ptr = (u8 *)&cmd->response[i];
5db2fe3a
RR
94 ptr += 3;
95 for (j = 0; j < 4; j++)
96 printf("%02X ", *ptr--);
97 printf("\n");
98 }
99 break;
100 case MMC_RSP_R3:
101 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
102 cmd->response[0]);
103 break;
104 default:
105 printf("\t\tERROR MMC rsp not supported\n");
106 break;
107 }
5db2fe3a 108#else
8635ff9e 109 ret = mmc->send_cmd(mmc, cmd, data);
5db2fe3a 110#endif
8635ff9e 111 return ret;
272cc70b
AF
112}
113
fdbb873e 114static int mmc_send_status(struct mmc *mmc, int timeout)
5d4fc8d9
RR
115{
116 struct mmc_cmd cmd;
d617c426 117 int err, retries = 5;
5d4fc8d9
RR
118#ifdef CONFIG_MMC_TRACE
119 int status;
120#endif
121
122 cmd.cmdidx = MMC_CMD_SEND_STATUS;
123 cmd.resp_type = MMC_RSP_R1;
aaf3d41a
MV
124 if (!mmc_host_is_spi(mmc))
125 cmd.cmdarg = mmc->rca << 16;
5d4fc8d9
RR
126
127 do {
128 err = mmc_send_cmd(mmc, &cmd, NULL);
d617c426
JK
129 if (!err) {
130 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
131 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
132 MMC_STATE_PRG)
133 break;
134 else if (cmd.response[0] & MMC_STATUS_MASK) {
135 printf("Status Error: 0x%08X\n",
136 cmd.response[0]);
137 return COMM_ERR;
138 }
139 } else if (--retries < 0)
5d4fc8d9 140 return err;
5d4fc8d9
RR
141
142 udelay(1000);
143
5d4fc8d9
RR
144 } while (timeout--);
145
5db2fe3a
RR
146#ifdef CONFIG_MMC_TRACE
147 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
148 printf("CURR STATE:%d\n", status);
149#endif
5b0c942f 150 if (timeout <= 0) {
5d4fc8d9
RR
151 printf("Timeout waiting card ready\n");
152 return TIMEOUT;
153 }
154
155 return 0;
156}
157
fdbb873e 158static int mmc_set_blocklen(struct mmc *mmc, int len)
272cc70b
AF
159{
160 struct mmc_cmd cmd;
161
162 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
163 cmd.resp_type = MMC_RSP_R1;
164 cmd.cmdarg = len;
272cc70b
AF
165
166 return mmc_send_cmd(mmc, &cmd, NULL);
167}
168
169struct mmc *find_mmc_device(int dev_num)
170{
171 struct mmc *m;
172 struct list_head *entry;
173
174 list_for_each(entry, &mmc_devices) {
175 m = list_entry(entry, struct mmc, link);
176
177 if (m->block_dev.dev == dev_num)
178 return m;
179 }
180
181 printf("MMC Device %d not found\n", dev_num);
182
183 return NULL;
184}
185
e6f99a56
LW
186static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
187{
188 struct mmc_cmd cmd;
189 ulong end;
190 int err, start_cmd, end_cmd;
191
192 if (mmc->high_capacity)
193 end = start + blkcnt - 1;
194 else {
195 end = (start + blkcnt - 1) * mmc->write_bl_len;
196 start *= mmc->write_bl_len;
197 }
198
199 if (IS_SD(mmc)) {
200 start_cmd = SD_CMD_ERASE_WR_BLK_START;
201 end_cmd = SD_CMD_ERASE_WR_BLK_END;
202 } else {
203 start_cmd = MMC_CMD_ERASE_GROUP_START;
204 end_cmd = MMC_CMD_ERASE_GROUP_END;
205 }
206
207 cmd.cmdidx = start_cmd;
208 cmd.cmdarg = start;
209 cmd.resp_type = MMC_RSP_R1;
e6f99a56
LW
210
211 err = mmc_send_cmd(mmc, &cmd, NULL);
212 if (err)
213 goto err_out;
214
215 cmd.cmdidx = end_cmd;
216 cmd.cmdarg = end;
217
218 err = mmc_send_cmd(mmc, &cmd, NULL);
219 if (err)
220 goto err_out;
221
222 cmd.cmdidx = MMC_CMD_ERASE;
223 cmd.cmdarg = SECURE_ERASE;
224 cmd.resp_type = MMC_RSP_R1b;
225
226 err = mmc_send_cmd(mmc, &cmd, NULL);
227 if (err)
228 goto err_out;
229
230 return 0;
231
232err_out:
233 puts("mmc erase failed\n");
234 return err;
235}
236
237static unsigned long
ff8fef56 238mmc_berase(int dev_num, lbaint_t start, lbaint_t blkcnt)
e6f99a56
LW
239{
240 int err = 0;
241 struct mmc *mmc = find_mmc_device(dev_num);
242 lbaint_t blk = 0, blk_r = 0;
d2d8afae 243 int timeout = 1000;
e6f99a56
LW
244
245 if (!mmc)
246 return -1;
247
248 if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size))
249 printf("\n\nCaution! Your devices Erase group is 0x%x\n"
ff8fef56
SS
250 "The erase range would be change to "
251 "0x" LBAF "~0x" LBAF "\n\n",
e6f99a56
LW
252 mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
253 ((start + blkcnt + mmc->erase_grp_size)
254 & ~(mmc->erase_grp_size - 1)) - 1);
255
256 while (blk < blkcnt) {
257 blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
258 mmc->erase_grp_size : (blkcnt - blk);
259 err = mmc_erase_t(mmc, start + blk, blk_r);
260 if (err)
261 break;
262
263 blk += blk_r;
d2d8afae
JH
264
265 /* Waiting for the ready status */
266 if (mmc_send_status(mmc, timeout))
267 return 0;
e6f99a56
LW
268 }
269
270 return blk;
271}
272
272cc70b 273static ulong
ff8fef56 274mmc_write_blocks(struct mmc *mmc, lbaint_t start, lbaint_t blkcnt, const void*src)
272cc70b
AF
275{
276 struct mmc_cmd cmd;
277 struct mmc_data data;
5d4fc8d9 278 int timeout = 1000;
272cc70b 279
d2bf29e3 280 if ((start + blkcnt) > mmc->block_dev.lba) {
ff8fef56 281 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
d2bf29e3
LW
282 start + blkcnt, mmc->block_dev.lba);
283 return 0;
284 }
272cc70b 285
a586c0aa
RC
286 if (blkcnt == 0)
287 return 0;
288 else if (blkcnt == 1)
272cc70b 289 cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK;
a586c0aa
RC
290 else
291 cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK;
272cc70b
AF
292
293 if (mmc->high_capacity)
294 cmd.cmdarg = start;
295 else
def412b6 296 cmd.cmdarg = start * mmc->write_bl_len;
272cc70b
AF
297
298 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
299
300 data.src = src;
301 data.blocks = blkcnt;
def412b6 302 data.blocksize = mmc->write_bl_len;
272cc70b
AF
303 data.flags = MMC_DATA_WRITE;
304
def412b6
SS
305 if (mmc_send_cmd(mmc, &cmd, &data)) {
306 printf("mmc write failed\n");
307 return 0;
272cc70b
AF
308 }
309
d52ebf10
TC
310 /* SPI multiblock writes terminate using a special
311 * token, not a STOP_TRANSMISSION request.
312 */
313 if (!mmc_host_is_spi(mmc) && blkcnt > 1) {
272cc70b
AF
314 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
315 cmd.cmdarg = 0;
316 cmd.resp_type = MMC_RSP_R1b;
def412b6
SS
317 if (mmc_send_cmd(mmc, &cmd, NULL)) {
318 printf("mmc fail to send stop cmd\n");
319 return 0;
0158126e 320 }
272cc70b
AF
321 }
322
93ad0d18
JK
323 /* Waiting for the ready status */
324 if (mmc_send_status(mmc, timeout))
325 return 0;
326
272cc70b
AF
327 return blkcnt;
328}
329
0158126e 330static ulong
ff8fef56 331mmc_bwrite(int dev_num, lbaint_t start, lbaint_t blkcnt, const void*src)
0158126e 332{
0158126e
LW
333 lbaint_t cur, blocks_todo = blkcnt;
334
def412b6 335 struct mmc *mmc = find_mmc_device(dev_num);
0158126e 336 if (!mmc)
def412b6 337 return 0;
0158126e 338
def412b6
SS
339 if (mmc_set_blocklen(mmc, mmc->write_bl_len))
340 return 0;
0158126e
LW
341
342 do {
8feafcc4 343 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
0158126e 344 if(mmc_write_blocks(mmc, start, cur, src) != cur)
def412b6 345 return 0;
0158126e
LW
346 blocks_todo -= cur;
347 start += cur;
348 src += cur * mmc->write_bl_len;
349 } while (blocks_todo > 0);
350
351 return blkcnt;
352}
353
ff8fef56 354static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
fdbb873e 355 lbaint_t blkcnt)
272cc70b
AF
356{
357 struct mmc_cmd cmd;
358 struct mmc_data data;
359
4a1a06bc
AS
360 if (blkcnt > 1)
361 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
362 else
363 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
272cc70b
AF
364
365 if (mmc->high_capacity)
4a1a06bc 366 cmd.cmdarg = start;
272cc70b 367 else
4a1a06bc 368 cmd.cmdarg = start * mmc->read_bl_len;
272cc70b
AF
369
370 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
371
372 data.dest = dst;
4a1a06bc 373 data.blocks = blkcnt;
272cc70b
AF
374 data.blocksize = mmc->read_bl_len;
375 data.flags = MMC_DATA_READ;
376
4a1a06bc
AS
377 if (mmc_send_cmd(mmc, &cmd, &data))
378 return 0;
272cc70b 379
4a1a06bc
AS
380 if (blkcnt > 1) {
381 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
382 cmd.cmdarg = 0;
383 cmd.resp_type = MMC_RSP_R1b;
4a1a06bc
AS
384 if (mmc_send_cmd(mmc, &cmd, NULL)) {
385 printf("mmc fail to send stop cmd\n");
386 return 0;
387 }
272cc70b
AF
388 }
389
4a1a06bc 390 return blkcnt;
272cc70b
AF
391}
392
ff8fef56 393static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
272cc70b 394{
4a1a06bc
AS
395 lbaint_t cur, blocks_todo = blkcnt;
396
397 if (blkcnt == 0)
398 return 0;
272cc70b 399
4a1a06bc 400 struct mmc *mmc = find_mmc_device(dev_num);
272cc70b
AF
401 if (!mmc)
402 return 0;
403
d2bf29e3 404 if ((start + blkcnt) > mmc->block_dev.lba) {
ff8fef56 405 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
d2bf29e3
LW
406 start + blkcnt, mmc->block_dev.lba);
407 return 0;
408 }
272cc70b 409
4a1a06bc 410 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
272cc70b 411 return 0;
272cc70b 412
4a1a06bc 413 do {
8feafcc4 414 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
4a1a06bc
AS
415 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
416 return 0;
417 blocks_todo -= cur;
418 start += cur;
419 dst += cur * mmc->read_bl_len;
420 } while (blocks_todo > 0);
272cc70b
AF
421
422 return blkcnt;
423}
424
fdbb873e 425static int mmc_go_idle(struct mmc *mmc)
272cc70b
AF
426{
427 struct mmc_cmd cmd;
428 int err;
429
430 udelay(1000);
431
432 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
433 cmd.cmdarg = 0;
434 cmd.resp_type = MMC_RSP_NONE;
272cc70b
AF
435
436 err = mmc_send_cmd(mmc, &cmd, NULL);
437
438 if (err)
439 return err;
440
441 udelay(2000);
442
443 return 0;
444}
445
fdbb873e 446static int sd_send_op_cond(struct mmc *mmc)
272cc70b
AF
447{
448 int timeout = 1000;
449 int err;
450 struct mmc_cmd cmd;
451
452 do {
453 cmd.cmdidx = MMC_CMD_APP_CMD;
454 cmd.resp_type = MMC_RSP_R1;
455 cmd.cmdarg = 0;
272cc70b
AF
456
457 err = mmc_send_cmd(mmc, &cmd, NULL);
458
459 if (err)
460 return err;
461
462 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
463 cmd.resp_type = MMC_RSP_R3;
250de12b
SB
464
465 /*
466 * Most cards do not answer if some reserved bits
467 * in the ocr are set. However, Some controller
468 * can set bit 7 (reserved for low voltages), but
469 * how to manage low voltages SD card is not yet
470 * specified.
471 */
d52ebf10
TC
472 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
473 (mmc->voltages & 0xff8000);
272cc70b
AF
474
475 if (mmc->version == SD_VERSION_2)
476 cmd.cmdarg |= OCR_HCS;
477
478 err = mmc_send_cmd(mmc, &cmd, NULL);
479
480 if (err)
481 return err;
482
483 udelay(1000);
484 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
485
486 if (timeout <= 0)
487 return UNUSABLE_ERR;
488
489 if (mmc->version != SD_VERSION_2)
490 mmc->version = SD_VERSION_1_0;
491
d52ebf10
TC
492 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
493 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
494 cmd.resp_type = MMC_RSP_R3;
495 cmd.cmdarg = 0;
d52ebf10
TC
496
497 err = mmc_send_cmd(mmc, &cmd, NULL);
498
499 if (err)
500 return err;
501 }
502
998be3dd 503 mmc->ocr = cmd.response[0];
272cc70b
AF
504
505 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
506 mmc->rca = 0;
507
508 return 0;
509}
510
e9550449
CLC
511/* We pass in the cmd since otherwise the init seems to fail */
512static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
513 int use_arg)
272cc70b 514{
272cc70b
AF
515 int err;
516
e9550449
CLC
517 cmd->cmdidx = MMC_CMD_SEND_OP_COND;
518 cmd->resp_type = MMC_RSP_R3;
519 cmd->cmdarg = 0;
520 if (use_arg && !mmc_host_is_spi(mmc)) {
521 cmd->cmdarg =
522 (mmc->voltages &
523 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
524 (mmc->op_cond_response & OCR_ACCESS_MODE);
525
526 if (mmc->host_caps & MMC_MODE_HC)
527 cmd->cmdarg |= OCR_HCS;
528 }
529 err = mmc_send_cmd(mmc, cmd, NULL);
530 if (err)
531 return err;
532 mmc->op_cond_response = cmd->response[0];
533 return 0;
534}
535
536int mmc_send_op_cond(struct mmc *mmc)
537{
538 struct mmc_cmd cmd;
539 int err, i;
540
272cc70b
AF
541 /* Some cards seem to need this */
542 mmc_go_idle(mmc);
543
31cacbab 544 /* Asking to the card its capabilities */
e9550449
CLC
545 mmc->op_cond_pending = 1;
546 for (i = 0; i < 2; i++) {
547 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
548 if (err)
549 return err;
cd6881b5 550
e9550449
CLC
551 /* exit if not busy (flag seems to be inverted) */
552 if (mmc->op_cond_response & OCR_BUSY)
553 return 0;
554 }
555 return IN_PROGRESS;
556}
cd6881b5 557
e9550449
CLC
558int mmc_complete_op_cond(struct mmc *mmc)
559{
560 struct mmc_cmd cmd;
561 int timeout = 1000;
562 uint start;
563 int err;
cd6881b5 564
e9550449
CLC
565 mmc->op_cond_pending = 0;
566 start = get_timer(0);
272cc70b 567 do {
e9550449 568 err = mmc_send_op_cond_iter(mmc, &cmd, 1);
272cc70b
AF
569 if (err)
570 return err;
e9550449
CLC
571 if (get_timer(start) > timeout)
572 return UNUSABLE_ERR;
573 udelay(100);
574 } while (!(mmc->op_cond_response & OCR_BUSY));
272cc70b 575
d52ebf10
TC
576 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
577 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
578 cmd.resp_type = MMC_RSP_R3;
579 cmd.cmdarg = 0;
d52ebf10
TC
580
581 err = mmc_send_cmd(mmc, &cmd, NULL);
582
583 if (err)
584 return err;
585 }
586
272cc70b 587 mmc->version = MMC_VERSION_UNKNOWN;
998be3dd 588 mmc->ocr = cmd.response[0];
272cc70b
AF
589
590 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
591 mmc->rca = 0;
592
593 return 0;
594}
595
596
fdbb873e 597static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
272cc70b
AF
598{
599 struct mmc_cmd cmd;
600 struct mmc_data data;
601 int err;
602
603 /* Get the Card Status Register */
604 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
605 cmd.resp_type = MMC_RSP_R1;
606 cmd.cmdarg = 0;
272cc70b 607
cdfd1ac6 608 data.dest = (char *)ext_csd;
272cc70b 609 data.blocks = 1;
8bfa195e 610 data.blocksize = MMC_MAX_BLOCK_LEN;
272cc70b
AF
611 data.flags = MMC_DATA_READ;
612
613 err = mmc_send_cmd(mmc, &cmd, &data);
614
615 return err;
616}
617
618
fdbb873e 619static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
272cc70b
AF
620{
621 struct mmc_cmd cmd;
5d4fc8d9
RR
622 int timeout = 1000;
623 int ret;
272cc70b
AF
624
625 cmd.cmdidx = MMC_CMD_SWITCH;
626 cmd.resp_type = MMC_RSP_R1b;
627 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
5d4fc8d9
RR
628 (index << 16) |
629 (value << 8);
272cc70b 630
5d4fc8d9
RR
631 ret = mmc_send_cmd(mmc, &cmd, NULL);
632
633 /* Waiting for the ready status */
93ad0d18
JK
634 if (!ret)
635 ret = mmc_send_status(mmc, timeout);
5d4fc8d9
RR
636
637 return ret;
638
272cc70b
AF
639}
640
fdbb873e 641static int mmc_change_freq(struct mmc *mmc)
272cc70b 642{
8bfa195e 643 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
272cc70b
AF
644 char cardtype;
645 int err;
646
647 mmc->card_caps = 0;
648
d52ebf10
TC
649 if (mmc_host_is_spi(mmc))
650 return 0;
651
272cc70b
AF
652 /* Only version 4 supports high-speed */
653 if (mmc->version < MMC_VERSION_4)
654 return 0;
655
272cc70b
AF
656 err = mmc_send_ext_csd(mmc, ext_csd);
657
658 if (err)
659 return err;
660
0560db18 661 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
272cc70b
AF
662
663 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
664
665 if (err)
666 return err;
667
668 /* Now check to see that it worked */
669 err = mmc_send_ext_csd(mmc, ext_csd);
670
671 if (err)
672 return err;
673
674 /* No high-speed support */
0560db18 675 if (!ext_csd[EXT_CSD_HS_TIMING])
272cc70b
AF
676 return 0;
677
678 /* High Speed is set, there are two types: 52MHz and 26MHz */
679 if (cardtype & MMC_HS_52MHZ)
680 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
681 else
682 mmc->card_caps |= MMC_MODE_HS;
683
684 return 0;
685}
686
f866a46d
SW
687static int mmc_set_capacity(struct mmc *mmc, int part_num)
688{
689 switch (part_num) {
690 case 0:
691 mmc->capacity = mmc->capacity_user;
692 break;
693 case 1:
694 case 2:
695 mmc->capacity = mmc->capacity_boot;
696 break;
697 case 3:
698 mmc->capacity = mmc->capacity_rpmb;
699 break;
700 case 4:
701 case 5:
702 case 6:
703 case 7:
704 mmc->capacity = mmc->capacity_gp[part_num - 4];
705 break;
706 default:
707 return -1;
708 }
709
710 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
711
712 return 0;
713}
714
bc897b1d
LW
715int mmc_switch_part(int dev_num, unsigned int part_num)
716{
717 struct mmc *mmc = find_mmc_device(dev_num);
f866a46d 718 int ret;
bc897b1d
LW
719
720 if (!mmc)
721 return -1;
722
f866a46d
SW
723 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
724 (mmc->part_config & ~PART_ACCESS_MASK)
725 | (part_num & PART_ACCESS_MASK));
726 if (ret)
727 return ret;
728
729 return mmc_set_capacity(mmc, part_num);
bc897b1d
LW
730}
731
48972d90
TR
732int mmc_getcd(struct mmc *mmc)
733{
734 int cd;
735
736 cd = board_mmc_getcd(mmc);
737
d4e1da4e
PK
738 if (cd < 0) {
739 if (mmc->getcd)
740 cd = mmc->getcd(mmc);
741 else
742 cd = 1;
743 }
48972d90
TR
744
745 return cd;
746}
747
fdbb873e 748static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
272cc70b
AF
749{
750 struct mmc_cmd cmd;
751 struct mmc_data data;
752
753 /* Switch the frequency */
754 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
755 cmd.resp_type = MMC_RSP_R1;
756 cmd.cmdarg = (mode << 31) | 0xffffff;
757 cmd.cmdarg &= ~(0xf << (group * 4));
758 cmd.cmdarg |= value << (group * 4);
272cc70b
AF
759
760 data.dest = (char *)resp;
761 data.blocksize = 64;
762 data.blocks = 1;
763 data.flags = MMC_DATA_READ;
764
765 return mmc_send_cmd(mmc, &cmd, &data);
766}
767
768
fdbb873e 769static int sd_change_freq(struct mmc *mmc)
272cc70b
AF
770{
771 int err;
772 struct mmc_cmd cmd;
f781dd38
A
773 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
774 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
272cc70b
AF
775 struct mmc_data data;
776 int timeout;
777
778 mmc->card_caps = 0;
779
d52ebf10
TC
780 if (mmc_host_is_spi(mmc))
781 return 0;
782
272cc70b
AF
783 /* Read the SCR to find out if this card supports higher speeds */
784 cmd.cmdidx = MMC_CMD_APP_CMD;
785 cmd.resp_type = MMC_RSP_R1;
786 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
787
788 err = mmc_send_cmd(mmc, &cmd, NULL);
789
790 if (err)
791 return err;
792
793 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
794 cmd.resp_type = MMC_RSP_R1;
795 cmd.cmdarg = 0;
272cc70b
AF
796
797 timeout = 3;
798
799retry_scr:
f781dd38 800 data.dest = (char *)scr;
272cc70b
AF
801 data.blocksize = 8;
802 data.blocks = 1;
803 data.flags = MMC_DATA_READ;
804
805 err = mmc_send_cmd(mmc, &cmd, &data);
806
807 if (err) {
808 if (timeout--)
809 goto retry_scr;
810
811 return err;
812 }
813
4e3d89ba
YK
814 mmc->scr[0] = __be32_to_cpu(scr[0]);
815 mmc->scr[1] = __be32_to_cpu(scr[1]);
272cc70b
AF
816
817 switch ((mmc->scr[0] >> 24) & 0xf) {
818 case 0:
819 mmc->version = SD_VERSION_1_0;
820 break;
821 case 1:
822 mmc->version = SD_VERSION_1_10;
823 break;
824 case 2:
825 mmc->version = SD_VERSION_2;
1741c64d
JC
826 if ((mmc->scr[0] >> 15) & 0x1)
827 mmc->version = SD_VERSION_3;
272cc70b
AF
828 break;
829 default:
830 mmc->version = SD_VERSION_1_0;
831 break;
832 }
833
b44c7083
AS
834 if (mmc->scr[0] & SD_DATA_4BIT)
835 mmc->card_caps |= MMC_MODE_4BIT;
836
272cc70b
AF
837 /* Version 1.0 doesn't support switching */
838 if (mmc->version == SD_VERSION_1_0)
839 return 0;
840
841 timeout = 4;
842 while (timeout--) {
843 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
f781dd38 844 (u8 *)switch_status);
272cc70b
AF
845
846 if (err)
847 return err;
848
849 /* The high-speed function is busy. Try again */
4e3d89ba 850 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
272cc70b
AF
851 break;
852 }
853
272cc70b 854 /* If high-speed isn't supported, we return */
4e3d89ba 855 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
272cc70b
AF
856 return 0;
857
2c3fbf4c
ML
858 /*
859 * If the host doesn't support SD_HIGHSPEED, do not switch card to
860 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
861 * This can avoid furthur problem when the card runs in different
862 * mode between the host.
863 */
864 if (!((mmc->host_caps & MMC_MODE_HS_52MHz) &&
865 (mmc->host_caps & MMC_MODE_HS)))
866 return 0;
867
f781dd38 868 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
272cc70b
AF
869
870 if (err)
871 return err;
872
4e3d89ba 873 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
272cc70b
AF
874 mmc->card_caps |= MMC_MODE_HS;
875
876 return 0;
877}
878
879/* frequency bases */
880/* divided by 10 to be nice to platforms without floating point */
5f837c2c 881static const int fbase[] = {
272cc70b
AF
882 10000,
883 100000,
884 1000000,
885 10000000,
886};
887
888/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
889 * to platforms without floating point.
890 */
5f837c2c 891static const int multipliers[] = {
272cc70b
AF
892 0, /* reserved */
893 10,
894 12,
895 13,
896 15,
897 20,
898 25,
899 30,
900 35,
901 40,
902 45,
903 50,
904 55,
905 60,
906 70,
907 80,
908};
909
fdbb873e 910static void mmc_set_ios(struct mmc *mmc)
272cc70b
AF
911{
912 mmc->set_ios(mmc);
913}
914
915void mmc_set_clock(struct mmc *mmc, uint clock)
916{
917 if (clock > mmc->f_max)
918 clock = mmc->f_max;
919
920 if (clock < mmc->f_min)
921 clock = mmc->f_min;
922
923 mmc->clock = clock;
924
925 mmc_set_ios(mmc);
926}
927
fdbb873e 928static void mmc_set_bus_width(struct mmc *mmc, uint width)
272cc70b
AF
929{
930 mmc->bus_width = width;
931
932 mmc_set_ios(mmc);
933}
934
fdbb873e 935static int mmc_startup(struct mmc *mmc)
272cc70b 936{
f866a46d 937 int err, i;
272cc70b 938 uint mult, freq;
639b7827 939 u64 cmult, csize, capacity;
272cc70b 940 struct mmc_cmd cmd;
8bfa195e
SG
941 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
942 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
5d4fc8d9 943 int timeout = 1000;
272cc70b 944
d52ebf10
TC
945#ifdef CONFIG_MMC_SPI_CRC_ON
946 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
947 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
948 cmd.resp_type = MMC_RSP_R1;
949 cmd.cmdarg = 1;
d52ebf10
TC
950 err = mmc_send_cmd(mmc, &cmd, NULL);
951
952 if (err)
953 return err;
954 }
955#endif
956
272cc70b 957 /* Put the Card in Identify Mode */
d52ebf10
TC
958 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
959 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
272cc70b
AF
960 cmd.resp_type = MMC_RSP_R2;
961 cmd.cmdarg = 0;
272cc70b
AF
962
963 err = mmc_send_cmd(mmc, &cmd, NULL);
964
965 if (err)
966 return err;
967
968 memcpy(mmc->cid, cmd.response, 16);
969
970 /*
971 * For MMC cards, set the Relative Address.
972 * For SD cards, get the Relatvie Address.
973 * This also puts the cards into Standby State
974 */
d52ebf10
TC
975 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
976 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
977 cmd.cmdarg = mmc->rca << 16;
978 cmd.resp_type = MMC_RSP_R6;
272cc70b 979
d52ebf10 980 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 981
d52ebf10
TC
982 if (err)
983 return err;
272cc70b 984
d52ebf10
TC
985 if (IS_SD(mmc))
986 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
987 }
272cc70b
AF
988
989 /* Get the Card-Specific Data */
990 cmd.cmdidx = MMC_CMD_SEND_CSD;
991 cmd.resp_type = MMC_RSP_R2;
992 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
993
994 err = mmc_send_cmd(mmc, &cmd, NULL);
995
5d4fc8d9
RR
996 /* Waiting for the ready status */
997 mmc_send_status(mmc, timeout);
998
272cc70b
AF
999 if (err)
1000 return err;
1001
998be3dd
RV
1002 mmc->csd[0] = cmd.response[0];
1003 mmc->csd[1] = cmd.response[1];
1004 mmc->csd[2] = cmd.response[2];
1005 mmc->csd[3] = cmd.response[3];
272cc70b
AF
1006
1007 if (mmc->version == MMC_VERSION_UNKNOWN) {
0b453ffe 1008 int version = (cmd.response[0] >> 26) & 0xf;
272cc70b
AF
1009
1010 switch (version) {
1011 case 0:
1012 mmc->version = MMC_VERSION_1_2;
1013 break;
1014 case 1:
1015 mmc->version = MMC_VERSION_1_4;
1016 break;
1017 case 2:
1018 mmc->version = MMC_VERSION_2_2;
1019 break;
1020 case 3:
1021 mmc->version = MMC_VERSION_3;
1022 break;
1023 case 4:
1024 mmc->version = MMC_VERSION_4;
1025 break;
1026 default:
1027 mmc->version = MMC_VERSION_1_2;
1028 break;
1029 }
1030 }
1031
1032 /* divide frequency by 10, since the mults are 10x bigger */
0b453ffe
RV
1033 freq = fbase[(cmd.response[0] & 0x7)];
1034 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
272cc70b
AF
1035
1036 mmc->tran_speed = freq * mult;
1037
998be3dd 1038 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
272cc70b
AF
1039
1040 if (IS_SD(mmc))
1041 mmc->write_bl_len = mmc->read_bl_len;
1042 else
998be3dd 1043 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
272cc70b
AF
1044
1045 if (mmc->high_capacity) {
1046 csize = (mmc->csd[1] & 0x3f) << 16
1047 | (mmc->csd[2] & 0xffff0000) >> 16;
1048 cmult = 8;
1049 } else {
1050 csize = (mmc->csd[1] & 0x3ff) << 2
1051 | (mmc->csd[2] & 0xc0000000) >> 30;
1052 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1053 }
1054
f866a46d
SW
1055 mmc->capacity_user = (csize + 1) << (cmult + 2);
1056 mmc->capacity_user *= mmc->read_bl_len;
1057 mmc->capacity_boot = 0;
1058 mmc->capacity_rpmb = 0;
1059 for (i = 0; i < 4; i++)
1060 mmc->capacity_gp[i] = 0;
272cc70b 1061
8bfa195e
SG
1062 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1063 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b 1064
8bfa195e
SG
1065 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1066 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b
AF
1067
1068 /* Select the card, and put it into Transfer Mode */
d52ebf10
TC
1069 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1070 cmd.cmdidx = MMC_CMD_SELECT_CARD;
fe8f7066 1071 cmd.resp_type = MMC_RSP_R1;
d52ebf10 1072 cmd.cmdarg = mmc->rca << 16;
d52ebf10 1073 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 1074
d52ebf10
TC
1075 if (err)
1076 return err;
1077 }
272cc70b 1078
e6f99a56
LW
1079 /*
1080 * For SD, its erase group is always one sector
1081 */
1082 mmc->erase_grp_size = 1;
bc897b1d 1083 mmc->part_config = MMCPART_NOAVAILABLE;
d23e2c09
SG
1084 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1085 /* check ext_csd version and capacity */
1086 err = mmc_send_ext_csd(mmc, ext_csd);
fdbb873e 1087 if (!err && (ext_csd[EXT_CSD_REV] >= 2)) {
639b7827
YS
1088 /*
1089 * According to the JEDEC Standard, the value of
1090 * ext_csd's capacity is valid if the value is more
1091 * than 2GB
1092 */
0560db18
LW
1093 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1094 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1095 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1096 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
8bfa195e 1097 capacity *= MMC_MAX_BLOCK_LEN;
b1f1e821 1098 if ((capacity >> 20) > 2 * 1024)
f866a46d 1099 mmc->capacity_user = capacity;
d23e2c09 1100 }
bc897b1d 1101
64f4a619
JC
1102 switch (ext_csd[EXT_CSD_REV]) {
1103 case 1:
1104 mmc->version = MMC_VERSION_4_1;
1105 break;
1106 case 2:
1107 mmc->version = MMC_VERSION_4_2;
1108 break;
1109 case 3:
1110 mmc->version = MMC_VERSION_4_3;
1111 break;
1112 case 5:
1113 mmc->version = MMC_VERSION_4_41;
1114 break;
1115 case 6:
1116 mmc->version = MMC_VERSION_4_5;
1117 break;
1118 }
1119
e6f99a56
LW
1120 /*
1121 * Check whether GROUP_DEF is set, if yes, read out
1122 * group size from ext_csd directly, or calculate
1123 * the group size from the csd value.
1124 */
8bfa195e 1125 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF]) {
0560db18 1126 mmc->erase_grp_size =
8bfa195e
SG
1127 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] *
1128 MMC_MAX_BLOCK_LEN * 1024;
1129 } else {
e6f99a56
LW
1130 int erase_gsz, erase_gmul;
1131 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1132 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1133 mmc->erase_grp_size = (erase_gsz + 1)
1134 * (erase_gmul + 1);
1135 }
1136
bc897b1d 1137 /* store the partition info of emmc */
8948ea83
SW
1138 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1139 ext_csd[EXT_CSD_BOOT_MULT])
0560db18 1140 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
f866a46d
SW
1141
1142 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1143
1144 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1145
1146 for (i = 0; i < 4; i++) {
1147 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1148 mmc->capacity_gp[i] = (ext_csd[idx + 2] << 16) +
1149 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1150 mmc->capacity_gp[i] *=
1151 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1152 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1153 }
d23e2c09
SG
1154 }
1155
f866a46d
SW
1156 err = mmc_set_capacity(mmc, mmc->part_num);
1157 if (err)
1158 return err;
1159
272cc70b
AF
1160 if (IS_SD(mmc))
1161 err = sd_change_freq(mmc);
1162 else
1163 err = mmc_change_freq(mmc);
1164
1165 if (err)
1166 return err;
1167
1168 /* Restrict card's capabilities by what the host can do */
1169 mmc->card_caps &= mmc->host_caps;
1170
1171 if (IS_SD(mmc)) {
1172 if (mmc->card_caps & MMC_MODE_4BIT) {
1173 cmd.cmdidx = MMC_CMD_APP_CMD;
1174 cmd.resp_type = MMC_RSP_R1;
1175 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
1176
1177 err = mmc_send_cmd(mmc, &cmd, NULL);
1178 if (err)
1179 return err;
1180
1181 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1182 cmd.resp_type = MMC_RSP_R1;
1183 cmd.cmdarg = 2;
272cc70b
AF
1184 err = mmc_send_cmd(mmc, &cmd, NULL);
1185 if (err)
1186 return err;
1187
1188 mmc_set_bus_width(mmc, 4);
1189 }
1190
1191 if (mmc->card_caps & MMC_MODE_HS)
ad5fd922 1192 mmc->tran_speed = 50000000;
272cc70b 1193 else
ad5fd922 1194 mmc->tran_speed = 25000000;
272cc70b 1195 } else {
7798f6db
AF
1196 int idx;
1197
1198 /* An array of possible bus widths in order of preference */
1199 static unsigned ext_csd_bits[] = {
1200 EXT_CSD_BUS_WIDTH_8,
1201 EXT_CSD_BUS_WIDTH_4,
1202 EXT_CSD_BUS_WIDTH_1,
1203 };
1204
1205 /* An array to map CSD bus widths to host cap bits */
1206 static unsigned ext_to_hostcaps[] = {
1207 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1208 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1209 };
1210
1211 /* An array to map chosen bus width to an integer */
1212 static unsigned widths[] = {
1213 8, 4, 1,
1214 };
1215
1216 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1217 unsigned int extw = ext_csd_bits[idx];
1218
1219 /*
1220 * Check to make sure the controller supports
1221 * this bus width, if it's more than 1
1222 */
1223 if (extw != EXT_CSD_BUS_WIDTH_1 &&
1224 !(mmc->host_caps & ext_to_hostcaps[extw]))
1225 continue;
1226
272cc70b 1227 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
7798f6db 1228 EXT_CSD_BUS_WIDTH, extw);
272cc70b
AF
1229
1230 if (err)
4137894e 1231 continue;
272cc70b 1232
7798f6db 1233 mmc_set_bus_width(mmc, widths[idx]);
4137894e
LW
1234
1235 err = mmc_send_ext_csd(mmc, test_csd);
1236 if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \
1237 == test_csd[EXT_CSD_PARTITIONING_SUPPORT]
1238 && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \
1239 == test_csd[EXT_CSD_ERASE_GROUP_DEF] \
1240 && ext_csd[EXT_CSD_REV] \
1241 == test_csd[EXT_CSD_REV]
1242 && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \
1243 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1244 && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \
1245 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) {
1246
7798f6db 1247 mmc->card_caps |= ext_to_hostcaps[extw];
4137894e
LW
1248 break;
1249 }
272cc70b
AF
1250 }
1251
1252 if (mmc->card_caps & MMC_MODE_HS) {
1253 if (mmc->card_caps & MMC_MODE_HS_52MHz)
ad5fd922 1254 mmc->tran_speed = 52000000;
272cc70b 1255 else
ad5fd922
JC
1256 mmc->tran_speed = 26000000;
1257 }
272cc70b
AF
1258 }
1259
ad5fd922
JC
1260 mmc_set_clock(mmc, mmc->tran_speed);
1261
272cc70b
AF
1262 /* fill in device description */
1263 mmc->block_dev.lun = 0;
1264 mmc->block_dev.type = 0;
1265 mmc->block_dev.blksz = mmc->read_bl_len;
0472fbfd 1266 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
9b1f942c 1267 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
babce5f6
TH
1268 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1269 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1270 (mmc->cid[3] >> 16) & 0xffff);
1271 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1272 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1273 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1274 (mmc->cid[2] >> 24) & 0xff);
1275 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1276 (mmc->cid[2] >> 16) & 0xf);
122efd43 1277#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
272cc70b 1278 init_part(&mmc->block_dev);
122efd43 1279#endif
272cc70b
AF
1280
1281 return 0;
1282}
1283
fdbb873e 1284static int mmc_send_if_cond(struct mmc *mmc)
272cc70b
AF
1285{
1286 struct mmc_cmd cmd;
1287 int err;
1288
1289 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1290 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1291 cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa;
1292 cmd.resp_type = MMC_RSP_R7;
272cc70b
AF
1293
1294 err = mmc_send_cmd(mmc, &cmd, NULL);
1295
1296 if (err)
1297 return err;
1298
998be3dd 1299 if ((cmd.response[0] & 0xff) != 0xaa)
272cc70b
AF
1300 return UNUSABLE_ERR;
1301 else
1302 mmc->version = SD_VERSION_2;
1303
1304 return 0;
1305}
1306
1307int mmc_register(struct mmc *mmc)
1308{
1309 /* Setup the universal parts of the block interface just once */
1310 mmc->block_dev.if_type = IF_TYPE_MMC;
1311 mmc->block_dev.dev = cur_dev_num++;
1312 mmc->block_dev.removable = 1;
1313 mmc->block_dev.block_read = mmc_bread;
1314 mmc->block_dev.block_write = mmc_bwrite;
e6f99a56 1315 mmc->block_dev.block_erase = mmc_berase;
8feafcc4
JR
1316 if (!mmc->b_max)
1317 mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
272cc70b
AF
1318
1319 INIT_LIST_HEAD (&mmc->link);
1320
1321 list_add_tail (&mmc->link, &mmc_devices);
1322
1323 return 0;
1324}
1325
df3fc526 1326#ifdef CONFIG_PARTITIONS
272cc70b
AF
1327block_dev_desc_t *mmc_get_dev(int dev)
1328{
1329 struct mmc *mmc = find_mmc_device(dev);
6bb4b4bc 1330 if (!mmc || mmc_init(mmc))
40242bc3 1331 return NULL;
272cc70b 1332
40242bc3 1333 return &mmc->block_dev;
272cc70b 1334}
df3fc526 1335#endif
272cc70b 1336
e9550449 1337int mmc_start_init(struct mmc *mmc)
272cc70b 1338{
afd5932b 1339 int err;
272cc70b 1340
48972d90
TR
1341 if (mmc_getcd(mmc) == 0) {
1342 mmc->has_init = 0;
1343 printf("MMC: no card present\n");
1344 return NO_CARD_ERR;
1345 }
1346
bc897b1d
LW
1347 if (mmc->has_init)
1348 return 0;
1349
272cc70b
AF
1350 err = mmc->init(mmc);
1351
1352 if (err)
1353 return err;
1354
b86b85e2
IY
1355 mmc_set_bus_width(mmc, 1);
1356 mmc_set_clock(mmc, 1);
1357
272cc70b
AF
1358 /* Reset the Card */
1359 err = mmc_go_idle(mmc);
1360
1361 if (err)
1362 return err;
1363
bc897b1d
LW
1364 /* The internal partition reset to user partition(0) at every CMD0*/
1365 mmc->part_num = 0;
1366
272cc70b 1367 /* Test for SD version 2 */
afd5932b 1368 err = mmc_send_if_cond(mmc);
272cc70b 1369
272cc70b
AF
1370 /* Now try to get the SD card's operating condition */
1371 err = sd_send_op_cond(mmc);
1372
1373 /* If the command timed out, we check for an MMC card */
1374 if (err == TIMEOUT) {
1375 err = mmc_send_op_cond(mmc);
1376
e9550449 1377 if (err && err != IN_PROGRESS) {
272cc70b
AF
1378 printf("Card did not respond to voltage select!\n");
1379 return UNUSABLE_ERR;
1380 }
1381 }
1382
e9550449
CLC
1383 if (err == IN_PROGRESS)
1384 mmc->init_in_progress = 1;
1385
1386 return err;
1387}
1388
1389static int mmc_complete_init(struct mmc *mmc)
1390{
1391 int err = 0;
1392
1393 if (mmc->op_cond_pending)
1394 err = mmc_complete_op_cond(mmc);
1395
1396 if (!err)
1397 err = mmc_startup(mmc);
bc897b1d
LW
1398 if (err)
1399 mmc->has_init = 0;
1400 else
1401 mmc->has_init = 1;
e9550449
CLC
1402 mmc->init_in_progress = 0;
1403 return err;
1404}
1405
1406int mmc_init(struct mmc *mmc)
1407{
1408 int err = IN_PROGRESS;
1409 unsigned start = get_timer(0);
1410
1411 if (mmc->has_init)
1412 return 0;
1413 if (!mmc->init_in_progress)
1414 err = mmc_start_init(mmc);
1415
1416 if (!err || err == IN_PROGRESS)
1417 err = mmc_complete_init(mmc);
1418 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
bc897b1d 1419 return err;
272cc70b
AF
1420}
1421
1422/*
1423 * CPU and board-specific MMC initializations. Aliased function
1424 * signals caller to move on
1425 */
1426static int __def_mmc_init(bd_t *bis)
1427{
1428 return -1;
1429}
1430
f9a109b3
PT
1431int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
1432int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
272cc70b
AF
1433
1434void print_mmc_devices(char separator)
1435{
1436 struct mmc *m;
1437 struct list_head *entry;
1438
1439 list_for_each(entry, &mmc_devices) {
1440 m = list_entry(entry, struct mmc, link);
1441
1442 printf("%s: %d", m->name, m->block_dev.dev);
1443
1444 if (entry->next != &mmc_devices)
1445 printf("%c ", separator);
1446 }
1447
1448 printf("\n");
1449}
1450
ea6ebe21
LW
1451int get_mmc_num(void)
1452{
1453 return cur_dev_num;
1454}
1455
e9550449
CLC
1456void mmc_set_preinit(struct mmc *mmc, int preinit)
1457{
1458 mmc->preinit = preinit;
1459}
1460
1461static void do_preinit(void)
1462{
1463 struct mmc *m;
1464 struct list_head *entry;
1465
1466 list_for_each(entry, &mmc_devices) {
1467 m = list_entry(entry, struct mmc, link);
1468
1469 if (m->preinit)
1470 mmc_start_init(m);
1471 }
1472}
1473
1474
272cc70b
AF
1475int mmc_initialize(bd_t *bis)
1476{
1477 INIT_LIST_HEAD (&mmc_devices);
1478 cur_dev_num = 0;
1479
1480 if (board_mmc_init(bis) < 0)
1481 cpu_mmc_init(bis);
1482
bb0dc108 1483#ifndef CONFIG_SPL_BUILD
272cc70b 1484 print_mmc_devices(',');
bb0dc108 1485#endif
272cc70b 1486
e9550449 1487 do_preinit();
272cc70b
AF
1488 return 0;
1489}
3690d6d6
A
1490
1491#ifdef CONFIG_SUPPORT_EMMC_BOOT
1492/*
1493 * This function changes the size of boot partition and the size of rpmb
1494 * partition present on EMMC devices.
1495 *
1496 * Input Parameters:
1497 * struct *mmc: pointer for the mmc device strcuture
1498 * bootsize: size of boot partition
1499 * rpmbsize: size of rpmb partition
1500 *
1501 * Returns 0 on success.
1502 */
1503
1504int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1505 unsigned long rpmbsize)
1506{
1507 int err;
1508 struct mmc_cmd cmd;
1509
1510 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1511 cmd.cmdidx = MMC_CMD_RES_MAN;
1512 cmd.resp_type = MMC_RSP_R1b;
1513 cmd.cmdarg = MMC_CMD62_ARG1;
1514
1515 err = mmc_send_cmd(mmc, &cmd, NULL);
1516 if (err) {
1517 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1518 return err;
1519 }
1520
1521 /* Boot partition changing mode */
1522 cmd.cmdidx = MMC_CMD_RES_MAN;
1523 cmd.resp_type = MMC_RSP_R1b;
1524 cmd.cmdarg = MMC_CMD62_ARG2;
1525
1526 err = mmc_send_cmd(mmc, &cmd, NULL);
1527 if (err) {
1528 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1529 return err;
1530 }
1531 /* boot partition size is multiple of 128KB */
1532 bootsize = (bootsize * 1024) / 128;
1533
1534 /* Arg: boot partition size */
1535 cmd.cmdidx = MMC_CMD_RES_MAN;
1536 cmd.resp_type = MMC_RSP_R1b;
1537 cmd.cmdarg = bootsize;
1538
1539 err = mmc_send_cmd(mmc, &cmd, NULL);
1540 if (err) {
1541 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1542 return err;
1543 }
1544 /* RPMB partition size is multiple of 128KB */
1545 rpmbsize = (rpmbsize * 1024) / 128;
1546 /* Arg: RPMB partition size */
1547 cmd.cmdidx = MMC_CMD_RES_MAN;
1548 cmd.resp_type = MMC_RSP_R1b;
1549 cmd.cmdarg = rpmbsize;
1550
1551 err = mmc_send_cmd(mmc, &cmd, NULL);
1552 if (err) {
1553 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1554 return err;
1555 }
1556 return 0;
1557}
1558
1559/*
1560 * This function shall form and send the commands to open / close the
1561 * boot partition specified by user.
1562 *
1563 * Input Parameters:
1564 * ack: 0x0 - No boot acknowledge sent (default)
1565 * 0x1 - Boot acknowledge sent during boot operation
1566 * part_num: User selects boot data that will be sent to master
1567 * 0x0 - Device not boot enabled (default)
1568 * 0x1 - Boot partition 1 enabled for boot
1569 * 0x2 - Boot partition 2 enabled for boot
1570 * access: User selects partitions to access
1571 * 0x0 : No access to boot partition (default)
1572 * 0x1 : R/W boot partition 1
1573 * 0x2 : R/W boot partition 2
1574 * 0x3 : R/W Replay Protected Memory Block (RPMB)
1575 *
1576 * Returns 0 on success.
1577 */
1578int mmc_boot_part_access(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1579{
1580 int err;
1581 struct mmc_cmd cmd;
1582
1583 /* Boot ack enable, boot partition enable , boot partition access */
1584 cmd.cmdidx = MMC_CMD_SWITCH;
1585 cmd.resp_type = MMC_RSP_R1b;
1586
1587 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
1588 (EXT_CSD_PART_CONF << 16) |
1589 ((EXT_CSD_BOOT_ACK(ack) |
1590 EXT_CSD_BOOT_PART_NUM(part_num) |
1591 EXT_CSD_PARTITION_ACCESS(access)) << 8);
1592
1593 err = mmc_send_cmd(mmc, &cmd, NULL);
1594 if (err) {
1595 if (access) {
1596 debug("mmc boot partition#%d open fail:Error1 = %d\n",
1597 part_num, err);
1598 } else {
1599 debug("mmc boot partition#%d close fail:Error = %d\n",
1600 part_num, err);
1601 }
1602 return err;
1603 }
1604
1605 if (access) {
1606 /* 4bit transfer mode at booting time. */
1607 cmd.cmdidx = MMC_CMD_SWITCH;
1608 cmd.resp_type = MMC_RSP_R1b;
1609
1610 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
1611 (EXT_CSD_BOOT_BUS_WIDTH << 16) |
1612 ((1 << 0) << 8);
1613
1614 err = mmc_send_cmd(mmc, &cmd, NULL);
1615 if (err) {
1616 debug("mmc boot partition#%d open fail:Error2 = %d\n",
1617 part_num, err);
1618 return err;
1619 }
1620 }
1621 return 0;
1622}
1623#endif