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272cc70b AF |
1 | /* |
2 | * Copyright 2008, Freescale Semiconductor, Inc | |
3 | * Andy Fleming | |
4 | * | |
5 | * Based vaguely on the Linux code | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #include <config.h> | |
27 | #include <common.h> | |
28 | #include <command.h> | |
29 | #include <mmc.h> | |
30 | #include <part.h> | |
31 | #include <malloc.h> | |
32 | #include <linux/list.h> | |
9b1f942c | 33 | #include <div64.h> |
272cc70b | 34 | |
ce0fbcd2 MW |
35 | /* Set block count limit because of 16 bit register limit on some hardware*/ |
36 | #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT | |
37 | #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535 | |
38 | #endif | |
39 | ||
272cc70b AF |
40 | static struct list_head mmc_devices; |
41 | static int cur_dev_num = -1; | |
42 | ||
11fdade2 SB |
43 | int __board_mmc_getcd(u8 *cd, struct mmc *mmc) { |
44 | return -1; | |
45 | } | |
46 | ||
47 | int board_mmc_getcd(u8 *cd, struct mmc *mmc)__attribute__((weak, | |
48 | alias("__board_mmc_getcd"))); | |
49 | ||
272cc70b AF |
50 | int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) |
51 | { | |
52 | return mmc->send_cmd(mmc, cmd, data); | |
53 | } | |
54 | ||
55 | int mmc_set_blocklen(struct mmc *mmc, int len) | |
56 | { | |
57 | struct mmc_cmd cmd; | |
58 | ||
59 | cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; | |
60 | cmd.resp_type = MMC_RSP_R1; | |
61 | cmd.cmdarg = len; | |
62 | cmd.flags = 0; | |
63 | ||
64 | return mmc_send_cmd(mmc, &cmd, NULL); | |
65 | } | |
66 | ||
67 | struct mmc *find_mmc_device(int dev_num) | |
68 | { | |
69 | struct mmc *m; | |
70 | struct list_head *entry; | |
71 | ||
72 | list_for_each(entry, &mmc_devices) { | |
73 | m = list_entry(entry, struct mmc, link); | |
74 | ||
75 | if (m->block_dev.dev == dev_num) | |
76 | return m; | |
77 | } | |
78 | ||
79 | printf("MMC Device %d not found\n", dev_num); | |
80 | ||
81 | return NULL; | |
82 | } | |
83 | ||
84 | static ulong | |
0158126e | 85 | mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t blkcnt, const void*src) |
272cc70b AF |
86 | { |
87 | struct mmc_cmd cmd; | |
88 | struct mmc_data data; | |
272cc70b | 89 | |
d2bf29e3 | 90 | if ((start + blkcnt) > mmc->block_dev.lba) { |
def412b6 | 91 | printf("MMC: block number 0x%lx exceeds max(0x%lx)\n", |
d2bf29e3 LW |
92 | start + blkcnt, mmc->block_dev.lba); |
93 | return 0; | |
94 | } | |
272cc70b AF |
95 | |
96 | if (blkcnt > 1) | |
97 | cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK; | |
98 | else | |
99 | cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK; | |
100 | ||
101 | if (mmc->high_capacity) | |
102 | cmd.cmdarg = start; | |
103 | else | |
def412b6 | 104 | cmd.cmdarg = start * mmc->write_bl_len; |
272cc70b AF |
105 | |
106 | cmd.resp_type = MMC_RSP_R1; | |
107 | cmd.flags = 0; | |
108 | ||
109 | data.src = src; | |
110 | data.blocks = blkcnt; | |
def412b6 | 111 | data.blocksize = mmc->write_bl_len; |
272cc70b AF |
112 | data.flags = MMC_DATA_WRITE; |
113 | ||
def412b6 SS |
114 | if (mmc_send_cmd(mmc, &cmd, &data)) { |
115 | printf("mmc write failed\n"); | |
116 | return 0; | |
272cc70b AF |
117 | } |
118 | ||
d52ebf10 TC |
119 | /* SPI multiblock writes terminate using a special |
120 | * token, not a STOP_TRANSMISSION request. | |
121 | */ | |
122 | if (!mmc_host_is_spi(mmc) && blkcnt > 1) { | |
272cc70b AF |
123 | cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; |
124 | cmd.cmdarg = 0; | |
125 | cmd.resp_type = MMC_RSP_R1b; | |
126 | cmd.flags = 0; | |
def412b6 SS |
127 | if (mmc_send_cmd(mmc, &cmd, NULL)) { |
128 | printf("mmc fail to send stop cmd\n"); | |
129 | return 0; | |
0158126e | 130 | } |
272cc70b AF |
131 | } |
132 | ||
133 | return blkcnt; | |
134 | } | |
135 | ||
0158126e LW |
136 | static ulong |
137 | mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const void*src) | |
138 | { | |
0158126e LW |
139 | lbaint_t cur, blocks_todo = blkcnt; |
140 | ||
def412b6 | 141 | struct mmc *mmc = find_mmc_device(dev_num); |
0158126e | 142 | if (!mmc) |
def412b6 | 143 | return 0; |
0158126e | 144 | |
def412b6 SS |
145 | if (mmc_set_blocklen(mmc, mmc->write_bl_len)) |
146 | return 0; | |
0158126e LW |
147 | |
148 | do { | |
ce0fbcd2 MW |
149 | cur = (blocks_todo > CONFIG_SYS_MMC_MAX_BLK_COUNT) ? |
150 | CONFIG_SYS_MMC_MAX_BLK_COUNT : blocks_todo; | |
0158126e | 151 | if(mmc_write_blocks(mmc, start, cur, src) != cur) |
def412b6 | 152 | return 0; |
0158126e LW |
153 | blocks_todo -= cur; |
154 | start += cur; | |
155 | src += cur * mmc->write_bl_len; | |
156 | } while (blocks_todo > 0); | |
157 | ||
158 | return blkcnt; | |
159 | } | |
160 | ||
4a1a06bc | 161 | int mmc_read_blocks(struct mmc *mmc, void *dst, ulong start, lbaint_t blkcnt) |
272cc70b AF |
162 | { |
163 | struct mmc_cmd cmd; | |
164 | struct mmc_data data; | |
165 | ||
4a1a06bc AS |
166 | if (blkcnt > 1) |
167 | cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; | |
168 | else | |
169 | cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; | |
272cc70b AF |
170 | |
171 | if (mmc->high_capacity) | |
4a1a06bc | 172 | cmd.cmdarg = start; |
272cc70b | 173 | else |
4a1a06bc | 174 | cmd.cmdarg = start * mmc->read_bl_len; |
272cc70b AF |
175 | |
176 | cmd.resp_type = MMC_RSP_R1; | |
177 | cmd.flags = 0; | |
178 | ||
179 | data.dest = dst; | |
4a1a06bc | 180 | data.blocks = blkcnt; |
272cc70b AF |
181 | data.blocksize = mmc->read_bl_len; |
182 | data.flags = MMC_DATA_READ; | |
183 | ||
4a1a06bc AS |
184 | if (mmc_send_cmd(mmc, &cmd, &data)) |
185 | return 0; | |
272cc70b | 186 | |
4a1a06bc AS |
187 | if (blkcnt > 1) { |
188 | cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; | |
189 | cmd.cmdarg = 0; | |
190 | cmd.resp_type = MMC_RSP_R1b; | |
191 | cmd.flags = 0; | |
192 | if (mmc_send_cmd(mmc, &cmd, NULL)) { | |
193 | printf("mmc fail to send stop cmd\n"); | |
194 | return 0; | |
195 | } | |
272cc70b AF |
196 | } |
197 | ||
4a1a06bc | 198 | return blkcnt; |
272cc70b AF |
199 | } |
200 | ||
201 | static ulong mmc_bread(int dev_num, ulong start, lbaint_t blkcnt, void *dst) | |
202 | { | |
4a1a06bc AS |
203 | lbaint_t cur, blocks_todo = blkcnt; |
204 | ||
205 | if (blkcnt == 0) | |
206 | return 0; | |
272cc70b | 207 | |
4a1a06bc | 208 | struct mmc *mmc = find_mmc_device(dev_num); |
272cc70b AF |
209 | if (!mmc) |
210 | return 0; | |
211 | ||
d2bf29e3 | 212 | if ((start + blkcnt) > mmc->block_dev.lba) { |
4a1a06bc | 213 | printf("MMC: block number 0x%lx exceeds max(0x%lx)\n", |
d2bf29e3 LW |
214 | start + blkcnt, mmc->block_dev.lba); |
215 | return 0; | |
216 | } | |
272cc70b | 217 | |
4a1a06bc | 218 | if (mmc_set_blocklen(mmc, mmc->read_bl_len)) |
272cc70b | 219 | return 0; |
272cc70b | 220 | |
4a1a06bc | 221 | do { |
ce0fbcd2 MW |
222 | cur = (blocks_todo > CONFIG_SYS_MMC_MAX_BLK_COUNT) ? |
223 | CONFIG_SYS_MMC_MAX_BLK_COUNT : blocks_todo; | |
4a1a06bc AS |
224 | if(mmc_read_blocks(mmc, dst, start, cur) != cur) |
225 | return 0; | |
226 | blocks_todo -= cur; | |
227 | start += cur; | |
228 | dst += cur * mmc->read_bl_len; | |
229 | } while (blocks_todo > 0); | |
272cc70b AF |
230 | |
231 | return blkcnt; | |
232 | } | |
233 | ||
234 | int mmc_go_idle(struct mmc* mmc) | |
235 | { | |
236 | struct mmc_cmd cmd; | |
237 | int err; | |
238 | ||
239 | udelay(1000); | |
240 | ||
241 | cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; | |
242 | cmd.cmdarg = 0; | |
243 | cmd.resp_type = MMC_RSP_NONE; | |
244 | cmd.flags = 0; | |
245 | ||
246 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
247 | ||
248 | if (err) | |
249 | return err; | |
250 | ||
251 | udelay(2000); | |
252 | ||
253 | return 0; | |
254 | } | |
255 | ||
256 | int | |
257 | sd_send_op_cond(struct mmc *mmc) | |
258 | { | |
259 | int timeout = 1000; | |
260 | int err; | |
261 | struct mmc_cmd cmd; | |
262 | ||
263 | do { | |
264 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
265 | cmd.resp_type = MMC_RSP_R1; | |
266 | cmd.cmdarg = 0; | |
267 | cmd.flags = 0; | |
268 | ||
269 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
270 | ||
271 | if (err) | |
272 | return err; | |
273 | ||
274 | cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; | |
275 | cmd.resp_type = MMC_RSP_R3; | |
250de12b SB |
276 | |
277 | /* | |
278 | * Most cards do not answer if some reserved bits | |
279 | * in the ocr are set. However, Some controller | |
280 | * can set bit 7 (reserved for low voltages), but | |
281 | * how to manage low voltages SD card is not yet | |
282 | * specified. | |
283 | */ | |
d52ebf10 TC |
284 | cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 : |
285 | (mmc->voltages & 0xff8000); | |
272cc70b AF |
286 | |
287 | if (mmc->version == SD_VERSION_2) | |
288 | cmd.cmdarg |= OCR_HCS; | |
289 | ||
290 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
291 | ||
292 | if (err) | |
293 | return err; | |
294 | ||
295 | udelay(1000); | |
296 | } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--); | |
297 | ||
298 | if (timeout <= 0) | |
299 | return UNUSABLE_ERR; | |
300 | ||
301 | if (mmc->version != SD_VERSION_2) | |
302 | mmc->version = SD_VERSION_1_0; | |
303 | ||
d52ebf10 TC |
304 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
305 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; | |
306 | cmd.resp_type = MMC_RSP_R3; | |
307 | cmd.cmdarg = 0; | |
308 | cmd.flags = 0; | |
309 | ||
310 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
311 | ||
312 | if (err) | |
313 | return err; | |
314 | } | |
315 | ||
998be3dd | 316 | mmc->ocr = cmd.response[0]; |
272cc70b AF |
317 | |
318 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); | |
319 | mmc->rca = 0; | |
320 | ||
321 | return 0; | |
322 | } | |
323 | ||
324 | int mmc_send_op_cond(struct mmc *mmc) | |
325 | { | |
326 | int timeout = 1000; | |
327 | struct mmc_cmd cmd; | |
328 | int err; | |
329 | ||
330 | /* Some cards seem to need this */ | |
331 | mmc_go_idle(mmc); | |
332 | ||
333 | do { | |
334 | cmd.cmdidx = MMC_CMD_SEND_OP_COND; | |
335 | cmd.resp_type = MMC_RSP_R3; | |
d52ebf10 TC |
336 | cmd.cmdarg = OCR_HCS | (mmc_host_is_spi(mmc) ? 0 : |
337 | mmc->voltages); | |
272cc70b AF |
338 | cmd.flags = 0; |
339 | ||
340 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
341 | ||
342 | if (err) | |
343 | return err; | |
344 | ||
345 | udelay(1000); | |
346 | } while (!(cmd.response[0] & OCR_BUSY) && timeout--); | |
347 | ||
348 | if (timeout <= 0) | |
349 | return UNUSABLE_ERR; | |
350 | ||
d52ebf10 TC |
351 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
352 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; | |
353 | cmd.resp_type = MMC_RSP_R3; | |
354 | cmd.cmdarg = 0; | |
355 | cmd.flags = 0; | |
356 | ||
357 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
358 | ||
359 | if (err) | |
360 | return err; | |
361 | } | |
362 | ||
272cc70b | 363 | mmc->version = MMC_VERSION_UNKNOWN; |
998be3dd | 364 | mmc->ocr = cmd.response[0]; |
272cc70b AF |
365 | |
366 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); | |
367 | mmc->rca = 0; | |
368 | ||
369 | return 0; | |
370 | } | |
371 | ||
372 | ||
373 | int mmc_send_ext_csd(struct mmc *mmc, char *ext_csd) | |
374 | { | |
375 | struct mmc_cmd cmd; | |
376 | struct mmc_data data; | |
377 | int err; | |
378 | ||
379 | /* Get the Card Status Register */ | |
380 | cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; | |
381 | cmd.resp_type = MMC_RSP_R1; | |
382 | cmd.cmdarg = 0; | |
383 | cmd.flags = 0; | |
384 | ||
385 | data.dest = ext_csd; | |
386 | data.blocks = 1; | |
387 | data.blocksize = 512; | |
388 | data.flags = MMC_DATA_READ; | |
389 | ||
390 | err = mmc_send_cmd(mmc, &cmd, &data); | |
391 | ||
392 | return err; | |
393 | } | |
394 | ||
395 | ||
396 | int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) | |
397 | { | |
398 | struct mmc_cmd cmd; | |
399 | ||
400 | cmd.cmdidx = MMC_CMD_SWITCH; | |
401 | cmd.resp_type = MMC_RSP_R1b; | |
402 | cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | | |
403 | (index << 16) | | |
404 | (value << 8); | |
405 | cmd.flags = 0; | |
406 | ||
407 | return mmc_send_cmd(mmc, &cmd, NULL); | |
408 | } | |
409 | ||
410 | int mmc_change_freq(struct mmc *mmc) | |
411 | { | |
412 | char ext_csd[512]; | |
413 | char cardtype; | |
414 | int err; | |
415 | ||
416 | mmc->card_caps = 0; | |
417 | ||
d52ebf10 TC |
418 | if (mmc_host_is_spi(mmc)) |
419 | return 0; | |
420 | ||
272cc70b AF |
421 | /* Only version 4 supports high-speed */ |
422 | if (mmc->version < MMC_VERSION_4) | |
423 | return 0; | |
424 | ||
425 | mmc->card_caps |= MMC_MODE_4BIT; | |
426 | ||
427 | err = mmc_send_ext_csd(mmc, ext_csd); | |
428 | ||
429 | if (err) | |
430 | return err; | |
431 | ||
432 | if (ext_csd[212] || ext_csd[213] || ext_csd[214] || ext_csd[215]) | |
433 | mmc->high_capacity = 1; | |
434 | ||
435 | cardtype = ext_csd[196] & 0xf; | |
436 | ||
437 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); | |
438 | ||
439 | if (err) | |
440 | return err; | |
441 | ||
442 | /* Now check to see that it worked */ | |
443 | err = mmc_send_ext_csd(mmc, ext_csd); | |
444 | ||
445 | if (err) | |
446 | return err; | |
447 | ||
448 | /* No high-speed support */ | |
449 | if (!ext_csd[185]) | |
450 | return 0; | |
451 | ||
452 | /* High Speed is set, there are two types: 52MHz and 26MHz */ | |
453 | if (cardtype & MMC_HS_52MHZ) | |
454 | mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; | |
455 | else | |
456 | mmc->card_caps |= MMC_MODE_HS; | |
457 | ||
458 | return 0; | |
459 | } | |
460 | ||
461 | int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) | |
462 | { | |
463 | struct mmc_cmd cmd; | |
464 | struct mmc_data data; | |
465 | ||
466 | /* Switch the frequency */ | |
467 | cmd.cmdidx = SD_CMD_SWITCH_FUNC; | |
468 | cmd.resp_type = MMC_RSP_R1; | |
469 | cmd.cmdarg = (mode << 31) | 0xffffff; | |
470 | cmd.cmdarg &= ~(0xf << (group * 4)); | |
471 | cmd.cmdarg |= value << (group * 4); | |
472 | cmd.flags = 0; | |
473 | ||
474 | data.dest = (char *)resp; | |
475 | data.blocksize = 64; | |
476 | data.blocks = 1; | |
477 | data.flags = MMC_DATA_READ; | |
478 | ||
479 | return mmc_send_cmd(mmc, &cmd, &data); | |
480 | } | |
481 | ||
482 | ||
483 | int sd_change_freq(struct mmc *mmc) | |
484 | { | |
485 | int err; | |
486 | struct mmc_cmd cmd; | |
487 | uint scr[2]; | |
488 | uint switch_status[16]; | |
489 | struct mmc_data data; | |
490 | int timeout; | |
491 | ||
492 | mmc->card_caps = 0; | |
493 | ||
d52ebf10 TC |
494 | if (mmc_host_is_spi(mmc)) |
495 | return 0; | |
496 | ||
272cc70b AF |
497 | /* Read the SCR to find out if this card supports higher speeds */ |
498 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
499 | cmd.resp_type = MMC_RSP_R1; | |
500 | cmd.cmdarg = mmc->rca << 16; | |
501 | cmd.flags = 0; | |
502 | ||
503 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
504 | ||
505 | if (err) | |
506 | return err; | |
507 | ||
508 | cmd.cmdidx = SD_CMD_APP_SEND_SCR; | |
509 | cmd.resp_type = MMC_RSP_R1; | |
510 | cmd.cmdarg = 0; | |
511 | cmd.flags = 0; | |
512 | ||
513 | timeout = 3; | |
514 | ||
515 | retry_scr: | |
516 | data.dest = (char *)&scr; | |
517 | data.blocksize = 8; | |
518 | data.blocks = 1; | |
519 | data.flags = MMC_DATA_READ; | |
520 | ||
521 | err = mmc_send_cmd(mmc, &cmd, &data); | |
522 | ||
523 | if (err) { | |
524 | if (timeout--) | |
525 | goto retry_scr; | |
526 | ||
527 | return err; | |
528 | } | |
529 | ||
4e3d89ba YK |
530 | mmc->scr[0] = __be32_to_cpu(scr[0]); |
531 | mmc->scr[1] = __be32_to_cpu(scr[1]); | |
272cc70b AF |
532 | |
533 | switch ((mmc->scr[0] >> 24) & 0xf) { | |
534 | case 0: | |
535 | mmc->version = SD_VERSION_1_0; | |
536 | break; | |
537 | case 1: | |
538 | mmc->version = SD_VERSION_1_10; | |
539 | break; | |
540 | case 2: | |
541 | mmc->version = SD_VERSION_2; | |
542 | break; | |
543 | default: | |
544 | mmc->version = SD_VERSION_1_0; | |
545 | break; | |
546 | } | |
547 | ||
b44c7083 AS |
548 | if (mmc->scr[0] & SD_DATA_4BIT) |
549 | mmc->card_caps |= MMC_MODE_4BIT; | |
550 | ||
272cc70b AF |
551 | /* Version 1.0 doesn't support switching */ |
552 | if (mmc->version == SD_VERSION_1_0) | |
553 | return 0; | |
554 | ||
555 | timeout = 4; | |
556 | while (timeout--) { | |
557 | err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, | |
558 | (u8 *)&switch_status); | |
559 | ||
560 | if (err) | |
561 | return err; | |
562 | ||
563 | /* The high-speed function is busy. Try again */ | |
4e3d89ba | 564 | if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) |
272cc70b AF |
565 | break; |
566 | } | |
567 | ||
272cc70b | 568 | /* If high-speed isn't supported, we return */ |
4e3d89ba | 569 | if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)) |
272cc70b AF |
570 | return 0; |
571 | ||
572 | err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)&switch_status); | |
573 | ||
574 | if (err) | |
575 | return err; | |
576 | ||
4e3d89ba | 577 | if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000) |
272cc70b AF |
578 | mmc->card_caps |= MMC_MODE_HS; |
579 | ||
580 | return 0; | |
581 | } | |
582 | ||
583 | /* frequency bases */ | |
584 | /* divided by 10 to be nice to platforms without floating point */ | |
5f837c2c | 585 | static const int fbase[] = { |
272cc70b AF |
586 | 10000, |
587 | 100000, | |
588 | 1000000, | |
589 | 10000000, | |
590 | }; | |
591 | ||
592 | /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice | |
593 | * to platforms without floating point. | |
594 | */ | |
5f837c2c | 595 | static const int multipliers[] = { |
272cc70b AF |
596 | 0, /* reserved */ |
597 | 10, | |
598 | 12, | |
599 | 13, | |
600 | 15, | |
601 | 20, | |
602 | 25, | |
603 | 30, | |
604 | 35, | |
605 | 40, | |
606 | 45, | |
607 | 50, | |
608 | 55, | |
609 | 60, | |
610 | 70, | |
611 | 80, | |
612 | }; | |
613 | ||
614 | void mmc_set_ios(struct mmc *mmc) | |
615 | { | |
616 | mmc->set_ios(mmc); | |
617 | } | |
618 | ||
619 | void mmc_set_clock(struct mmc *mmc, uint clock) | |
620 | { | |
621 | if (clock > mmc->f_max) | |
622 | clock = mmc->f_max; | |
623 | ||
624 | if (clock < mmc->f_min) | |
625 | clock = mmc->f_min; | |
626 | ||
627 | mmc->clock = clock; | |
628 | ||
629 | mmc_set_ios(mmc); | |
630 | } | |
631 | ||
632 | void mmc_set_bus_width(struct mmc *mmc, uint width) | |
633 | { | |
634 | mmc->bus_width = width; | |
635 | ||
636 | mmc_set_ios(mmc); | |
637 | } | |
638 | ||
639 | int mmc_startup(struct mmc *mmc) | |
640 | { | |
641 | int err; | |
642 | uint mult, freq; | |
643 | u64 cmult, csize; | |
644 | struct mmc_cmd cmd; | |
d23e2c09 | 645 | char ext_csd[512]; |
272cc70b | 646 | |
d52ebf10 TC |
647 | #ifdef CONFIG_MMC_SPI_CRC_ON |
648 | if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */ | |
649 | cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF; | |
650 | cmd.resp_type = MMC_RSP_R1; | |
651 | cmd.cmdarg = 1; | |
652 | cmd.flags = 0; | |
653 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
654 | ||
655 | if (err) | |
656 | return err; | |
657 | } | |
658 | #endif | |
659 | ||
272cc70b | 660 | /* Put the Card in Identify Mode */ |
d52ebf10 TC |
661 | cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID : |
662 | MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */ | |
272cc70b AF |
663 | cmd.resp_type = MMC_RSP_R2; |
664 | cmd.cmdarg = 0; | |
665 | cmd.flags = 0; | |
666 | ||
667 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
668 | ||
669 | if (err) | |
670 | return err; | |
671 | ||
672 | memcpy(mmc->cid, cmd.response, 16); | |
673 | ||
674 | /* | |
675 | * For MMC cards, set the Relative Address. | |
676 | * For SD cards, get the Relatvie Address. | |
677 | * This also puts the cards into Standby State | |
678 | */ | |
d52ebf10 TC |
679 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
680 | cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; | |
681 | cmd.cmdarg = mmc->rca << 16; | |
682 | cmd.resp_type = MMC_RSP_R6; | |
683 | cmd.flags = 0; | |
272cc70b | 684 | |
d52ebf10 | 685 | err = mmc_send_cmd(mmc, &cmd, NULL); |
272cc70b | 686 | |
d52ebf10 TC |
687 | if (err) |
688 | return err; | |
272cc70b | 689 | |
d52ebf10 TC |
690 | if (IS_SD(mmc)) |
691 | mmc->rca = (cmd.response[0] >> 16) & 0xffff; | |
692 | } | |
272cc70b AF |
693 | |
694 | /* Get the Card-Specific Data */ | |
695 | cmd.cmdidx = MMC_CMD_SEND_CSD; | |
696 | cmd.resp_type = MMC_RSP_R2; | |
697 | cmd.cmdarg = mmc->rca << 16; | |
698 | cmd.flags = 0; | |
699 | ||
700 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
701 | ||
702 | if (err) | |
703 | return err; | |
704 | ||
998be3dd RV |
705 | mmc->csd[0] = cmd.response[0]; |
706 | mmc->csd[1] = cmd.response[1]; | |
707 | mmc->csd[2] = cmd.response[2]; | |
708 | mmc->csd[3] = cmd.response[3]; | |
272cc70b AF |
709 | |
710 | if (mmc->version == MMC_VERSION_UNKNOWN) { | |
0b453ffe | 711 | int version = (cmd.response[0] >> 26) & 0xf; |
272cc70b AF |
712 | |
713 | switch (version) { | |
714 | case 0: | |
715 | mmc->version = MMC_VERSION_1_2; | |
716 | break; | |
717 | case 1: | |
718 | mmc->version = MMC_VERSION_1_4; | |
719 | break; | |
720 | case 2: | |
721 | mmc->version = MMC_VERSION_2_2; | |
722 | break; | |
723 | case 3: | |
724 | mmc->version = MMC_VERSION_3; | |
725 | break; | |
726 | case 4: | |
727 | mmc->version = MMC_VERSION_4; | |
728 | break; | |
729 | default: | |
730 | mmc->version = MMC_VERSION_1_2; | |
731 | break; | |
732 | } | |
733 | } | |
734 | ||
735 | /* divide frequency by 10, since the mults are 10x bigger */ | |
0b453ffe RV |
736 | freq = fbase[(cmd.response[0] & 0x7)]; |
737 | mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; | |
272cc70b AF |
738 | |
739 | mmc->tran_speed = freq * mult; | |
740 | ||
998be3dd | 741 | mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); |
272cc70b AF |
742 | |
743 | if (IS_SD(mmc)) | |
744 | mmc->write_bl_len = mmc->read_bl_len; | |
745 | else | |
998be3dd | 746 | mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); |
272cc70b AF |
747 | |
748 | if (mmc->high_capacity) { | |
749 | csize = (mmc->csd[1] & 0x3f) << 16 | |
750 | | (mmc->csd[2] & 0xffff0000) >> 16; | |
751 | cmult = 8; | |
752 | } else { | |
753 | csize = (mmc->csd[1] & 0x3ff) << 2 | |
754 | | (mmc->csd[2] & 0xc0000000) >> 30; | |
755 | cmult = (mmc->csd[2] & 0x00038000) >> 15; | |
756 | } | |
757 | ||
758 | mmc->capacity = (csize + 1) << (cmult + 2); | |
759 | mmc->capacity *= mmc->read_bl_len; | |
760 | ||
761 | if (mmc->read_bl_len > 512) | |
762 | mmc->read_bl_len = 512; | |
763 | ||
764 | if (mmc->write_bl_len > 512) | |
765 | mmc->write_bl_len = 512; | |
766 | ||
767 | /* Select the card, and put it into Transfer Mode */ | |
d52ebf10 TC |
768 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
769 | cmd.cmdidx = MMC_CMD_SELECT_CARD; | |
770 | cmd.resp_type = MMC_RSP_R1b; | |
771 | cmd.cmdarg = mmc->rca << 16; | |
772 | cmd.flags = 0; | |
773 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
272cc70b | 774 | |
d52ebf10 TC |
775 | if (err) |
776 | return err; | |
777 | } | |
272cc70b | 778 | |
d23e2c09 SG |
779 | if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) { |
780 | /* check ext_csd version and capacity */ | |
781 | err = mmc_send_ext_csd(mmc, ext_csd); | |
782 | if (!err & (ext_csd[192] >= 2)) { | |
783 | mmc->capacity = ext_csd[212] << 0 | ext_csd[213] << 8 | | |
784 | ext_csd[214] << 16 | ext_csd[215] << 24; | |
785 | mmc->capacity *= 512; | |
786 | } | |
787 | } | |
788 | ||
272cc70b AF |
789 | if (IS_SD(mmc)) |
790 | err = sd_change_freq(mmc); | |
791 | else | |
792 | err = mmc_change_freq(mmc); | |
793 | ||
794 | if (err) | |
795 | return err; | |
796 | ||
797 | /* Restrict card's capabilities by what the host can do */ | |
798 | mmc->card_caps &= mmc->host_caps; | |
799 | ||
800 | if (IS_SD(mmc)) { | |
801 | if (mmc->card_caps & MMC_MODE_4BIT) { | |
802 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
803 | cmd.resp_type = MMC_RSP_R1; | |
804 | cmd.cmdarg = mmc->rca << 16; | |
805 | cmd.flags = 0; | |
806 | ||
807 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
808 | if (err) | |
809 | return err; | |
810 | ||
811 | cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; | |
812 | cmd.resp_type = MMC_RSP_R1; | |
813 | cmd.cmdarg = 2; | |
814 | cmd.flags = 0; | |
815 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
816 | if (err) | |
817 | return err; | |
818 | ||
819 | mmc_set_bus_width(mmc, 4); | |
820 | } | |
821 | ||
822 | if (mmc->card_caps & MMC_MODE_HS) | |
823 | mmc_set_clock(mmc, 50000000); | |
824 | else | |
825 | mmc_set_clock(mmc, 25000000); | |
826 | } else { | |
827 | if (mmc->card_caps & MMC_MODE_4BIT) { | |
828 | /* Set the card to use 4 bit*/ | |
829 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, | |
830 | EXT_CSD_BUS_WIDTH, | |
831 | EXT_CSD_BUS_WIDTH_4); | |
832 | ||
833 | if (err) | |
834 | return err; | |
835 | ||
836 | mmc_set_bus_width(mmc, 4); | |
837 | } else if (mmc->card_caps & MMC_MODE_8BIT) { | |
838 | /* Set the card to use 8 bit*/ | |
839 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, | |
840 | EXT_CSD_BUS_WIDTH, | |
841 | EXT_CSD_BUS_WIDTH_8); | |
842 | ||
843 | if (err) | |
844 | return err; | |
845 | ||
846 | mmc_set_bus_width(mmc, 8); | |
847 | } | |
848 | ||
849 | if (mmc->card_caps & MMC_MODE_HS) { | |
850 | if (mmc->card_caps & MMC_MODE_HS_52MHz) | |
851 | mmc_set_clock(mmc, 52000000); | |
852 | else | |
853 | mmc_set_clock(mmc, 26000000); | |
854 | } else | |
855 | mmc_set_clock(mmc, 20000000); | |
856 | } | |
857 | ||
858 | /* fill in device description */ | |
859 | mmc->block_dev.lun = 0; | |
860 | mmc->block_dev.type = 0; | |
861 | mmc->block_dev.blksz = mmc->read_bl_len; | |
9b1f942c | 862 | mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); |
0b453ffe RV |
863 | sprintf(mmc->block_dev.vendor, "Man %06x Snr %08x", mmc->cid[0] >> 8, |
864 | (mmc->cid[2] << 8) | (mmc->cid[3] >> 24)); | |
865 | sprintf(mmc->block_dev.product, "%c%c%c%c%c", mmc->cid[0] & 0xff, | |
866 | (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, | |
867 | (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff); | |
868 | sprintf(mmc->block_dev.revision, "%d.%d", mmc->cid[2] >> 28, | |
869 | (mmc->cid[2] >> 24) & 0xf); | |
272cc70b AF |
870 | init_part(&mmc->block_dev); |
871 | ||
872 | return 0; | |
873 | } | |
874 | ||
875 | int mmc_send_if_cond(struct mmc *mmc) | |
876 | { | |
877 | struct mmc_cmd cmd; | |
878 | int err; | |
879 | ||
880 | cmd.cmdidx = SD_CMD_SEND_IF_COND; | |
881 | /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ | |
882 | cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa; | |
883 | cmd.resp_type = MMC_RSP_R7; | |
884 | cmd.flags = 0; | |
885 | ||
886 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
887 | ||
888 | if (err) | |
889 | return err; | |
890 | ||
998be3dd | 891 | if ((cmd.response[0] & 0xff) != 0xaa) |
272cc70b AF |
892 | return UNUSABLE_ERR; |
893 | else | |
894 | mmc->version = SD_VERSION_2; | |
895 | ||
896 | return 0; | |
897 | } | |
898 | ||
899 | int mmc_register(struct mmc *mmc) | |
900 | { | |
901 | /* Setup the universal parts of the block interface just once */ | |
902 | mmc->block_dev.if_type = IF_TYPE_MMC; | |
903 | mmc->block_dev.dev = cur_dev_num++; | |
904 | mmc->block_dev.removable = 1; | |
905 | mmc->block_dev.block_read = mmc_bread; | |
906 | mmc->block_dev.block_write = mmc_bwrite; | |
907 | ||
908 | INIT_LIST_HEAD (&mmc->link); | |
909 | ||
910 | list_add_tail (&mmc->link, &mmc_devices); | |
911 | ||
912 | return 0; | |
913 | } | |
914 | ||
915 | block_dev_desc_t *mmc_get_dev(int dev) | |
916 | { | |
917 | struct mmc *mmc = find_mmc_device(dev); | |
918 | ||
e85649c7 | 919 | return mmc ? &mmc->block_dev : NULL; |
272cc70b AF |
920 | } |
921 | ||
922 | int mmc_init(struct mmc *mmc) | |
923 | { | |
924 | int err; | |
925 | ||
926 | err = mmc->init(mmc); | |
927 | ||
928 | if (err) | |
929 | return err; | |
930 | ||
b86b85e2 IY |
931 | mmc_set_bus_width(mmc, 1); |
932 | mmc_set_clock(mmc, 1); | |
933 | ||
272cc70b AF |
934 | /* Reset the Card */ |
935 | err = mmc_go_idle(mmc); | |
936 | ||
937 | if (err) | |
938 | return err; | |
939 | ||
940 | /* Test for SD version 2 */ | |
941 | err = mmc_send_if_cond(mmc); | |
942 | ||
272cc70b AF |
943 | /* Now try to get the SD card's operating condition */ |
944 | err = sd_send_op_cond(mmc); | |
945 | ||
946 | /* If the command timed out, we check for an MMC card */ | |
947 | if (err == TIMEOUT) { | |
948 | err = mmc_send_op_cond(mmc); | |
949 | ||
950 | if (err) { | |
951 | printf("Card did not respond to voltage select!\n"); | |
952 | return UNUSABLE_ERR; | |
953 | } | |
954 | } | |
955 | ||
956 | return mmc_startup(mmc); | |
957 | } | |
958 | ||
959 | /* | |
960 | * CPU and board-specific MMC initializations. Aliased function | |
961 | * signals caller to move on | |
962 | */ | |
963 | static int __def_mmc_init(bd_t *bis) | |
964 | { | |
965 | return -1; | |
966 | } | |
967 | ||
f9a109b3 PT |
968 | int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init"))); |
969 | int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init"))); | |
272cc70b AF |
970 | |
971 | void print_mmc_devices(char separator) | |
972 | { | |
973 | struct mmc *m; | |
974 | struct list_head *entry; | |
975 | ||
976 | list_for_each(entry, &mmc_devices) { | |
977 | m = list_entry(entry, struct mmc, link); | |
978 | ||
979 | printf("%s: %d", m->name, m->block_dev.dev); | |
980 | ||
981 | if (entry->next != &mmc_devices) | |
982 | printf("%c ", separator); | |
983 | } | |
984 | ||
985 | printf("\n"); | |
986 | } | |
987 | ||
988 | int mmc_initialize(bd_t *bis) | |
989 | { | |
990 | INIT_LIST_HEAD (&mmc_devices); | |
991 | cur_dev_num = 0; | |
992 | ||
993 | if (board_mmc_init(bis) < 0) | |
994 | cpu_mmc_init(bis); | |
995 | ||
996 | print_mmc_devices(','); | |
997 | ||
998 | return 0; | |
999 | } |