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Commit | Line | Data |
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272cc70b AF |
1 | /* |
2 | * Copyright 2008, Freescale Semiconductor, Inc | |
3 | * Andy Fleming | |
4 | * | |
5 | * Based vaguely on the Linux code | |
6 | * | |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
272cc70b AF |
8 | */ |
9 | ||
10 | #include <config.h> | |
11 | #include <common.h> | |
12 | #include <command.h> | |
d4622df3 | 13 | #include <errno.h> |
272cc70b AF |
14 | #include <mmc.h> |
15 | #include <part.h> | |
16 | #include <malloc.h> | |
17 | #include <linux/list.h> | |
9b1f942c | 18 | #include <div64.h> |
da61fa5f | 19 | #include "mmc_private.h" |
272cc70b AF |
20 | |
21 | static struct list_head mmc_devices; | |
22 | static int cur_dev_num = -1; | |
23 | ||
d23d8d7e NK |
24 | int __weak board_mmc_getwp(struct mmc *mmc) |
25 | { | |
26 | return -1; | |
27 | } | |
28 | ||
29 | int mmc_getwp(struct mmc *mmc) | |
30 | { | |
31 | int wp; | |
32 | ||
33 | wp = board_mmc_getwp(mmc); | |
34 | ||
d4e1da4e | 35 | if (wp < 0) { |
93bfd616 PA |
36 | if (mmc->cfg->ops->getwp) |
37 | wp = mmc->cfg->ops->getwp(mmc); | |
d4e1da4e PK |
38 | else |
39 | wp = 0; | |
40 | } | |
d23d8d7e NK |
41 | |
42 | return wp; | |
43 | } | |
44 | ||
314284b1 | 45 | int __board_mmc_getcd(struct mmc *mmc) { |
11fdade2 SB |
46 | return -1; |
47 | } | |
48 | ||
314284b1 | 49 | int board_mmc_getcd(struct mmc *mmc)__attribute__((weak, |
11fdade2 SB |
50 | alias("__board_mmc_getcd"))); |
51 | ||
da61fa5f | 52 | int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) |
272cc70b | 53 | { |
5db2fe3a | 54 | int ret; |
8635ff9e | 55 | |
8635ff9e | 56 | #ifdef CONFIG_MMC_TRACE |
5db2fe3a RR |
57 | int i; |
58 | u8 *ptr; | |
59 | ||
60 | printf("CMD_SEND:%d\n", cmd->cmdidx); | |
61 | printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg); | |
93bfd616 | 62 | ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); |
5db2fe3a RR |
63 | switch (cmd->resp_type) { |
64 | case MMC_RSP_NONE: | |
65 | printf("\t\tMMC_RSP_NONE\n"); | |
66 | break; | |
67 | case MMC_RSP_R1: | |
68 | printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n", | |
69 | cmd->response[0]); | |
70 | break; | |
71 | case MMC_RSP_R1b: | |
72 | printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n", | |
73 | cmd->response[0]); | |
74 | break; | |
75 | case MMC_RSP_R2: | |
76 | printf("\t\tMMC_RSP_R2\t\t 0x%08X \n", | |
77 | cmd->response[0]); | |
78 | printf("\t\t \t\t 0x%08X \n", | |
79 | cmd->response[1]); | |
80 | printf("\t\t \t\t 0x%08X \n", | |
81 | cmd->response[2]); | |
82 | printf("\t\t \t\t 0x%08X \n", | |
83 | cmd->response[3]); | |
84 | printf("\n"); | |
85 | printf("\t\t\t\t\tDUMPING DATA\n"); | |
86 | for (i = 0; i < 4; i++) { | |
87 | int j; | |
88 | printf("\t\t\t\t\t%03d - ", i*4); | |
146bec79 | 89 | ptr = (u8 *)&cmd->response[i]; |
5db2fe3a RR |
90 | ptr += 3; |
91 | for (j = 0; j < 4; j++) | |
92 | printf("%02X ", *ptr--); | |
93 | printf("\n"); | |
94 | } | |
95 | break; | |
96 | case MMC_RSP_R3: | |
97 | printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n", | |
98 | cmd->response[0]); | |
99 | break; | |
100 | default: | |
101 | printf("\t\tERROR MMC rsp not supported\n"); | |
102 | break; | |
103 | } | |
5db2fe3a | 104 | #else |
93bfd616 | 105 | ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); |
5db2fe3a | 106 | #endif |
8635ff9e | 107 | return ret; |
272cc70b AF |
108 | } |
109 | ||
da61fa5f | 110 | int mmc_send_status(struct mmc *mmc, int timeout) |
5d4fc8d9 RR |
111 | { |
112 | struct mmc_cmd cmd; | |
d617c426 | 113 | int err, retries = 5; |
5d4fc8d9 RR |
114 | #ifdef CONFIG_MMC_TRACE |
115 | int status; | |
116 | #endif | |
117 | ||
118 | cmd.cmdidx = MMC_CMD_SEND_STATUS; | |
119 | cmd.resp_type = MMC_RSP_R1; | |
aaf3d41a MV |
120 | if (!mmc_host_is_spi(mmc)) |
121 | cmd.cmdarg = mmc->rca << 16; | |
5d4fc8d9 RR |
122 | |
123 | do { | |
124 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
d617c426 JK |
125 | if (!err) { |
126 | if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) && | |
127 | (cmd.response[0] & MMC_STATUS_CURR_STATE) != | |
128 | MMC_STATE_PRG) | |
129 | break; | |
130 | else if (cmd.response[0] & MMC_STATUS_MASK) { | |
56196826 | 131 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
d617c426 JK |
132 | printf("Status Error: 0x%08X\n", |
133 | cmd.response[0]); | |
56196826 | 134 | #endif |
d617c426 JK |
135 | return COMM_ERR; |
136 | } | |
137 | } else if (--retries < 0) | |
5d4fc8d9 | 138 | return err; |
5d4fc8d9 RR |
139 | |
140 | udelay(1000); | |
141 | ||
5d4fc8d9 RR |
142 | } while (timeout--); |
143 | ||
5db2fe3a RR |
144 | #ifdef CONFIG_MMC_TRACE |
145 | status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9; | |
146 | printf("CURR STATE:%d\n", status); | |
147 | #endif | |
5b0c942f | 148 | if (timeout <= 0) { |
56196826 | 149 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
5d4fc8d9 | 150 | printf("Timeout waiting card ready\n"); |
56196826 | 151 | #endif |
5d4fc8d9 RR |
152 | return TIMEOUT; |
153 | } | |
6b2221b0 AG |
154 | if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR) |
155 | return SWITCH_ERR; | |
5d4fc8d9 RR |
156 | |
157 | return 0; | |
158 | } | |
159 | ||
da61fa5f | 160 | int mmc_set_blocklen(struct mmc *mmc, int len) |
272cc70b AF |
161 | { |
162 | struct mmc_cmd cmd; | |
163 | ||
d22e3d46 JC |
164 | if (mmc->card_caps & MMC_MODE_DDR_52MHz) |
165 | return 0; | |
166 | ||
272cc70b AF |
167 | cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; |
168 | cmd.resp_type = MMC_RSP_R1; | |
169 | cmd.cmdarg = len; | |
272cc70b AF |
170 | |
171 | return mmc_send_cmd(mmc, &cmd, NULL); | |
172 | } | |
173 | ||
174 | struct mmc *find_mmc_device(int dev_num) | |
175 | { | |
176 | struct mmc *m; | |
177 | struct list_head *entry; | |
178 | ||
179 | list_for_each(entry, &mmc_devices) { | |
180 | m = list_entry(entry, struct mmc, link); | |
181 | ||
182 | if (m->block_dev.dev == dev_num) | |
183 | return m; | |
184 | } | |
185 | ||
56196826 | 186 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
272cc70b | 187 | printf("MMC Device %d not found\n", dev_num); |
56196826 | 188 | #endif |
272cc70b AF |
189 | |
190 | return NULL; | |
191 | } | |
192 | ||
ff8fef56 | 193 | static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start, |
fdbb873e | 194 | lbaint_t blkcnt) |
272cc70b AF |
195 | { |
196 | struct mmc_cmd cmd; | |
197 | struct mmc_data data; | |
198 | ||
4a1a06bc AS |
199 | if (blkcnt > 1) |
200 | cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; | |
201 | else | |
202 | cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; | |
272cc70b AF |
203 | |
204 | if (mmc->high_capacity) | |
4a1a06bc | 205 | cmd.cmdarg = start; |
272cc70b | 206 | else |
4a1a06bc | 207 | cmd.cmdarg = start * mmc->read_bl_len; |
272cc70b AF |
208 | |
209 | cmd.resp_type = MMC_RSP_R1; | |
272cc70b AF |
210 | |
211 | data.dest = dst; | |
4a1a06bc | 212 | data.blocks = blkcnt; |
272cc70b AF |
213 | data.blocksize = mmc->read_bl_len; |
214 | data.flags = MMC_DATA_READ; | |
215 | ||
4a1a06bc AS |
216 | if (mmc_send_cmd(mmc, &cmd, &data)) |
217 | return 0; | |
272cc70b | 218 | |
4a1a06bc AS |
219 | if (blkcnt > 1) { |
220 | cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; | |
221 | cmd.cmdarg = 0; | |
222 | cmd.resp_type = MMC_RSP_R1b; | |
4a1a06bc | 223 | if (mmc_send_cmd(mmc, &cmd, NULL)) { |
56196826 | 224 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
4a1a06bc | 225 | printf("mmc fail to send stop cmd\n"); |
56196826 | 226 | #endif |
4a1a06bc AS |
227 | return 0; |
228 | } | |
272cc70b AF |
229 | } |
230 | ||
4a1a06bc | 231 | return blkcnt; |
272cc70b AF |
232 | } |
233 | ||
ff8fef56 | 234 | static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst) |
272cc70b | 235 | { |
4a1a06bc AS |
236 | lbaint_t cur, blocks_todo = blkcnt; |
237 | ||
238 | if (blkcnt == 0) | |
239 | return 0; | |
272cc70b | 240 | |
4a1a06bc | 241 | struct mmc *mmc = find_mmc_device(dev_num); |
272cc70b AF |
242 | if (!mmc) |
243 | return 0; | |
244 | ||
d2bf29e3 | 245 | if ((start + blkcnt) > mmc->block_dev.lba) { |
56196826 | 246 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
ff8fef56 | 247 | printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n", |
d2bf29e3 | 248 | start + blkcnt, mmc->block_dev.lba); |
56196826 | 249 | #endif |
d2bf29e3 LW |
250 | return 0; |
251 | } | |
272cc70b | 252 | |
4a1a06bc | 253 | if (mmc_set_blocklen(mmc, mmc->read_bl_len)) |
272cc70b | 254 | return 0; |
272cc70b | 255 | |
4a1a06bc | 256 | do { |
93bfd616 PA |
257 | cur = (blocks_todo > mmc->cfg->b_max) ? |
258 | mmc->cfg->b_max : blocks_todo; | |
4a1a06bc AS |
259 | if(mmc_read_blocks(mmc, dst, start, cur) != cur) |
260 | return 0; | |
261 | blocks_todo -= cur; | |
262 | start += cur; | |
263 | dst += cur * mmc->read_bl_len; | |
264 | } while (blocks_todo > 0); | |
272cc70b AF |
265 | |
266 | return blkcnt; | |
267 | } | |
268 | ||
fdbb873e | 269 | static int mmc_go_idle(struct mmc *mmc) |
272cc70b AF |
270 | { |
271 | struct mmc_cmd cmd; | |
272 | int err; | |
273 | ||
274 | udelay(1000); | |
275 | ||
276 | cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; | |
277 | cmd.cmdarg = 0; | |
278 | cmd.resp_type = MMC_RSP_NONE; | |
272cc70b AF |
279 | |
280 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
281 | ||
282 | if (err) | |
283 | return err; | |
284 | ||
285 | udelay(2000); | |
286 | ||
287 | return 0; | |
288 | } | |
289 | ||
fdbb873e | 290 | static int sd_send_op_cond(struct mmc *mmc) |
272cc70b AF |
291 | { |
292 | int timeout = 1000; | |
293 | int err; | |
294 | struct mmc_cmd cmd; | |
295 | ||
296 | do { | |
297 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
298 | cmd.resp_type = MMC_RSP_R1; | |
299 | cmd.cmdarg = 0; | |
272cc70b AF |
300 | |
301 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
302 | ||
303 | if (err) | |
304 | return err; | |
305 | ||
306 | cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; | |
307 | cmd.resp_type = MMC_RSP_R3; | |
250de12b SB |
308 | |
309 | /* | |
310 | * Most cards do not answer if some reserved bits | |
311 | * in the ocr are set. However, Some controller | |
312 | * can set bit 7 (reserved for low voltages), but | |
313 | * how to manage low voltages SD card is not yet | |
314 | * specified. | |
315 | */ | |
d52ebf10 | 316 | cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 : |
93bfd616 | 317 | (mmc->cfg->voltages & 0xff8000); |
272cc70b AF |
318 | |
319 | if (mmc->version == SD_VERSION_2) | |
320 | cmd.cmdarg |= OCR_HCS; | |
321 | ||
322 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
323 | ||
324 | if (err) | |
325 | return err; | |
326 | ||
327 | udelay(1000); | |
328 | } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--); | |
329 | ||
330 | if (timeout <= 0) | |
331 | return UNUSABLE_ERR; | |
332 | ||
333 | if (mmc->version != SD_VERSION_2) | |
334 | mmc->version = SD_VERSION_1_0; | |
335 | ||
d52ebf10 TC |
336 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
337 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; | |
338 | cmd.resp_type = MMC_RSP_R3; | |
339 | cmd.cmdarg = 0; | |
d52ebf10 TC |
340 | |
341 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
342 | ||
343 | if (err) | |
344 | return err; | |
345 | } | |
346 | ||
998be3dd | 347 | mmc->ocr = cmd.response[0]; |
272cc70b AF |
348 | |
349 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); | |
350 | mmc->rca = 0; | |
351 | ||
352 | return 0; | |
353 | } | |
354 | ||
e9550449 CLC |
355 | /* We pass in the cmd since otherwise the init seems to fail */ |
356 | static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd, | |
357 | int use_arg) | |
272cc70b | 358 | { |
272cc70b AF |
359 | int err; |
360 | ||
e9550449 CLC |
361 | cmd->cmdidx = MMC_CMD_SEND_OP_COND; |
362 | cmd->resp_type = MMC_RSP_R3; | |
363 | cmd->cmdarg = 0; | |
364 | if (use_arg && !mmc_host_is_spi(mmc)) { | |
365 | cmd->cmdarg = | |
93bfd616 | 366 | (mmc->cfg->voltages & |
e9550449 CLC |
367 | (mmc->op_cond_response & OCR_VOLTAGE_MASK)) | |
368 | (mmc->op_cond_response & OCR_ACCESS_MODE); | |
369 | ||
93bfd616 | 370 | if (mmc->cfg->host_caps & MMC_MODE_HC) |
e9550449 CLC |
371 | cmd->cmdarg |= OCR_HCS; |
372 | } | |
373 | err = mmc_send_cmd(mmc, cmd, NULL); | |
374 | if (err) | |
375 | return err; | |
376 | mmc->op_cond_response = cmd->response[0]; | |
377 | return 0; | |
378 | } | |
379 | ||
380 | int mmc_send_op_cond(struct mmc *mmc) | |
381 | { | |
382 | struct mmc_cmd cmd; | |
383 | int err, i; | |
384 | ||
272cc70b AF |
385 | /* Some cards seem to need this */ |
386 | mmc_go_idle(mmc); | |
387 | ||
31cacbab | 388 | /* Asking to the card its capabilities */ |
e9550449 CLC |
389 | mmc->op_cond_pending = 1; |
390 | for (i = 0; i < 2; i++) { | |
391 | err = mmc_send_op_cond_iter(mmc, &cmd, i != 0); | |
392 | if (err) | |
393 | return err; | |
cd6881b5 | 394 | |
e9550449 CLC |
395 | /* exit if not busy (flag seems to be inverted) */ |
396 | if (mmc->op_cond_response & OCR_BUSY) | |
397 | return 0; | |
398 | } | |
399 | return IN_PROGRESS; | |
400 | } | |
cd6881b5 | 401 | |
e9550449 CLC |
402 | int mmc_complete_op_cond(struct mmc *mmc) |
403 | { | |
404 | struct mmc_cmd cmd; | |
405 | int timeout = 1000; | |
406 | uint start; | |
407 | int err; | |
cd6881b5 | 408 | |
e9550449 CLC |
409 | mmc->op_cond_pending = 0; |
410 | start = get_timer(0); | |
272cc70b | 411 | do { |
e9550449 | 412 | err = mmc_send_op_cond_iter(mmc, &cmd, 1); |
272cc70b AF |
413 | if (err) |
414 | return err; | |
e9550449 CLC |
415 | if (get_timer(start) > timeout) |
416 | return UNUSABLE_ERR; | |
417 | udelay(100); | |
418 | } while (!(mmc->op_cond_response & OCR_BUSY)); | |
272cc70b | 419 | |
d52ebf10 TC |
420 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
421 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; | |
422 | cmd.resp_type = MMC_RSP_R3; | |
423 | cmd.cmdarg = 0; | |
d52ebf10 TC |
424 | |
425 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
426 | ||
427 | if (err) | |
428 | return err; | |
429 | } | |
430 | ||
272cc70b | 431 | mmc->version = MMC_VERSION_UNKNOWN; |
998be3dd | 432 | mmc->ocr = cmd.response[0]; |
272cc70b AF |
433 | |
434 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); | |
def816a2 | 435 | mmc->rca = 1; |
272cc70b AF |
436 | |
437 | return 0; | |
438 | } | |
439 | ||
440 | ||
fdbb873e | 441 | static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd) |
272cc70b AF |
442 | { |
443 | struct mmc_cmd cmd; | |
444 | struct mmc_data data; | |
445 | int err; | |
446 | ||
447 | /* Get the Card Status Register */ | |
448 | cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; | |
449 | cmd.resp_type = MMC_RSP_R1; | |
450 | cmd.cmdarg = 0; | |
272cc70b | 451 | |
cdfd1ac6 | 452 | data.dest = (char *)ext_csd; |
272cc70b | 453 | data.blocks = 1; |
8bfa195e | 454 | data.blocksize = MMC_MAX_BLOCK_LEN; |
272cc70b AF |
455 | data.flags = MMC_DATA_READ; |
456 | ||
457 | err = mmc_send_cmd(mmc, &cmd, &data); | |
458 | ||
459 | return err; | |
460 | } | |
461 | ||
462 | ||
fdbb873e | 463 | static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) |
272cc70b AF |
464 | { |
465 | struct mmc_cmd cmd; | |
5d4fc8d9 RR |
466 | int timeout = 1000; |
467 | int ret; | |
272cc70b AF |
468 | |
469 | cmd.cmdidx = MMC_CMD_SWITCH; | |
470 | cmd.resp_type = MMC_RSP_R1b; | |
471 | cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | | |
5d4fc8d9 RR |
472 | (index << 16) | |
473 | (value << 8); | |
272cc70b | 474 | |
5d4fc8d9 RR |
475 | ret = mmc_send_cmd(mmc, &cmd, NULL); |
476 | ||
477 | /* Waiting for the ready status */ | |
93ad0d18 JK |
478 | if (!ret) |
479 | ret = mmc_send_status(mmc, timeout); | |
5d4fc8d9 RR |
480 | |
481 | return ret; | |
482 | ||
272cc70b AF |
483 | } |
484 | ||
fdbb873e | 485 | static int mmc_change_freq(struct mmc *mmc) |
272cc70b | 486 | { |
8bfa195e | 487 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); |
272cc70b AF |
488 | char cardtype; |
489 | int err; | |
490 | ||
491 | mmc->card_caps = 0; | |
492 | ||
d52ebf10 TC |
493 | if (mmc_host_is_spi(mmc)) |
494 | return 0; | |
495 | ||
272cc70b AF |
496 | /* Only version 4 supports high-speed */ |
497 | if (mmc->version < MMC_VERSION_4) | |
498 | return 0; | |
499 | ||
272cc70b AF |
500 | err = mmc_send_ext_csd(mmc, ext_csd); |
501 | ||
502 | if (err) | |
503 | return err; | |
504 | ||
0560db18 | 505 | cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf; |
272cc70b AF |
506 | |
507 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); | |
508 | ||
509 | if (err) | |
6b2221b0 | 510 | return err == SWITCH_ERR ? 0 : err; |
272cc70b AF |
511 | |
512 | /* Now check to see that it worked */ | |
513 | err = mmc_send_ext_csd(mmc, ext_csd); | |
514 | ||
515 | if (err) | |
516 | return err; | |
517 | ||
518 | /* No high-speed support */ | |
0560db18 | 519 | if (!ext_csd[EXT_CSD_HS_TIMING]) |
272cc70b AF |
520 | return 0; |
521 | ||
522 | /* High Speed is set, there are two types: 52MHz and 26MHz */ | |
d22e3d46 JC |
523 | if (cardtype & EXT_CSD_CARD_TYPE_52) { |
524 | if (cardtype & EXT_CSD_CARD_TYPE_DDR_52) | |
525 | mmc->card_caps |= MMC_MODE_DDR_52MHz; | |
272cc70b | 526 | mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; |
d22e3d46 | 527 | } else { |
272cc70b | 528 | mmc->card_caps |= MMC_MODE_HS; |
d22e3d46 | 529 | } |
272cc70b AF |
530 | |
531 | return 0; | |
532 | } | |
533 | ||
f866a46d SW |
534 | static int mmc_set_capacity(struct mmc *mmc, int part_num) |
535 | { | |
536 | switch (part_num) { | |
537 | case 0: | |
538 | mmc->capacity = mmc->capacity_user; | |
539 | break; | |
540 | case 1: | |
541 | case 2: | |
542 | mmc->capacity = mmc->capacity_boot; | |
543 | break; | |
544 | case 3: | |
545 | mmc->capacity = mmc->capacity_rpmb; | |
546 | break; | |
547 | case 4: | |
548 | case 5: | |
549 | case 6: | |
550 | case 7: | |
551 | mmc->capacity = mmc->capacity_gp[part_num - 4]; | |
552 | break; | |
553 | default: | |
554 | return -1; | |
555 | } | |
556 | ||
557 | mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); | |
558 | ||
559 | return 0; | |
560 | } | |
561 | ||
d2356284 SW |
562 | int mmc_select_hwpart(int dev_num, int hwpart) |
563 | { | |
564 | struct mmc *mmc = find_mmc_device(dev_num); | |
565 | int ret; | |
566 | ||
567 | if (!mmc) | |
d4622df3 | 568 | return -ENODEV; |
d2356284 SW |
569 | |
570 | if (mmc->part_num == hwpart) | |
571 | return 0; | |
572 | ||
573 | if (mmc->part_config == MMCPART_NOAVAILABLE) { | |
574 | printf("Card doesn't support part_switch\n"); | |
d4622df3 | 575 | return -EMEDIUMTYPE; |
d2356284 SW |
576 | } |
577 | ||
578 | ret = mmc_switch_part(dev_num, hwpart); | |
579 | if (ret) | |
d4622df3 | 580 | return ret; |
d2356284 SW |
581 | |
582 | mmc->part_num = hwpart; | |
583 | ||
584 | return 0; | |
585 | } | |
586 | ||
587 | ||
bc897b1d LW |
588 | int mmc_switch_part(int dev_num, unsigned int part_num) |
589 | { | |
590 | struct mmc *mmc = find_mmc_device(dev_num); | |
f866a46d | 591 | int ret; |
bc897b1d LW |
592 | |
593 | if (!mmc) | |
594 | return -1; | |
595 | ||
f866a46d SW |
596 | ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, |
597 | (mmc->part_config & ~PART_ACCESS_MASK) | |
598 | | (part_num & PART_ACCESS_MASK)); | |
599 | if (ret) | |
600 | return ret; | |
601 | ||
602 | return mmc_set_capacity(mmc, part_num); | |
bc897b1d LW |
603 | } |
604 | ||
48972d90 TR |
605 | int mmc_getcd(struct mmc *mmc) |
606 | { | |
607 | int cd; | |
608 | ||
609 | cd = board_mmc_getcd(mmc); | |
610 | ||
d4e1da4e | 611 | if (cd < 0) { |
93bfd616 PA |
612 | if (mmc->cfg->ops->getcd) |
613 | cd = mmc->cfg->ops->getcd(mmc); | |
d4e1da4e PK |
614 | else |
615 | cd = 1; | |
616 | } | |
48972d90 TR |
617 | |
618 | return cd; | |
619 | } | |
620 | ||
fdbb873e | 621 | static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) |
272cc70b AF |
622 | { |
623 | struct mmc_cmd cmd; | |
624 | struct mmc_data data; | |
625 | ||
626 | /* Switch the frequency */ | |
627 | cmd.cmdidx = SD_CMD_SWITCH_FUNC; | |
628 | cmd.resp_type = MMC_RSP_R1; | |
629 | cmd.cmdarg = (mode << 31) | 0xffffff; | |
630 | cmd.cmdarg &= ~(0xf << (group * 4)); | |
631 | cmd.cmdarg |= value << (group * 4); | |
272cc70b AF |
632 | |
633 | data.dest = (char *)resp; | |
634 | data.blocksize = 64; | |
635 | data.blocks = 1; | |
636 | data.flags = MMC_DATA_READ; | |
637 | ||
638 | return mmc_send_cmd(mmc, &cmd, &data); | |
639 | } | |
640 | ||
641 | ||
fdbb873e | 642 | static int sd_change_freq(struct mmc *mmc) |
272cc70b AF |
643 | { |
644 | int err; | |
645 | struct mmc_cmd cmd; | |
f781dd38 A |
646 | ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2); |
647 | ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16); | |
272cc70b AF |
648 | struct mmc_data data; |
649 | int timeout; | |
650 | ||
651 | mmc->card_caps = 0; | |
652 | ||
d52ebf10 TC |
653 | if (mmc_host_is_spi(mmc)) |
654 | return 0; | |
655 | ||
272cc70b AF |
656 | /* Read the SCR to find out if this card supports higher speeds */ |
657 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
658 | cmd.resp_type = MMC_RSP_R1; | |
659 | cmd.cmdarg = mmc->rca << 16; | |
272cc70b AF |
660 | |
661 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
662 | ||
663 | if (err) | |
664 | return err; | |
665 | ||
666 | cmd.cmdidx = SD_CMD_APP_SEND_SCR; | |
667 | cmd.resp_type = MMC_RSP_R1; | |
668 | cmd.cmdarg = 0; | |
272cc70b AF |
669 | |
670 | timeout = 3; | |
671 | ||
672 | retry_scr: | |
f781dd38 | 673 | data.dest = (char *)scr; |
272cc70b AF |
674 | data.blocksize = 8; |
675 | data.blocks = 1; | |
676 | data.flags = MMC_DATA_READ; | |
677 | ||
678 | err = mmc_send_cmd(mmc, &cmd, &data); | |
679 | ||
680 | if (err) { | |
681 | if (timeout--) | |
682 | goto retry_scr; | |
683 | ||
684 | return err; | |
685 | } | |
686 | ||
4e3d89ba YK |
687 | mmc->scr[0] = __be32_to_cpu(scr[0]); |
688 | mmc->scr[1] = __be32_to_cpu(scr[1]); | |
272cc70b AF |
689 | |
690 | switch ((mmc->scr[0] >> 24) & 0xf) { | |
691 | case 0: | |
692 | mmc->version = SD_VERSION_1_0; | |
693 | break; | |
694 | case 1: | |
695 | mmc->version = SD_VERSION_1_10; | |
696 | break; | |
697 | case 2: | |
698 | mmc->version = SD_VERSION_2; | |
1741c64d JC |
699 | if ((mmc->scr[0] >> 15) & 0x1) |
700 | mmc->version = SD_VERSION_3; | |
272cc70b AF |
701 | break; |
702 | default: | |
703 | mmc->version = SD_VERSION_1_0; | |
704 | break; | |
705 | } | |
706 | ||
b44c7083 AS |
707 | if (mmc->scr[0] & SD_DATA_4BIT) |
708 | mmc->card_caps |= MMC_MODE_4BIT; | |
709 | ||
272cc70b AF |
710 | /* Version 1.0 doesn't support switching */ |
711 | if (mmc->version == SD_VERSION_1_0) | |
712 | return 0; | |
713 | ||
714 | timeout = 4; | |
715 | while (timeout--) { | |
716 | err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, | |
f781dd38 | 717 | (u8 *)switch_status); |
272cc70b AF |
718 | |
719 | if (err) | |
720 | return err; | |
721 | ||
722 | /* The high-speed function is busy. Try again */ | |
4e3d89ba | 723 | if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) |
272cc70b AF |
724 | break; |
725 | } | |
726 | ||
272cc70b | 727 | /* If high-speed isn't supported, we return */ |
4e3d89ba | 728 | if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)) |
272cc70b AF |
729 | return 0; |
730 | ||
2c3fbf4c ML |
731 | /* |
732 | * If the host doesn't support SD_HIGHSPEED, do not switch card to | |
733 | * HIGHSPEED mode even if the card support SD_HIGHSPPED. | |
734 | * This can avoid furthur problem when the card runs in different | |
735 | * mode between the host. | |
736 | */ | |
93bfd616 PA |
737 | if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) && |
738 | (mmc->cfg->host_caps & MMC_MODE_HS))) | |
2c3fbf4c ML |
739 | return 0; |
740 | ||
f781dd38 | 741 | err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status); |
272cc70b AF |
742 | |
743 | if (err) | |
744 | return err; | |
745 | ||
4e3d89ba | 746 | if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000) |
272cc70b AF |
747 | mmc->card_caps |= MMC_MODE_HS; |
748 | ||
749 | return 0; | |
750 | } | |
751 | ||
752 | /* frequency bases */ | |
753 | /* divided by 10 to be nice to platforms without floating point */ | |
5f837c2c | 754 | static const int fbase[] = { |
272cc70b AF |
755 | 10000, |
756 | 100000, | |
757 | 1000000, | |
758 | 10000000, | |
759 | }; | |
760 | ||
761 | /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice | |
762 | * to platforms without floating point. | |
763 | */ | |
5f837c2c | 764 | static const int multipliers[] = { |
272cc70b AF |
765 | 0, /* reserved */ |
766 | 10, | |
767 | 12, | |
768 | 13, | |
769 | 15, | |
770 | 20, | |
771 | 25, | |
772 | 30, | |
773 | 35, | |
774 | 40, | |
775 | 45, | |
776 | 50, | |
777 | 55, | |
778 | 60, | |
779 | 70, | |
780 | 80, | |
781 | }; | |
782 | ||
fdbb873e | 783 | static void mmc_set_ios(struct mmc *mmc) |
272cc70b | 784 | { |
93bfd616 PA |
785 | if (mmc->cfg->ops->set_ios) |
786 | mmc->cfg->ops->set_ios(mmc); | |
272cc70b AF |
787 | } |
788 | ||
789 | void mmc_set_clock(struct mmc *mmc, uint clock) | |
790 | { | |
93bfd616 PA |
791 | if (clock > mmc->cfg->f_max) |
792 | clock = mmc->cfg->f_max; | |
272cc70b | 793 | |
93bfd616 PA |
794 | if (clock < mmc->cfg->f_min) |
795 | clock = mmc->cfg->f_min; | |
272cc70b AF |
796 | |
797 | mmc->clock = clock; | |
798 | ||
799 | mmc_set_ios(mmc); | |
800 | } | |
801 | ||
fdbb873e | 802 | static void mmc_set_bus_width(struct mmc *mmc, uint width) |
272cc70b AF |
803 | { |
804 | mmc->bus_width = width; | |
805 | ||
806 | mmc_set_ios(mmc); | |
807 | } | |
808 | ||
fdbb873e | 809 | static int mmc_startup(struct mmc *mmc) |
272cc70b | 810 | { |
f866a46d | 811 | int err, i; |
272cc70b | 812 | uint mult, freq; |
639b7827 | 813 | u64 cmult, csize, capacity; |
272cc70b | 814 | struct mmc_cmd cmd; |
8bfa195e SG |
815 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); |
816 | ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN); | |
5d4fc8d9 | 817 | int timeout = 1000; |
272cc70b | 818 | |
d52ebf10 TC |
819 | #ifdef CONFIG_MMC_SPI_CRC_ON |
820 | if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */ | |
821 | cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF; | |
822 | cmd.resp_type = MMC_RSP_R1; | |
823 | cmd.cmdarg = 1; | |
d52ebf10 TC |
824 | err = mmc_send_cmd(mmc, &cmd, NULL); |
825 | ||
826 | if (err) | |
827 | return err; | |
828 | } | |
829 | #endif | |
830 | ||
272cc70b | 831 | /* Put the Card in Identify Mode */ |
d52ebf10 TC |
832 | cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID : |
833 | MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */ | |
272cc70b AF |
834 | cmd.resp_type = MMC_RSP_R2; |
835 | cmd.cmdarg = 0; | |
272cc70b AF |
836 | |
837 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
838 | ||
839 | if (err) | |
840 | return err; | |
841 | ||
842 | memcpy(mmc->cid, cmd.response, 16); | |
843 | ||
844 | /* | |
845 | * For MMC cards, set the Relative Address. | |
846 | * For SD cards, get the Relatvie Address. | |
847 | * This also puts the cards into Standby State | |
848 | */ | |
d52ebf10 TC |
849 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
850 | cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; | |
851 | cmd.cmdarg = mmc->rca << 16; | |
852 | cmd.resp_type = MMC_RSP_R6; | |
272cc70b | 853 | |
d52ebf10 | 854 | err = mmc_send_cmd(mmc, &cmd, NULL); |
272cc70b | 855 | |
d52ebf10 TC |
856 | if (err) |
857 | return err; | |
272cc70b | 858 | |
d52ebf10 TC |
859 | if (IS_SD(mmc)) |
860 | mmc->rca = (cmd.response[0] >> 16) & 0xffff; | |
861 | } | |
272cc70b AF |
862 | |
863 | /* Get the Card-Specific Data */ | |
864 | cmd.cmdidx = MMC_CMD_SEND_CSD; | |
865 | cmd.resp_type = MMC_RSP_R2; | |
866 | cmd.cmdarg = mmc->rca << 16; | |
272cc70b AF |
867 | |
868 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
869 | ||
5d4fc8d9 RR |
870 | /* Waiting for the ready status */ |
871 | mmc_send_status(mmc, timeout); | |
872 | ||
272cc70b AF |
873 | if (err) |
874 | return err; | |
875 | ||
998be3dd RV |
876 | mmc->csd[0] = cmd.response[0]; |
877 | mmc->csd[1] = cmd.response[1]; | |
878 | mmc->csd[2] = cmd.response[2]; | |
879 | mmc->csd[3] = cmd.response[3]; | |
272cc70b AF |
880 | |
881 | if (mmc->version == MMC_VERSION_UNKNOWN) { | |
0b453ffe | 882 | int version = (cmd.response[0] >> 26) & 0xf; |
272cc70b AF |
883 | |
884 | switch (version) { | |
885 | case 0: | |
886 | mmc->version = MMC_VERSION_1_2; | |
887 | break; | |
888 | case 1: | |
889 | mmc->version = MMC_VERSION_1_4; | |
890 | break; | |
891 | case 2: | |
892 | mmc->version = MMC_VERSION_2_2; | |
893 | break; | |
894 | case 3: | |
895 | mmc->version = MMC_VERSION_3; | |
896 | break; | |
897 | case 4: | |
898 | mmc->version = MMC_VERSION_4; | |
899 | break; | |
900 | default: | |
901 | mmc->version = MMC_VERSION_1_2; | |
902 | break; | |
903 | } | |
904 | } | |
905 | ||
906 | /* divide frequency by 10, since the mults are 10x bigger */ | |
0b453ffe RV |
907 | freq = fbase[(cmd.response[0] & 0x7)]; |
908 | mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; | |
272cc70b AF |
909 | |
910 | mmc->tran_speed = freq * mult; | |
911 | ||
ab71188c | 912 | mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1); |
998be3dd | 913 | mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); |
272cc70b AF |
914 | |
915 | if (IS_SD(mmc)) | |
916 | mmc->write_bl_len = mmc->read_bl_len; | |
917 | else | |
998be3dd | 918 | mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); |
272cc70b AF |
919 | |
920 | if (mmc->high_capacity) { | |
921 | csize = (mmc->csd[1] & 0x3f) << 16 | |
922 | | (mmc->csd[2] & 0xffff0000) >> 16; | |
923 | cmult = 8; | |
924 | } else { | |
925 | csize = (mmc->csd[1] & 0x3ff) << 2 | |
926 | | (mmc->csd[2] & 0xc0000000) >> 30; | |
927 | cmult = (mmc->csd[2] & 0x00038000) >> 15; | |
928 | } | |
929 | ||
f866a46d SW |
930 | mmc->capacity_user = (csize + 1) << (cmult + 2); |
931 | mmc->capacity_user *= mmc->read_bl_len; | |
932 | mmc->capacity_boot = 0; | |
933 | mmc->capacity_rpmb = 0; | |
934 | for (i = 0; i < 4; i++) | |
935 | mmc->capacity_gp[i] = 0; | |
272cc70b | 936 | |
8bfa195e SG |
937 | if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN) |
938 | mmc->read_bl_len = MMC_MAX_BLOCK_LEN; | |
272cc70b | 939 | |
8bfa195e SG |
940 | if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN) |
941 | mmc->write_bl_len = MMC_MAX_BLOCK_LEN; | |
272cc70b | 942 | |
ab71188c MN |
943 | if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) { |
944 | cmd.cmdidx = MMC_CMD_SET_DSR; | |
945 | cmd.cmdarg = (mmc->dsr & 0xffff) << 16; | |
946 | cmd.resp_type = MMC_RSP_NONE; | |
947 | if (mmc_send_cmd(mmc, &cmd, NULL)) | |
948 | printf("MMC: SET_DSR failed\n"); | |
949 | } | |
950 | ||
272cc70b | 951 | /* Select the card, and put it into Transfer Mode */ |
d52ebf10 TC |
952 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
953 | cmd.cmdidx = MMC_CMD_SELECT_CARD; | |
fe8f7066 | 954 | cmd.resp_type = MMC_RSP_R1; |
d52ebf10 | 955 | cmd.cmdarg = mmc->rca << 16; |
d52ebf10 | 956 | err = mmc_send_cmd(mmc, &cmd, NULL); |
272cc70b | 957 | |
d52ebf10 TC |
958 | if (err) |
959 | return err; | |
960 | } | |
272cc70b | 961 | |
e6f99a56 LW |
962 | /* |
963 | * For SD, its erase group is always one sector | |
964 | */ | |
965 | mmc->erase_grp_size = 1; | |
bc897b1d | 966 | mmc->part_config = MMCPART_NOAVAILABLE; |
d23e2c09 SG |
967 | if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) { |
968 | /* check ext_csd version and capacity */ | |
969 | err = mmc_send_ext_csd(mmc, ext_csd); | |
fdbb873e | 970 | if (!err && (ext_csd[EXT_CSD_REV] >= 2)) { |
639b7827 YS |
971 | /* |
972 | * According to the JEDEC Standard, the value of | |
973 | * ext_csd's capacity is valid if the value is more | |
974 | * than 2GB | |
975 | */ | |
0560db18 LW |
976 | capacity = ext_csd[EXT_CSD_SEC_CNT] << 0 |
977 | | ext_csd[EXT_CSD_SEC_CNT + 1] << 8 | |
978 | | ext_csd[EXT_CSD_SEC_CNT + 2] << 16 | |
979 | | ext_csd[EXT_CSD_SEC_CNT + 3] << 24; | |
8bfa195e | 980 | capacity *= MMC_MAX_BLOCK_LEN; |
b1f1e821 | 981 | if ((capacity >> 20) > 2 * 1024) |
f866a46d | 982 | mmc->capacity_user = capacity; |
d23e2c09 | 983 | } |
bc897b1d | 984 | |
64f4a619 JC |
985 | switch (ext_csd[EXT_CSD_REV]) { |
986 | case 1: | |
987 | mmc->version = MMC_VERSION_4_1; | |
988 | break; | |
989 | case 2: | |
990 | mmc->version = MMC_VERSION_4_2; | |
991 | break; | |
992 | case 3: | |
993 | mmc->version = MMC_VERSION_4_3; | |
994 | break; | |
995 | case 5: | |
996 | mmc->version = MMC_VERSION_4_41; | |
997 | break; | |
998 | case 6: | |
999 | mmc->version = MMC_VERSION_4_5; | |
1000 | break; | |
1001 | } | |
1002 | ||
e6f99a56 | 1003 | /* |
1937e5aa OM |
1004 | * Host needs to enable ERASE_GRP_DEF bit if device is |
1005 | * partitioned. This bit will be lost every time after a reset | |
1006 | * or power off. This will affect erase size. | |
e6f99a56 | 1007 | */ |
1937e5aa OM |
1008 | if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) && |
1009 | (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) { | |
1010 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, | |
1011 | EXT_CSD_ERASE_GROUP_DEF, 1); | |
1012 | ||
1013 | if (err) | |
1014 | return err; | |
1015 | ||
1016 | /* Read out group size from ext_csd */ | |
0560db18 | 1017 | mmc->erase_grp_size = |
8bfa195e SG |
1018 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * |
1019 | MMC_MAX_BLOCK_LEN * 1024; | |
1020 | } else { | |
1937e5aa | 1021 | /* Calculate the group size from the csd value. */ |
e6f99a56 LW |
1022 | int erase_gsz, erase_gmul; |
1023 | erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10; | |
1024 | erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5; | |
1025 | mmc->erase_grp_size = (erase_gsz + 1) | |
1026 | * (erase_gmul + 1); | |
1027 | } | |
1028 | ||
bc897b1d | 1029 | /* store the partition info of emmc */ |
8948ea83 SW |
1030 | if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) || |
1031 | ext_csd[EXT_CSD_BOOT_MULT]) | |
0560db18 | 1032 | mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; |
f866a46d SW |
1033 | |
1034 | mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17; | |
1035 | ||
1036 | mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17; | |
1037 | ||
1038 | for (i = 0; i < 4; i++) { | |
1039 | int idx = EXT_CSD_GP_SIZE_MULT + i * 3; | |
1040 | mmc->capacity_gp[i] = (ext_csd[idx + 2] << 16) + | |
1041 | (ext_csd[idx + 1] << 8) + ext_csd[idx]; | |
1042 | mmc->capacity_gp[i] *= | |
1043 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; | |
1044 | mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; | |
1045 | } | |
d23e2c09 SG |
1046 | } |
1047 | ||
f866a46d SW |
1048 | err = mmc_set_capacity(mmc, mmc->part_num); |
1049 | if (err) | |
1050 | return err; | |
1051 | ||
272cc70b AF |
1052 | if (IS_SD(mmc)) |
1053 | err = sd_change_freq(mmc); | |
1054 | else | |
1055 | err = mmc_change_freq(mmc); | |
1056 | ||
1057 | if (err) | |
1058 | return err; | |
1059 | ||
1060 | /* Restrict card's capabilities by what the host can do */ | |
93bfd616 | 1061 | mmc->card_caps &= mmc->cfg->host_caps; |
272cc70b AF |
1062 | |
1063 | if (IS_SD(mmc)) { | |
1064 | if (mmc->card_caps & MMC_MODE_4BIT) { | |
1065 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
1066 | cmd.resp_type = MMC_RSP_R1; | |
1067 | cmd.cmdarg = mmc->rca << 16; | |
272cc70b AF |
1068 | |
1069 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1070 | if (err) | |
1071 | return err; | |
1072 | ||
1073 | cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; | |
1074 | cmd.resp_type = MMC_RSP_R1; | |
1075 | cmd.cmdarg = 2; | |
272cc70b AF |
1076 | err = mmc_send_cmd(mmc, &cmd, NULL); |
1077 | if (err) | |
1078 | return err; | |
1079 | ||
1080 | mmc_set_bus_width(mmc, 4); | |
1081 | } | |
1082 | ||
1083 | if (mmc->card_caps & MMC_MODE_HS) | |
ad5fd922 | 1084 | mmc->tran_speed = 50000000; |
272cc70b | 1085 | else |
ad5fd922 | 1086 | mmc->tran_speed = 25000000; |
272cc70b | 1087 | } else { |
7798f6db AF |
1088 | int idx; |
1089 | ||
1090 | /* An array of possible bus widths in order of preference */ | |
1091 | static unsigned ext_csd_bits[] = { | |
d22e3d46 JC |
1092 | EXT_CSD_DDR_BUS_WIDTH_8, |
1093 | EXT_CSD_DDR_BUS_WIDTH_4, | |
7798f6db AF |
1094 | EXT_CSD_BUS_WIDTH_8, |
1095 | EXT_CSD_BUS_WIDTH_4, | |
1096 | EXT_CSD_BUS_WIDTH_1, | |
1097 | }; | |
1098 | ||
1099 | /* An array to map CSD bus widths to host cap bits */ | |
1100 | static unsigned ext_to_hostcaps[] = { | |
d22e3d46 JC |
1101 | [EXT_CSD_DDR_BUS_WIDTH_4] = MMC_MODE_DDR_52MHz, |
1102 | [EXT_CSD_DDR_BUS_WIDTH_8] = MMC_MODE_DDR_52MHz, | |
7798f6db AF |
1103 | [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT, |
1104 | [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT, | |
1105 | }; | |
1106 | ||
1107 | /* An array to map chosen bus width to an integer */ | |
1108 | static unsigned widths[] = { | |
d22e3d46 | 1109 | 8, 4, 8, 4, 1, |
7798f6db AF |
1110 | }; |
1111 | ||
1112 | for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) { | |
1113 | unsigned int extw = ext_csd_bits[idx]; | |
1114 | ||
1115 | /* | |
1116 | * Check to make sure the controller supports | |
1117 | * this bus width, if it's more than 1 | |
1118 | */ | |
1119 | if (extw != EXT_CSD_BUS_WIDTH_1 && | |
93bfd616 | 1120 | !(mmc->cfg->host_caps & ext_to_hostcaps[extw])) |
7798f6db AF |
1121 | continue; |
1122 | ||
272cc70b | 1123 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
7798f6db | 1124 | EXT_CSD_BUS_WIDTH, extw); |
272cc70b AF |
1125 | |
1126 | if (err) | |
4137894e | 1127 | continue; |
272cc70b | 1128 | |
7798f6db | 1129 | mmc_set_bus_width(mmc, widths[idx]); |
4137894e LW |
1130 | |
1131 | err = mmc_send_ext_csd(mmc, test_csd); | |
1132 | if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \ | |
1133 | == test_csd[EXT_CSD_PARTITIONING_SUPPORT] | |
1134 | && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \ | |
1135 | == test_csd[EXT_CSD_ERASE_GROUP_DEF] \ | |
1136 | && ext_csd[EXT_CSD_REV] \ | |
1137 | == test_csd[EXT_CSD_REV] | |
1138 | && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \ | |
1139 | == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] | |
1140 | && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \ | |
1141 | &test_csd[EXT_CSD_SEC_CNT], 4) == 0) { | |
1142 | ||
7798f6db | 1143 | mmc->card_caps |= ext_to_hostcaps[extw]; |
4137894e LW |
1144 | break; |
1145 | } | |
272cc70b AF |
1146 | } |
1147 | ||
1148 | if (mmc->card_caps & MMC_MODE_HS) { | |
1149 | if (mmc->card_caps & MMC_MODE_HS_52MHz) | |
ad5fd922 | 1150 | mmc->tran_speed = 52000000; |
272cc70b | 1151 | else |
ad5fd922 JC |
1152 | mmc->tran_speed = 26000000; |
1153 | } | |
272cc70b AF |
1154 | } |
1155 | ||
ad5fd922 JC |
1156 | mmc_set_clock(mmc, mmc->tran_speed); |
1157 | ||
272cc70b AF |
1158 | /* fill in device description */ |
1159 | mmc->block_dev.lun = 0; | |
1160 | mmc->block_dev.type = 0; | |
1161 | mmc->block_dev.blksz = mmc->read_bl_len; | |
0472fbfd | 1162 | mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz); |
9b1f942c | 1163 | mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); |
56196826 | 1164 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
babce5f6 TH |
1165 | sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x", |
1166 | mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff), | |
1167 | (mmc->cid[3] >> 16) & 0xffff); | |
1168 | sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff, | |
1169 | (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, | |
1170 | (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff, | |
1171 | (mmc->cid[2] >> 24) & 0xff); | |
1172 | sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf, | |
1173 | (mmc->cid[2] >> 16) & 0xf); | |
56196826 PB |
1174 | #else |
1175 | mmc->block_dev.vendor[0] = 0; | |
1176 | mmc->block_dev.product[0] = 0; | |
1177 | mmc->block_dev.revision[0] = 0; | |
1178 | #endif | |
122efd43 | 1179 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT) |
272cc70b | 1180 | init_part(&mmc->block_dev); |
122efd43 | 1181 | #endif |
272cc70b AF |
1182 | |
1183 | return 0; | |
1184 | } | |
1185 | ||
fdbb873e | 1186 | static int mmc_send_if_cond(struct mmc *mmc) |
272cc70b AF |
1187 | { |
1188 | struct mmc_cmd cmd; | |
1189 | int err; | |
1190 | ||
1191 | cmd.cmdidx = SD_CMD_SEND_IF_COND; | |
1192 | /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ | |
93bfd616 | 1193 | cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa; |
272cc70b | 1194 | cmd.resp_type = MMC_RSP_R7; |
272cc70b AF |
1195 | |
1196 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1197 | ||
1198 | if (err) | |
1199 | return err; | |
1200 | ||
998be3dd | 1201 | if ((cmd.response[0] & 0xff) != 0xaa) |
272cc70b AF |
1202 | return UNUSABLE_ERR; |
1203 | else | |
1204 | mmc->version = SD_VERSION_2; | |
1205 | ||
1206 | return 0; | |
1207 | } | |
1208 | ||
93bfd616 PA |
1209 | /* not used any more */ |
1210 | int __deprecated mmc_register(struct mmc *mmc) | |
1211 | { | |
1212 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) | |
1213 | printf("%s is deprecated! use mmc_create() instead.\n", __func__); | |
1214 | #endif | |
1215 | return -1; | |
1216 | } | |
1217 | ||
1218 | struct mmc *mmc_create(const struct mmc_config *cfg, void *priv) | |
272cc70b | 1219 | { |
93bfd616 PA |
1220 | struct mmc *mmc; |
1221 | ||
1222 | /* quick validation */ | |
1223 | if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL || | |
1224 | cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0) | |
1225 | return NULL; | |
1226 | ||
1227 | mmc = calloc(1, sizeof(*mmc)); | |
1228 | if (mmc == NULL) | |
1229 | return NULL; | |
1230 | ||
1231 | mmc->cfg = cfg; | |
1232 | mmc->priv = priv; | |
1233 | ||
1234 | /* the following chunk was mmc_register() */ | |
1235 | ||
ab71188c MN |
1236 | /* Setup dsr related values */ |
1237 | mmc->dsr_imp = 0; | |
1238 | mmc->dsr = 0xffffffff; | |
272cc70b AF |
1239 | /* Setup the universal parts of the block interface just once */ |
1240 | mmc->block_dev.if_type = IF_TYPE_MMC; | |
1241 | mmc->block_dev.dev = cur_dev_num++; | |
1242 | mmc->block_dev.removable = 1; | |
1243 | mmc->block_dev.block_read = mmc_bread; | |
1244 | mmc->block_dev.block_write = mmc_bwrite; | |
e6f99a56 | 1245 | mmc->block_dev.block_erase = mmc_berase; |
272cc70b | 1246 | |
93bfd616 PA |
1247 | /* setup initial part type */ |
1248 | mmc->block_dev.part_type = mmc->cfg->part_type; | |
272cc70b | 1249 | |
93bfd616 | 1250 | INIT_LIST_HEAD(&mmc->link); |
272cc70b | 1251 | |
93bfd616 PA |
1252 | list_add_tail(&mmc->link, &mmc_devices); |
1253 | ||
1254 | return mmc; | |
1255 | } | |
1256 | ||
1257 | void mmc_destroy(struct mmc *mmc) | |
1258 | { | |
1259 | /* only freeing memory for now */ | |
1260 | free(mmc); | |
272cc70b AF |
1261 | } |
1262 | ||
df3fc526 | 1263 | #ifdef CONFIG_PARTITIONS |
272cc70b AF |
1264 | block_dev_desc_t *mmc_get_dev(int dev) |
1265 | { | |
1266 | struct mmc *mmc = find_mmc_device(dev); | |
6bb4b4bc | 1267 | if (!mmc || mmc_init(mmc)) |
40242bc3 | 1268 | return NULL; |
272cc70b | 1269 | |
40242bc3 | 1270 | return &mmc->block_dev; |
272cc70b | 1271 | } |
df3fc526 | 1272 | #endif |
272cc70b | 1273 | |
e9550449 | 1274 | int mmc_start_init(struct mmc *mmc) |
272cc70b | 1275 | { |
afd5932b | 1276 | int err; |
272cc70b | 1277 | |
ab769f22 | 1278 | /* we pretend there's no card when init is NULL */ |
93bfd616 | 1279 | if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) { |
48972d90 | 1280 | mmc->has_init = 0; |
56196826 | 1281 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
48972d90 | 1282 | printf("MMC: no card present\n"); |
56196826 | 1283 | #endif |
48972d90 TR |
1284 | return NO_CARD_ERR; |
1285 | } | |
1286 | ||
bc897b1d LW |
1287 | if (mmc->has_init) |
1288 | return 0; | |
1289 | ||
ab769f22 | 1290 | /* made sure it's not NULL earlier */ |
93bfd616 | 1291 | err = mmc->cfg->ops->init(mmc); |
272cc70b AF |
1292 | |
1293 | if (err) | |
1294 | return err; | |
1295 | ||
b86b85e2 IY |
1296 | mmc_set_bus_width(mmc, 1); |
1297 | mmc_set_clock(mmc, 1); | |
1298 | ||
272cc70b AF |
1299 | /* Reset the Card */ |
1300 | err = mmc_go_idle(mmc); | |
1301 | ||
1302 | if (err) | |
1303 | return err; | |
1304 | ||
bc897b1d LW |
1305 | /* The internal partition reset to user partition(0) at every CMD0*/ |
1306 | mmc->part_num = 0; | |
1307 | ||
272cc70b | 1308 | /* Test for SD version 2 */ |
afd5932b | 1309 | err = mmc_send_if_cond(mmc); |
272cc70b | 1310 | |
272cc70b AF |
1311 | /* Now try to get the SD card's operating condition */ |
1312 | err = sd_send_op_cond(mmc); | |
1313 | ||
1314 | /* If the command timed out, we check for an MMC card */ | |
1315 | if (err == TIMEOUT) { | |
1316 | err = mmc_send_op_cond(mmc); | |
1317 | ||
e9550449 | 1318 | if (err && err != IN_PROGRESS) { |
56196826 | 1319 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
272cc70b | 1320 | printf("Card did not respond to voltage select!\n"); |
56196826 | 1321 | #endif |
272cc70b AF |
1322 | return UNUSABLE_ERR; |
1323 | } | |
1324 | } | |
1325 | ||
e9550449 CLC |
1326 | if (err == IN_PROGRESS) |
1327 | mmc->init_in_progress = 1; | |
1328 | ||
1329 | return err; | |
1330 | } | |
1331 | ||
1332 | static int mmc_complete_init(struct mmc *mmc) | |
1333 | { | |
1334 | int err = 0; | |
1335 | ||
1336 | if (mmc->op_cond_pending) | |
1337 | err = mmc_complete_op_cond(mmc); | |
1338 | ||
1339 | if (!err) | |
1340 | err = mmc_startup(mmc); | |
bc897b1d LW |
1341 | if (err) |
1342 | mmc->has_init = 0; | |
1343 | else | |
1344 | mmc->has_init = 1; | |
e9550449 CLC |
1345 | mmc->init_in_progress = 0; |
1346 | return err; | |
1347 | } | |
1348 | ||
1349 | int mmc_init(struct mmc *mmc) | |
1350 | { | |
1351 | int err = IN_PROGRESS; | |
d803fea5 | 1352 | unsigned start; |
e9550449 CLC |
1353 | |
1354 | if (mmc->has_init) | |
1355 | return 0; | |
d803fea5 MZ |
1356 | |
1357 | start = get_timer(0); | |
1358 | ||
e9550449 CLC |
1359 | if (!mmc->init_in_progress) |
1360 | err = mmc_start_init(mmc); | |
1361 | ||
1362 | if (!err || err == IN_PROGRESS) | |
1363 | err = mmc_complete_init(mmc); | |
1364 | debug("%s: %d, time %lu\n", __func__, err, get_timer(start)); | |
bc897b1d | 1365 | return err; |
272cc70b AF |
1366 | } |
1367 | ||
ab71188c MN |
1368 | int mmc_set_dsr(struct mmc *mmc, u16 val) |
1369 | { | |
1370 | mmc->dsr = val; | |
1371 | return 0; | |
1372 | } | |
1373 | ||
272cc70b AF |
1374 | /* |
1375 | * CPU and board-specific MMC initializations. Aliased function | |
1376 | * signals caller to move on | |
1377 | */ | |
1378 | static int __def_mmc_init(bd_t *bis) | |
1379 | { | |
1380 | return -1; | |
1381 | } | |
1382 | ||
f9a109b3 PT |
1383 | int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init"))); |
1384 | int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init"))); | |
272cc70b | 1385 | |
56196826 PB |
1386 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
1387 | ||
272cc70b AF |
1388 | void print_mmc_devices(char separator) |
1389 | { | |
1390 | struct mmc *m; | |
1391 | struct list_head *entry; | |
1392 | ||
1393 | list_for_each(entry, &mmc_devices) { | |
1394 | m = list_entry(entry, struct mmc, link); | |
1395 | ||
93bfd616 | 1396 | printf("%s: %d", m->cfg->name, m->block_dev.dev); |
272cc70b AF |
1397 | |
1398 | if (entry->next != &mmc_devices) | |
1399 | printf("%c ", separator); | |
1400 | } | |
1401 | ||
1402 | printf("\n"); | |
1403 | } | |
1404 | ||
56196826 PB |
1405 | #else |
1406 | void print_mmc_devices(char separator) { } | |
1407 | #endif | |
1408 | ||
ea6ebe21 LW |
1409 | int get_mmc_num(void) |
1410 | { | |
1411 | return cur_dev_num; | |
1412 | } | |
1413 | ||
e9550449 CLC |
1414 | void mmc_set_preinit(struct mmc *mmc, int preinit) |
1415 | { | |
1416 | mmc->preinit = preinit; | |
1417 | } | |
1418 | ||
1419 | static void do_preinit(void) | |
1420 | { | |
1421 | struct mmc *m; | |
1422 | struct list_head *entry; | |
1423 | ||
1424 | list_for_each(entry, &mmc_devices) { | |
1425 | m = list_entry(entry, struct mmc, link); | |
1426 | ||
1427 | if (m->preinit) | |
1428 | mmc_start_init(m); | |
1429 | } | |
1430 | } | |
1431 | ||
1432 | ||
272cc70b AF |
1433 | int mmc_initialize(bd_t *bis) |
1434 | { | |
1435 | INIT_LIST_HEAD (&mmc_devices); | |
1436 | cur_dev_num = 0; | |
1437 | ||
1438 | if (board_mmc_init(bis) < 0) | |
1439 | cpu_mmc_init(bis); | |
1440 | ||
bb0dc108 | 1441 | #ifndef CONFIG_SPL_BUILD |
272cc70b | 1442 | print_mmc_devices(','); |
bb0dc108 | 1443 | #endif |
272cc70b | 1444 | |
e9550449 | 1445 | do_preinit(); |
272cc70b AF |
1446 | return 0; |
1447 | } | |
3690d6d6 A |
1448 | |
1449 | #ifdef CONFIG_SUPPORT_EMMC_BOOT | |
1450 | /* | |
1451 | * This function changes the size of boot partition and the size of rpmb | |
1452 | * partition present on EMMC devices. | |
1453 | * | |
1454 | * Input Parameters: | |
1455 | * struct *mmc: pointer for the mmc device strcuture | |
1456 | * bootsize: size of boot partition | |
1457 | * rpmbsize: size of rpmb partition | |
1458 | * | |
1459 | * Returns 0 on success. | |
1460 | */ | |
1461 | ||
1462 | int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, | |
1463 | unsigned long rpmbsize) | |
1464 | { | |
1465 | int err; | |
1466 | struct mmc_cmd cmd; | |
1467 | ||
1468 | /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */ | |
1469 | cmd.cmdidx = MMC_CMD_RES_MAN; | |
1470 | cmd.resp_type = MMC_RSP_R1b; | |
1471 | cmd.cmdarg = MMC_CMD62_ARG1; | |
1472 | ||
1473 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1474 | if (err) { | |
1475 | debug("mmc_boot_partition_size_change: Error1 = %d\n", err); | |
1476 | return err; | |
1477 | } | |
1478 | ||
1479 | /* Boot partition changing mode */ | |
1480 | cmd.cmdidx = MMC_CMD_RES_MAN; | |
1481 | cmd.resp_type = MMC_RSP_R1b; | |
1482 | cmd.cmdarg = MMC_CMD62_ARG2; | |
1483 | ||
1484 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1485 | if (err) { | |
1486 | debug("mmc_boot_partition_size_change: Error2 = %d\n", err); | |
1487 | return err; | |
1488 | } | |
1489 | /* boot partition size is multiple of 128KB */ | |
1490 | bootsize = (bootsize * 1024) / 128; | |
1491 | ||
1492 | /* Arg: boot partition size */ | |
1493 | cmd.cmdidx = MMC_CMD_RES_MAN; | |
1494 | cmd.resp_type = MMC_RSP_R1b; | |
1495 | cmd.cmdarg = bootsize; | |
1496 | ||
1497 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1498 | if (err) { | |
1499 | debug("mmc_boot_partition_size_change: Error3 = %d\n", err); | |
1500 | return err; | |
1501 | } | |
1502 | /* RPMB partition size is multiple of 128KB */ | |
1503 | rpmbsize = (rpmbsize * 1024) / 128; | |
1504 | /* Arg: RPMB partition size */ | |
1505 | cmd.cmdidx = MMC_CMD_RES_MAN; | |
1506 | cmd.resp_type = MMC_RSP_R1b; | |
1507 | cmd.cmdarg = rpmbsize; | |
1508 | ||
1509 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1510 | if (err) { | |
1511 | debug("mmc_boot_partition_size_change: Error4 = %d\n", err); | |
1512 | return err; | |
1513 | } | |
1514 | return 0; | |
1515 | } | |
1516 | ||
5a99b9de TR |
1517 | /* |
1518 | * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH | |
1519 | * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH | |
1520 | * and BOOT_MODE. | |
1521 | * | |
1522 | * Returns 0 on success. | |
1523 | */ | |
1524 | int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode) | |
1525 | { | |
1526 | int err; | |
1527 | ||
1528 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH, | |
1529 | EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) | | |
1530 | EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) | | |
1531 | EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width)); | |
1532 | ||
1533 | if (err) | |
1534 | return err; | |
1535 | return 0; | |
1536 | } | |
1537 | ||
792970b0 TR |
1538 | /* |
1539 | * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG) | |
1540 | * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and | |
1541 | * PARTITION_ACCESS. | |
1542 | * | |
1543 | * Returns 0 on success. | |
1544 | */ | |
1545 | int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access) | |
1546 | { | |
1547 | int err; | |
1548 | ||
1549 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, | |
1550 | EXT_CSD_BOOT_ACK(ack) | | |
1551 | EXT_CSD_BOOT_PART_NUM(part_num) | | |
1552 | EXT_CSD_PARTITION_ACCESS(access)); | |
1553 | ||
1554 | if (err) | |
1555 | return err; | |
1556 | return 0; | |
1557 | } | |
33ace362 TR |
1558 | |
1559 | /* | |
1560 | * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value | |
1561 | * for enable. Note that this is a write-once field for non-zero values. | |
1562 | * | |
1563 | * Returns 0 on success. | |
1564 | */ | |
1565 | int mmc_set_rst_n_function(struct mmc *mmc, u8 enable) | |
1566 | { | |
1567 | return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION, | |
1568 | enable); | |
1569 | } | |
3690d6d6 | 1570 | #endif |