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[people/ms/u-boot.git] / drivers / mmc / mmc.c
CommitLineData
272cc70b
AF
1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <config.h>
27#include <common.h>
28#include <command.h>
29#include <mmc.h>
30#include <part.h>
31#include <malloc.h>
32#include <linux/list.h>
9b1f942c 33#include <div64.h>
272cc70b 34
ce0fbcd2
MW
35/* Set block count limit because of 16 bit register limit on some hardware*/
36#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
37#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
38#endif
39
272cc70b
AF
40static struct list_head mmc_devices;
41static int cur_dev_num = -1;
42
d23d8d7e
NK
43int __weak board_mmc_getwp(struct mmc *mmc)
44{
45 return -1;
46}
47
48int mmc_getwp(struct mmc *mmc)
49{
50 int wp;
51
52 wp = board_mmc_getwp(mmc);
53
d4e1da4e
PK
54 if (wp < 0) {
55 if (mmc->getwp)
56 wp = mmc->getwp(mmc);
57 else
58 wp = 0;
59 }
d23d8d7e
NK
60
61 return wp;
62}
63
314284b1 64int __board_mmc_getcd(struct mmc *mmc) {
11fdade2
SB
65 return -1;
66}
67
314284b1 68int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
11fdade2
SB
69 alias("__board_mmc_getcd")));
70
fdbb873e
KP
71static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
72 struct mmc_data *data)
272cc70b 73{
8635ff9e 74 struct mmc_data backup;
5db2fe3a 75 int ret;
8635ff9e
MV
76
77 memset(&backup, 0, sizeof(backup));
78
8635ff9e 79#ifdef CONFIG_MMC_TRACE
5db2fe3a
RR
80 int i;
81 u8 *ptr;
82
83 printf("CMD_SEND:%d\n", cmd->cmdidx);
84 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
5db2fe3a
RR
85 ret = mmc->send_cmd(mmc, cmd, data);
86 switch (cmd->resp_type) {
87 case MMC_RSP_NONE:
88 printf("\t\tMMC_RSP_NONE\n");
89 break;
90 case MMC_RSP_R1:
91 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
92 cmd->response[0]);
93 break;
94 case MMC_RSP_R1b:
95 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
96 cmd->response[0]);
97 break;
98 case MMC_RSP_R2:
99 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
100 cmd->response[0]);
101 printf("\t\t \t\t 0x%08X \n",
102 cmd->response[1]);
103 printf("\t\t \t\t 0x%08X \n",
104 cmd->response[2]);
105 printf("\t\t \t\t 0x%08X \n",
106 cmd->response[3]);
107 printf("\n");
108 printf("\t\t\t\t\tDUMPING DATA\n");
109 for (i = 0; i < 4; i++) {
110 int j;
111 printf("\t\t\t\t\t%03d - ", i*4);
146bec79 112 ptr = (u8 *)&cmd->response[i];
5db2fe3a
RR
113 ptr += 3;
114 for (j = 0; j < 4; j++)
115 printf("%02X ", *ptr--);
116 printf("\n");
117 }
118 break;
119 case MMC_RSP_R3:
120 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
121 cmd->response[0]);
122 break;
123 default:
124 printf("\t\tERROR MMC rsp not supported\n");
125 break;
126 }
5db2fe3a 127#else
8635ff9e 128 ret = mmc->send_cmd(mmc, cmd, data);
5db2fe3a 129#endif
8635ff9e 130 return ret;
272cc70b
AF
131}
132
fdbb873e 133static int mmc_send_status(struct mmc *mmc, int timeout)
5d4fc8d9
RR
134{
135 struct mmc_cmd cmd;
d617c426 136 int err, retries = 5;
5d4fc8d9
RR
137#ifdef CONFIG_MMC_TRACE
138 int status;
139#endif
140
141 cmd.cmdidx = MMC_CMD_SEND_STATUS;
142 cmd.resp_type = MMC_RSP_R1;
aaf3d41a
MV
143 if (!mmc_host_is_spi(mmc))
144 cmd.cmdarg = mmc->rca << 16;
5d4fc8d9
RR
145
146 do {
147 err = mmc_send_cmd(mmc, &cmd, NULL);
d617c426
JK
148 if (!err) {
149 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
150 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
151 MMC_STATE_PRG)
152 break;
153 else if (cmd.response[0] & MMC_STATUS_MASK) {
154 printf("Status Error: 0x%08X\n",
155 cmd.response[0]);
156 return COMM_ERR;
157 }
158 } else if (--retries < 0)
5d4fc8d9 159 return err;
5d4fc8d9
RR
160
161 udelay(1000);
162
5d4fc8d9
RR
163 } while (timeout--);
164
5db2fe3a
RR
165#ifdef CONFIG_MMC_TRACE
166 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
167 printf("CURR STATE:%d\n", status);
168#endif
5b0c942f 169 if (timeout <= 0) {
5d4fc8d9
RR
170 printf("Timeout waiting card ready\n");
171 return TIMEOUT;
172 }
173
174 return 0;
175}
176
fdbb873e 177static int mmc_set_blocklen(struct mmc *mmc, int len)
272cc70b
AF
178{
179 struct mmc_cmd cmd;
180
181 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
182 cmd.resp_type = MMC_RSP_R1;
183 cmd.cmdarg = len;
272cc70b
AF
184
185 return mmc_send_cmd(mmc, &cmd, NULL);
186}
187
188struct mmc *find_mmc_device(int dev_num)
189{
190 struct mmc *m;
191 struct list_head *entry;
192
193 list_for_each(entry, &mmc_devices) {
194 m = list_entry(entry, struct mmc, link);
195
196 if (m->block_dev.dev == dev_num)
197 return m;
198 }
199
200 printf("MMC Device %d not found\n", dev_num);
201
202 return NULL;
203}
204
e6f99a56
LW
205static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
206{
207 struct mmc_cmd cmd;
208 ulong end;
209 int err, start_cmd, end_cmd;
210
211 if (mmc->high_capacity)
212 end = start + blkcnt - 1;
213 else {
214 end = (start + blkcnt - 1) * mmc->write_bl_len;
215 start *= mmc->write_bl_len;
216 }
217
218 if (IS_SD(mmc)) {
219 start_cmd = SD_CMD_ERASE_WR_BLK_START;
220 end_cmd = SD_CMD_ERASE_WR_BLK_END;
221 } else {
222 start_cmd = MMC_CMD_ERASE_GROUP_START;
223 end_cmd = MMC_CMD_ERASE_GROUP_END;
224 }
225
226 cmd.cmdidx = start_cmd;
227 cmd.cmdarg = start;
228 cmd.resp_type = MMC_RSP_R1;
e6f99a56
LW
229
230 err = mmc_send_cmd(mmc, &cmd, NULL);
231 if (err)
232 goto err_out;
233
234 cmd.cmdidx = end_cmd;
235 cmd.cmdarg = end;
236
237 err = mmc_send_cmd(mmc, &cmd, NULL);
238 if (err)
239 goto err_out;
240
241 cmd.cmdidx = MMC_CMD_ERASE;
242 cmd.cmdarg = SECURE_ERASE;
243 cmd.resp_type = MMC_RSP_R1b;
244
245 err = mmc_send_cmd(mmc, &cmd, NULL);
246 if (err)
247 goto err_out;
248
249 return 0;
250
251err_out:
252 puts("mmc erase failed\n");
253 return err;
254}
255
256static unsigned long
257mmc_berase(int dev_num, unsigned long start, lbaint_t blkcnt)
258{
259 int err = 0;
260 struct mmc *mmc = find_mmc_device(dev_num);
261 lbaint_t blk = 0, blk_r = 0;
d2d8afae 262 int timeout = 1000;
e6f99a56
LW
263
264 if (!mmc)
265 return -1;
266
267 if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size))
268 printf("\n\nCaution! Your devices Erase group is 0x%x\n"
269 "The erase range would be change to 0x%lx~0x%lx\n\n",
270 mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
271 ((start + blkcnt + mmc->erase_grp_size)
272 & ~(mmc->erase_grp_size - 1)) - 1);
273
274 while (blk < blkcnt) {
275 blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
276 mmc->erase_grp_size : (blkcnt - blk);
277 err = mmc_erase_t(mmc, start + blk, blk_r);
278 if (err)
279 break;
280
281 blk += blk_r;
d2d8afae
JH
282
283 /* Waiting for the ready status */
284 if (mmc_send_status(mmc, timeout))
285 return 0;
e6f99a56
LW
286 }
287
288 return blk;
289}
290
272cc70b 291static ulong
0158126e 292mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t blkcnt, const void*src)
272cc70b
AF
293{
294 struct mmc_cmd cmd;
295 struct mmc_data data;
5d4fc8d9 296 int timeout = 1000;
272cc70b 297
d2bf29e3 298 if ((start + blkcnt) > mmc->block_dev.lba) {
def412b6 299 printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
d2bf29e3
LW
300 start + blkcnt, mmc->block_dev.lba);
301 return 0;
302 }
272cc70b 303
a586c0aa
RC
304 if (blkcnt == 0)
305 return 0;
306 else if (blkcnt == 1)
272cc70b 307 cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK;
a586c0aa
RC
308 else
309 cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK;
272cc70b
AF
310
311 if (mmc->high_capacity)
312 cmd.cmdarg = start;
313 else
def412b6 314 cmd.cmdarg = start * mmc->write_bl_len;
272cc70b
AF
315
316 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
317
318 data.src = src;
319 data.blocks = blkcnt;
def412b6 320 data.blocksize = mmc->write_bl_len;
272cc70b
AF
321 data.flags = MMC_DATA_WRITE;
322
def412b6
SS
323 if (mmc_send_cmd(mmc, &cmd, &data)) {
324 printf("mmc write failed\n");
325 return 0;
272cc70b
AF
326 }
327
d52ebf10
TC
328 /* SPI multiblock writes terminate using a special
329 * token, not a STOP_TRANSMISSION request.
330 */
331 if (!mmc_host_is_spi(mmc) && blkcnt > 1) {
272cc70b
AF
332 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
333 cmd.cmdarg = 0;
334 cmd.resp_type = MMC_RSP_R1b;
def412b6
SS
335 if (mmc_send_cmd(mmc, &cmd, NULL)) {
336 printf("mmc fail to send stop cmd\n");
337 return 0;
0158126e 338 }
272cc70b
AF
339 }
340
93ad0d18
JK
341 /* Waiting for the ready status */
342 if (mmc_send_status(mmc, timeout))
343 return 0;
344
272cc70b
AF
345 return blkcnt;
346}
347
0158126e
LW
348static ulong
349mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const void*src)
350{
0158126e
LW
351 lbaint_t cur, blocks_todo = blkcnt;
352
def412b6 353 struct mmc *mmc = find_mmc_device(dev_num);
0158126e 354 if (!mmc)
def412b6 355 return 0;
0158126e 356
def412b6
SS
357 if (mmc_set_blocklen(mmc, mmc->write_bl_len))
358 return 0;
0158126e
LW
359
360 do {
8feafcc4 361 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
0158126e 362 if(mmc_write_blocks(mmc, start, cur, src) != cur)
def412b6 363 return 0;
0158126e
LW
364 blocks_todo -= cur;
365 start += cur;
366 src += cur * mmc->write_bl_len;
367 } while (blocks_todo > 0);
368
369 return blkcnt;
370}
371
fdbb873e
KP
372static int mmc_read_blocks(struct mmc *mmc, void *dst, ulong start,
373 lbaint_t blkcnt)
272cc70b
AF
374{
375 struct mmc_cmd cmd;
376 struct mmc_data data;
377
4a1a06bc
AS
378 if (blkcnt > 1)
379 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
380 else
381 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
272cc70b
AF
382
383 if (mmc->high_capacity)
4a1a06bc 384 cmd.cmdarg = start;
272cc70b 385 else
4a1a06bc 386 cmd.cmdarg = start * mmc->read_bl_len;
272cc70b
AF
387
388 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
389
390 data.dest = dst;
4a1a06bc 391 data.blocks = blkcnt;
272cc70b
AF
392 data.blocksize = mmc->read_bl_len;
393 data.flags = MMC_DATA_READ;
394
4a1a06bc
AS
395 if (mmc_send_cmd(mmc, &cmd, &data))
396 return 0;
272cc70b 397
4a1a06bc
AS
398 if (blkcnt > 1) {
399 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
400 cmd.cmdarg = 0;
401 cmd.resp_type = MMC_RSP_R1b;
4a1a06bc
AS
402 if (mmc_send_cmd(mmc, &cmd, NULL)) {
403 printf("mmc fail to send stop cmd\n");
404 return 0;
405 }
272cc70b
AF
406 }
407
4a1a06bc 408 return blkcnt;
272cc70b
AF
409}
410
411static ulong mmc_bread(int dev_num, ulong start, lbaint_t blkcnt, void *dst)
412{
4a1a06bc
AS
413 lbaint_t cur, blocks_todo = blkcnt;
414
415 if (blkcnt == 0)
416 return 0;
272cc70b 417
4a1a06bc 418 struct mmc *mmc = find_mmc_device(dev_num);
272cc70b
AF
419 if (!mmc)
420 return 0;
421
d2bf29e3 422 if ((start + blkcnt) > mmc->block_dev.lba) {
4a1a06bc 423 printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
d2bf29e3
LW
424 start + blkcnt, mmc->block_dev.lba);
425 return 0;
426 }
272cc70b 427
4a1a06bc 428 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
272cc70b 429 return 0;
272cc70b 430
4a1a06bc 431 do {
8feafcc4 432 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
4a1a06bc
AS
433 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
434 return 0;
435 blocks_todo -= cur;
436 start += cur;
437 dst += cur * mmc->read_bl_len;
438 } while (blocks_todo > 0);
272cc70b
AF
439
440 return blkcnt;
441}
442
fdbb873e 443static int mmc_go_idle(struct mmc *mmc)
272cc70b
AF
444{
445 struct mmc_cmd cmd;
446 int err;
447
448 udelay(1000);
449
450 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
451 cmd.cmdarg = 0;
452 cmd.resp_type = MMC_RSP_NONE;
272cc70b
AF
453
454 err = mmc_send_cmd(mmc, &cmd, NULL);
455
456 if (err)
457 return err;
458
459 udelay(2000);
460
461 return 0;
462}
463
fdbb873e 464static int sd_send_op_cond(struct mmc *mmc)
272cc70b
AF
465{
466 int timeout = 1000;
467 int err;
468 struct mmc_cmd cmd;
469
470 do {
471 cmd.cmdidx = MMC_CMD_APP_CMD;
472 cmd.resp_type = MMC_RSP_R1;
473 cmd.cmdarg = 0;
272cc70b
AF
474
475 err = mmc_send_cmd(mmc, &cmd, NULL);
476
477 if (err)
478 return err;
479
480 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
481 cmd.resp_type = MMC_RSP_R3;
250de12b
SB
482
483 /*
484 * Most cards do not answer if some reserved bits
485 * in the ocr are set. However, Some controller
486 * can set bit 7 (reserved for low voltages), but
487 * how to manage low voltages SD card is not yet
488 * specified.
489 */
d52ebf10
TC
490 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
491 (mmc->voltages & 0xff8000);
272cc70b
AF
492
493 if (mmc->version == SD_VERSION_2)
494 cmd.cmdarg |= OCR_HCS;
495
496 err = mmc_send_cmd(mmc, &cmd, NULL);
497
498 if (err)
499 return err;
500
501 udelay(1000);
502 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
503
504 if (timeout <= 0)
505 return UNUSABLE_ERR;
506
507 if (mmc->version != SD_VERSION_2)
508 mmc->version = SD_VERSION_1_0;
509
d52ebf10
TC
510 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
511 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
512 cmd.resp_type = MMC_RSP_R3;
513 cmd.cmdarg = 0;
d52ebf10
TC
514
515 err = mmc_send_cmd(mmc, &cmd, NULL);
516
517 if (err)
518 return err;
519 }
520
998be3dd 521 mmc->ocr = cmd.response[0];
272cc70b
AF
522
523 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
524 mmc->rca = 0;
525
526 return 0;
527}
528
e9550449
CLC
529/* We pass in the cmd since otherwise the init seems to fail */
530static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
531 int use_arg)
272cc70b 532{
272cc70b
AF
533 int err;
534
e9550449
CLC
535 cmd->cmdidx = MMC_CMD_SEND_OP_COND;
536 cmd->resp_type = MMC_RSP_R3;
537 cmd->cmdarg = 0;
538 if (use_arg && !mmc_host_is_spi(mmc)) {
539 cmd->cmdarg =
540 (mmc->voltages &
541 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
542 (mmc->op_cond_response & OCR_ACCESS_MODE);
543
544 if (mmc->host_caps & MMC_MODE_HC)
545 cmd->cmdarg |= OCR_HCS;
546 }
547 err = mmc_send_cmd(mmc, cmd, NULL);
548 if (err)
549 return err;
550 mmc->op_cond_response = cmd->response[0];
551 return 0;
552}
553
554int mmc_send_op_cond(struct mmc *mmc)
555{
556 struct mmc_cmd cmd;
557 int err, i;
558
272cc70b
AF
559 /* Some cards seem to need this */
560 mmc_go_idle(mmc);
561
31cacbab 562 /* Asking to the card its capabilities */
e9550449
CLC
563 mmc->op_cond_pending = 1;
564 for (i = 0; i < 2; i++) {
565 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
566 if (err)
567 return err;
cd6881b5 568
e9550449
CLC
569 /* exit if not busy (flag seems to be inverted) */
570 if (mmc->op_cond_response & OCR_BUSY)
571 return 0;
572 }
573 return IN_PROGRESS;
574}
cd6881b5 575
e9550449
CLC
576int mmc_complete_op_cond(struct mmc *mmc)
577{
578 struct mmc_cmd cmd;
579 int timeout = 1000;
580 uint start;
581 int err;
cd6881b5 582
e9550449
CLC
583 mmc->op_cond_pending = 0;
584 start = get_timer(0);
272cc70b 585 do {
e9550449 586 err = mmc_send_op_cond_iter(mmc, &cmd, 1);
272cc70b
AF
587 if (err)
588 return err;
e9550449
CLC
589 if (get_timer(start) > timeout)
590 return UNUSABLE_ERR;
591 udelay(100);
592 } while (!(mmc->op_cond_response & OCR_BUSY));
272cc70b 593
d52ebf10
TC
594 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
595 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
596 cmd.resp_type = MMC_RSP_R3;
597 cmd.cmdarg = 0;
d52ebf10
TC
598
599 err = mmc_send_cmd(mmc, &cmd, NULL);
600
601 if (err)
602 return err;
603 }
604
272cc70b 605 mmc->version = MMC_VERSION_UNKNOWN;
998be3dd 606 mmc->ocr = cmd.response[0];
272cc70b
AF
607
608 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
609 mmc->rca = 0;
610
611 return 0;
612}
613
614
fdbb873e 615static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
272cc70b
AF
616{
617 struct mmc_cmd cmd;
618 struct mmc_data data;
619 int err;
620
621 /* Get the Card Status Register */
622 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
623 cmd.resp_type = MMC_RSP_R1;
624 cmd.cmdarg = 0;
272cc70b 625
cdfd1ac6 626 data.dest = (char *)ext_csd;
272cc70b 627 data.blocks = 1;
8bfa195e 628 data.blocksize = MMC_MAX_BLOCK_LEN;
272cc70b
AF
629 data.flags = MMC_DATA_READ;
630
631 err = mmc_send_cmd(mmc, &cmd, &data);
632
633 return err;
634}
635
636
fdbb873e 637static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
272cc70b
AF
638{
639 struct mmc_cmd cmd;
5d4fc8d9
RR
640 int timeout = 1000;
641 int ret;
272cc70b
AF
642
643 cmd.cmdidx = MMC_CMD_SWITCH;
644 cmd.resp_type = MMC_RSP_R1b;
645 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
5d4fc8d9
RR
646 (index << 16) |
647 (value << 8);
272cc70b 648
5d4fc8d9
RR
649 ret = mmc_send_cmd(mmc, &cmd, NULL);
650
651 /* Waiting for the ready status */
93ad0d18
JK
652 if (!ret)
653 ret = mmc_send_status(mmc, timeout);
5d4fc8d9
RR
654
655 return ret;
656
272cc70b
AF
657}
658
fdbb873e 659static int mmc_change_freq(struct mmc *mmc)
272cc70b 660{
8bfa195e 661 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
272cc70b
AF
662 char cardtype;
663 int err;
664
665 mmc->card_caps = 0;
666
d52ebf10
TC
667 if (mmc_host_is_spi(mmc))
668 return 0;
669
272cc70b
AF
670 /* Only version 4 supports high-speed */
671 if (mmc->version < MMC_VERSION_4)
672 return 0;
673
272cc70b
AF
674 err = mmc_send_ext_csd(mmc, ext_csd);
675
676 if (err)
677 return err;
678
0560db18 679 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
272cc70b
AF
680
681 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
682
683 if (err)
684 return err;
685
686 /* Now check to see that it worked */
687 err = mmc_send_ext_csd(mmc, ext_csd);
688
689 if (err)
690 return err;
691
692 /* No high-speed support */
0560db18 693 if (!ext_csd[EXT_CSD_HS_TIMING])
272cc70b
AF
694 return 0;
695
696 /* High Speed is set, there are two types: 52MHz and 26MHz */
697 if (cardtype & MMC_HS_52MHZ)
698 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
699 else
700 mmc->card_caps |= MMC_MODE_HS;
701
702 return 0;
703}
704
f866a46d
SW
705static int mmc_set_capacity(struct mmc *mmc, int part_num)
706{
707 switch (part_num) {
708 case 0:
709 mmc->capacity = mmc->capacity_user;
710 break;
711 case 1:
712 case 2:
713 mmc->capacity = mmc->capacity_boot;
714 break;
715 case 3:
716 mmc->capacity = mmc->capacity_rpmb;
717 break;
718 case 4:
719 case 5:
720 case 6:
721 case 7:
722 mmc->capacity = mmc->capacity_gp[part_num - 4];
723 break;
724 default:
725 return -1;
726 }
727
728 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
729
730 return 0;
731}
732
bc897b1d
LW
733int mmc_switch_part(int dev_num, unsigned int part_num)
734{
735 struct mmc *mmc = find_mmc_device(dev_num);
f866a46d 736 int ret;
bc897b1d
LW
737
738 if (!mmc)
739 return -1;
740
f866a46d
SW
741 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
742 (mmc->part_config & ~PART_ACCESS_MASK)
743 | (part_num & PART_ACCESS_MASK));
744 if (ret)
745 return ret;
746
747 return mmc_set_capacity(mmc, part_num);
bc897b1d
LW
748}
749
48972d90
TR
750int mmc_getcd(struct mmc *mmc)
751{
752 int cd;
753
754 cd = board_mmc_getcd(mmc);
755
d4e1da4e
PK
756 if (cd < 0) {
757 if (mmc->getcd)
758 cd = mmc->getcd(mmc);
759 else
760 cd = 1;
761 }
48972d90
TR
762
763 return cd;
764}
765
fdbb873e 766static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
272cc70b
AF
767{
768 struct mmc_cmd cmd;
769 struct mmc_data data;
770
771 /* Switch the frequency */
772 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
773 cmd.resp_type = MMC_RSP_R1;
774 cmd.cmdarg = (mode << 31) | 0xffffff;
775 cmd.cmdarg &= ~(0xf << (group * 4));
776 cmd.cmdarg |= value << (group * 4);
272cc70b
AF
777
778 data.dest = (char *)resp;
779 data.blocksize = 64;
780 data.blocks = 1;
781 data.flags = MMC_DATA_READ;
782
783 return mmc_send_cmd(mmc, &cmd, &data);
784}
785
786
fdbb873e 787static int sd_change_freq(struct mmc *mmc)
272cc70b
AF
788{
789 int err;
790 struct mmc_cmd cmd;
f781dd38
A
791 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
792 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
272cc70b
AF
793 struct mmc_data data;
794 int timeout;
795
796 mmc->card_caps = 0;
797
d52ebf10
TC
798 if (mmc_host_is_spi(mmc))
799 return 0;
800
272cc70b
AF
801 /* Read the SCR to find out if this card supports higher speeds */
802 cmd.cmdidx = MMC_CMD_APP_CMD;
803 cmd.resp_type = MMC_RSP_R1;
804 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
805
806 err = mmc_send_cmd(mmc, &cmd, NULL);
807
808 if (err)
809 return err;
810
811 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
812 cmd.resp_type = MMC_RSP_R1;
813 cmd.cmdarg = 0;
272cc70b
AF
814
815 timeout = 3;
816
817retry_scr:
f781dd38 818 data.dest = (char *)scr;
272cc70b
AF
819 data.blocksize = 8;
820 data.blocks = 1;
821 data.flags = MMC_DATA_READ;
822
823 err = mmc_send_cmd(mmc, &cmd, &data);
824
825 if (err) {
826 if (timeout--)
827 goto retry_scr;
828
829 return err;
830 }
831
4e3d89ba
YK
832 mmc->scr[0] = __be32_to_cpu(scr[0]);
833 mmc->scr[1] = __be32_to_cpu(scr[1]);
272cc70b
AF
834
835 switch ((mmc->scr[0] >> 24) & 0xf) {
836 case 0:
837 mmc->version = SD_VERSION_1_0;
838 break;
839 case 1:
840 mmc->version = SD_VERSION_1_10;
841 break;
842 case 2:
843 mmc->version = SD_VERSION_2;
1741c64d
JC
844 if ((mmc->scr[0] >> 15) & 0x1)
845 mmc->version = SD_VERSION_3;
272cc70b
AF
846 break;
847 default:
848 mmc->version = SD_VERSION_1_0;
849 break;
850 }
851
b44c7083
AS
852 if (mmc->scr[0] & SD_DATA_4BIT)
853 mmc->card_caps |= MMC_MODE_4BIT;
854
272cc70b
AF
855 /* Version 1.0 doesn't support switching */
856 if (mmc->version == SD_VERSION_1_0)
857 return 0;
858
859 timeout = 4;
860 while (timeout--) {
861 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
f781dd38 862 (u8 *)switch_status);
272cc70b
AF
863
864 if (err)
865 return err;
866
867 /* The high-speed function is busy. Try again */
4e3d89ba 868 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
272cc70b
AF
869 break;
870 }
871
272cc70b 872 /* If high-speed isn't supported, we return */
4e3d89ba 873 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
272cc70b
AF
874 return 0;
875
2c3fbf4c
ML
876 /*
877 * If the host doesn't support SD_HIGHSPEED, do not switch card to
878 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
879 * This can avoid furthur problem when the card runs in different
880 * mode between the host.
881 */
882 if (!((mmc->host_caps & MMC_MODE_HS_52MHz) &&
883 (mmc->host_caps & MMC_MODE_HS)))
884 return 0;
885
f781dd38 886 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
272cc70b
AF
887
888 if (err)
889 return err;
890
4e3d89ba 891 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
272cc70b
AF
892 mmc->card_caps |= MMC_MODE_HS;
893
894 return 0;
895}
896
897/* frequency bases */
898/* divided by 10 to be nice to platforms without floating point */
5f837c2c 899static const int fbase[] = {
272cc70b
AF
900 10000,
901 100000,
902 1000000,
903 10000000,
904};
905
906/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
907 * to platforms without floating point.
908 */
5f837c2c 909static const int multipliers[] = {
272cc70b
AF
910 0, /* reserved */
911 10,
912 12,
913 13,
914 15,
915 20,
916 25,
917 30,
918 35,
919 40,
920 45,
921 50,
922 55,
923 60,
924 70,
925 80,
926};
927
fdbb873e 928static void mmc_set_ios(struct mmc *mmc)
272cc70b
AF
929{
930 mmc->set_ios(mmc);
931}
932
933void mmc_set_clock(struct mmc *mmc, uint clock)
934{
935 if (clock > mmc->f_max)
936 clock = mmc->f_max;
937
938 if (clock < mmc->f_min)
939 clock = mmc->f_min;
940
941 mmc->clock = clock;
942
943 mmc_set_ios(mmc);
944}
945
fdbb873e 946static void mmc_set_bus_width(struct mmc *mmc, uint width)
272cc70b
AF
947{
948 mmc->bus_width = width;
949
950 mmc_set_ios(mmc);
951}
952
fdbb873e 953static int mmc_startup(struct mmc *mmc)
272cc70b 954{
f866a46d 955 int err, i;
272cc70b 956 uint mult, freq;
639b7827 957 u64 cmult, csize, capacity;
272cc70b 958 struct mmc_cmd cmd;
8bfa195e
SG
959 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
960 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
5d4fc8d9 961 int timeout = 1000;
272cc70b 962
d52ebf10
TC
963#ifdef CONFIG_MMC_SPI_CRC_ON
964 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
965 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
966 cmd.resp_type = MMC_RSP_R1;
967 cmd.cmdarg = 1;
d52ebf10
TC
968 err = mmc_send_cmd(mmc, &cmd, NULL);
969
970 if (err)
971 return err;
972 }
973#endif
974
272cc70b 975 /* Put the Card in Identify Mode */
d52ebf10
TC
976 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
977 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
272cc70b
AF
978 cmd.resp_type = MMC_RSP_R2;
979 cmd.cmdarg = 0;
272cc70b
AF
980
981 err = mmc_send_cmd(mmc, &cmd, NULL);
982
983 if (err)
984 return err;
985
986 memcpy(mmc->cid, cmd.response, 16);
987
988 /*
989 * For MMC cards, set the Relative Address.
990 * For SD cards, get the Relatvie Address.
991 * This also puts the cards into Standby State
992 */
d52ebf10
TC
993 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
994 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
995 cmd.cmdarg = mmc->rca << 16;
996 cmd.resp_type = MMC_RSP_R6;
272cc70b 997
d52ebf10 998 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 999
d52ebf10
TC
1000 if (err)
1001 return err;
272cc70b 1002
d52ebf10
TC
1003 if (IS_SD(mmc))
1004 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1005 }
272cc70b
AF
1006
1007 /* Get the Card-Specific Data */
1008 cmd.cmdidx = MMC_CMD_SEND_CSD;
1009 cmd.resp_type = MMC_RSP_R2;
1010 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
1011
1012 err = mmc_send_cmd(mmc, &cmd, NULL);
1013
5d4fc8d9
RR
1014 /* Waiting for the ready status */
1015 mmc_send_status(mmc, timeout);
1016
272cc70b
AF
1017 if (err)
1018 return err;
1019
998be3dd
RV
1020 mmc->csd[0] = cmd.response[0];
1021 mmc->csd[1] = cmd.response[1];
1022 mmc->csd[2] = cmd.response[2];
1023 mmc->csd[3] = cmd.response[3];
272cc70b
AF
1024
1025 if (mmc->version == MMC_VERSION_UNKNOWN) {
0b453ffe 1026 int version = (cmd.response[0] >> 26) & 0xf;
272cc70b
AF
1027
1028 switch (version) {
1029 case 0:
1030 mmc->version = MMC_VERSION_1_2;
1031 break;
1032 case 1:
1033 mmc->version = MMC_VERSION_1_4;
1034 break;
1035 case 2:
1036 mmc->version = MMC_VERSION_2_2;
1037 break;
1038 case 3:
1039 mmc->version = MMC_VERSION_3;
1040 break;
1041 case 4:
1042 mmc->version = MMC_VERSION_4;
1043 break;
1044 default:
1045 mmc->version = MMC_VERSION_1_2;
1046 break;
1047 }
1048 }
1049
1050 /* divide frequency by 10, since the mults are 10x bigger */
0b453ffe
RV
1051 freq = fbase[(cmd.response[0] & 0x7)];
1052 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
272cc70b
AF
1053
1054 mmc->tran_speed = freq * mult;
1055
998be3dd 1056 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
272cc70b
AF
1057
1058 if (IS_SD(mmc))
1059 mmc->write_bl_len = mmc->read_bl_len;
1060 else
998be3dd 1061 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
272cc70b
AF
1062
1063 if (mmc->high_capacity) {
1064 csize = (mmc->csd[1] & 0x3f) << 16
1065 | (mmc->csd[2] & 0xffff0000) >> 16;
1066 cmult = 8;
1067 } else {
1068 csize = (mmc->csd[1] & 0x3ff) << 2
1069 | (mmc->csd[2] & 0xc0000000) >> 30;
1070 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1071 }
1072
f866a46d
SW
1073 mmc->capacity_user = (csize + 1) << (cmult + 2);
1074 mmc->capacity_user *= mmc->read_bl_len;
1075 mmc->capacity_boot = 0;
1076 mmc->capacity_rpmb = 0;
1077 for (i = 0; i < 4; i++)
1078 mmc->capacity_gp[i] = 0;
272cc70b 1079
8bfa195e
SG
1080 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1081 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b 1082
8bfa195e
SG
1083 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1084 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b
AF
1085
1086 /* Select the card, and put it into Transfer Mode */
d52ebf10
TC
1087 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1088 cmd.cmdidx = MMC_CMD_SELECT_CARD;
fe8f7066 1089 cmd.resp_type = MMC_RSP_R1;
d52ebf10 1090 cmd.cmdarg = mmc->rca << 16;
d52ebf10 1091 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 1092
d52ebf10
TC
1093 if (err)
1094 return err;
1095 }
272cc70b 1096
e6f99a56
LW
1097 /*
1098 * For SD, its erase group is always one sector
1099 */
1100 mmc->erase_grp_size = 1;
bc897b1d 1101 mmc->part_config = MMCPART_NOAVAILABLE;
d23e2c09
SG
1102 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1103 /* check ext_csd version and capacity */
1104 err = mmc_send_ext_csd(mmc, ext_csd);
fdbb873e 1105 if (!err && (ext_csd[EXT_CSD_REV] >= 2)) {
639b7827
YS
1106 /*
1107 * According to the JEDEC Standard, the value of
1108 * ext_csd's capacity is valid if the value is more
1109 * than 2GB
1110 */
0560db18
LW
1111 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1112 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1113 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1114 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
8bfa195e 1115 capacity *= MMC_MAX_BLOCK_LEN;
b1f1e821 1116 if ((capacity >> 20) > 2 * 1024)
f866a46d 1117 mmc->capacity_user = capacity;
d23e2c09 1118 }
bc897b1d 1119
64f4a619
JC
1120 switch (ext_csd[EXT_CSD_REV]) {
1121 case 1:
1122 mmc->version = MMC_VERSION_4_1;
1123 break;
1124 case 2:
1125 mmc->version = MMC_VERSION_4_2;
1126 break;
1127 case 3:
1128 mmc->version = MMC_VERSION_4_3;
1129 break;
1130 case 5:
1131 mmc->version = MMC_VERSION_4_41;
1132 break;
1133 case 6:
1134 mmc->version = MMC_VERSION_4_5;
1135 break;
1136 }
1137
e6f99a56
LW
1138 /*
1139 * Check whether GROUP_DEF is set, if yes, read out
1140 * group size from ext_csd directly, or calculate
1141 * the group size from the csd value.
1142 */
8bfa195e 1143 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF]) {
0560db18 1144 mmc->erase_grp_size =
8bfa195e
SG
1145 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] *
1146 MMC_MAX_BLOCK_LEN * 1024;
1147 } else {
e6f99a56
LW
1148 int erase_gsz, erase_gmul;
1149 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1150 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1151 mmc->erase_grp_size = (erase_gsz + 1)
1152 * (erase_gmul + 1);
1153 }
1154
bc897b1d 1155 /* store the partition info of emmc */
8948ea83
SW
1156 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1157 ext_csd[EXT_CSD_BOOT_MULT])
0560db18 1158 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
f866a46d
SW
1159
1160 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1161
1162 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1163
1164 for (i = 0; i < 4; i++) {
1165 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1166 mmc->capacity_gp[i] = (ext_csd[idx + 2] << 16) +
1167 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1168 mmc->capacity_gp[i] *=
1169 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1170 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1171 }
d23e2c09
SG
1172 }
1173
f866a46d
SW
1174 err = mmc_set_capacity(mmc, mmc->part_num);
1175 if (err)
1176 return err;
1177
272cc70b
AF
1178 if (IS_SD(mmc))
1179 err = sd_change_freq(mmc);
1180 else
1181 err = mmc_change_freq(mmc);
1182
1183 if (err)
1184 return err;
1185
1186 /* Restrict card's capabilities by what the host can do */
1187 mmc->card_caps &= mmc->host_caps;
1188
1189 if (IS_SD(mmc)) {
1190 if (mmc->card_caps & MMC_MODE_4BIT) {
1191 cmd.cmdidx = MMC_CMD_APP_CMD;
1192 cmd.resp_type = MMC_RSP_R1;
1193 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
1194
1195 err = mmc_send_cmd(mmc, &cmd, NULL);
1196 if (err)
1197 return err;
1198
1199 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1200 cmd.resp_type = MMC_RSP_R1;
1201 cmd.cmdarg = 2;
272cc70b
AF
1202 err = mmc_send_cmd(mmc, &cmd, NULL);
1203 if (err)
1204 return err;
1205
1206 mmc_set_bus_width(mmc, 4);
1207 }
1208
1209 if (mmc->card_caps & MMC_MODE_HS)
ad5fd922 1210 mmc->tran_speed = 50000000;
272cc70b 1211 else
ad5fd922 1212 mmc->tran_speed = 25000000;
272cc70b 1213 } else {
7798f6db
AF
1214 int idx;
1215
1216 /* An array of possible bus widths in order of preference */
1217 static unsigned ext_csd_bits[] = {
1218 EXT_CSD_BUS_WIDTH_8,
1219 EXT_CSD_BUS_WIDTH_4,
1220 EXT_CSD_BUS_WIDTH_1,
1221 };
1222
1223 /* An array to map CSD bus widths to host cap bits */
1224 static unsigned ext_to_hostcaps[] = {
1225 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1226 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1227 };
1228
1229 /* An array to map chosen bus width to an integer */
1230 static unsigned widths[] = {
1231 8, 4, 1,
1232 };
1233
1234 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1235 unsigned int extw = ext_csd_bits[idx];
1236
1237 /*
1238 * Check to make sure the controller supports
1239 * this bus width, if it's more than 1
1240 */
1241 if (extw != EXT_CSD_BUS_WIDTH_1 &&
1242 !(mmc->host_caps & ext_to_hostcaps[extw]))
1243 continue;
1244
272cc70b 1245 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
7798f6db 1246 EXT_CSD_BUS_WIDTH, extw);
272cc70b
AF
1247
1248 if (err)
4137894e 1249 continue;
272cc70b 1250
7798f6db 1251 mmc_set_bus_width(mmc, widths[idx]);
4137894e
LW
1252
1253 err = mmc_send_ext_csd(mmc, test_csd);
1254 if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \
1255 == test_csd[EXT_CSD_PARTITIONING_SUPPORT]
1256 && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \
1257 == test_csd[EXT_CSD_ERASE_GROUP_DEF] \
1258 && ext_csd[EXT_CSD_REV] \
1259 == test_csd[EXT_CSD_REV]
1260 && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \
1261 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1262 && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \
1263 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) {
1264
7798f6db 1265 mmc->card_caps |= ext_to_hostcaps[extw];
4137894e
LW
1266 break;
1267 }
272cc70b
AF
1268 }
1269
1270 if (mmc->card_caps & MMC_MODE_HS) {
1271 if (mmc->card_caps & MMC_MODE_HS_52MHz)
ad5fd922 1272 mmc->tran_speed = 52000000;
272cc70b 1273 else
ad5fd922
JC
1274 mmc->tran_speed = 26000000;
1275 }
272cc70b
AF
1276 }
1277
ad5fd922
JC
1278 mmc_set_clock(mmc, mmc->tran_speed);
1279
272cc70b
AF
1280 /* fill in device description */
1281 mmc->block_dev.lun = 0;
1282 mmc->block_dev.type = 0;
1283 mmc->block_dev.blksz = mmc->read_bl_len;
0472fbfd 1284 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
9b1f942c 1285 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
babce5f6
TH
1286 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1287 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1288 (mmc->cid[3] >> 16) & 0xffff);
1289 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1290 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1291 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1292 (mmc->cid[2] >> 24) & 0xff);
1293 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1294 (mmc->cid[2] >> 16) & 0xf);
122efd43 1295#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
272cc70b 1296 init_part(&mmc->block_dev);
122efd43 1297#endif
272cc70b
AF
1298
1299 return 0;
1300}
1301
fdbb873e 1302static int mmc_send_if_cond(struct mmc *mmc)
272cc70b
AF
1303{
1304 struct mmc_cmd cmd;
1305 int err;
1306
1307 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1308 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1309 cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa;
1310 cmd.resp_type = MMC_RSP_R7;
272cc70b
AF
1311
1312 err = mmc_send_cmd(mmc, &cmd, NULL);
1313
1314 if (err)
1315 return err;
1316
998be3dd 1317 if ((cmd.response[0] & 0xff) != 0xaa)
272cc70b
AF
1318 return UNUSABLE_ERR;
1319 else
1320 mmc->version = SD_VERSION_2;
1321
1322 return 0;
1323}
1324
1325int mmc_register(struct mmc *mmc)
1326{
1327 /* Setup the universal parts of the block interface just once */
1328 mmc->block_dev.if_type = IF_TYPE_MMC;
1329 mmc->block_dev.dev = cur_dev_num++;
1330 mmc->block_dev.removable = 1;
1331 mmc->block_dev.block_read = mmc_bread;
1332 mmc->block_dev.block_write = mmc_bwrite;
e6f99a56 1333 mmc->block_dev.block_erase = mmc_berase;
8feafcc4
JR
1334 if (!mmc->b_max)
1335 mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
272cc70b
AF
1336
1337 INIT_LIST_HEAD (&mmc->link);
1338
1339 list_add_tail (&mmc->link, &mmc_devices);
1340
1341 return 0;
1342}
1343
df3fc526 1344#ifdef CONFIG_PARTITIONS
272cc70b
AF
1345block_dev_desc_t *mmc_get_dev(int dev)
1346{
1347 struct mmc *mmc = find_mmc_device(dev);
6bb4b4bc 1348 if (!mmc || mmc_init(mmc))
40242bc3 1349 return NULL;
272cc70b 1350
40242bc3 1351 return &mmc->block_dev;
272cc70b 1352}
df3fc526 1353#endif
272cc70b 1354
e9550449 1355int mmc_start_init(struct mmc *mmc)
272cc70b 1356{
afd5932b 1357 int err;
272cc70b 1358
48972d90
TR
1359 if (mmc_getcd(mmc) == 0) {
1360 mmc->has_init = 0;
1361 printf("MMC: no card present\n");
1362 return NO_CARD_ERR;
1363 }
1364
bc897b1d
LW
1365 if (mmc->has_init)
1366 return 0;
1367
272cc70b
AF
1368 err = mmc->init(mmc);
1369
1370 if (err)
1371 return err;
1372
b86b85e2
IY
1373 mmc_set_bus_width(mmc, 1);
1374 mmc_set_clock(mmc, 1);
1375
272cc70b
AF
1376 /* Reset the Card */
1377 err = mmc_go_idle(mmc);
1378
1379 if (err)
1380 return err;
1381
bc897b1d
LW
1382 /* The internal partition reset to user partition(0) at every CMD0*/
1383 mmc->part_num = 0;
1384
272cc70b 1385 /* Test for SD version 2 */
afd5932b 1386 err = mmc_send_if_cond(mmc);
272cc70b 1387
272cc70b
AF
1388 /* Now try to get the SD card's operating condition */
1389 err = sd_send_op_cond(mmc);
1390
1391 /* If the command timed out, we check for an MMC card */
1392 if (err == TIMEOUT) {
1393 err = mmc_send_op_cond(mmc);
1394
e9550449 1395 if (err && err != IN_PROGRESS) {
272cc70b
AF
1396 printf("Card did not respond to voltage select!\n");
1397 return UNUSABLE_ERR;
1398 }
1399 }
1400
e9550449
CLC
1401 if (err == IN_PROGRESS)
1402 mmc->init_in_progress = 1;
1403
1404 return err;
1405}
1406
1407static int mmc_complete_init(struct mmc *mmc)
1408{
1409 int err = 0;
1410
1411 if (mmc->op_cond_pending)
1412 err = mmc_complete_op_cond(mmc);
1413
1414 if (!err)
1415 err = mmc_startup(mmc);
bc897b1d
LW
1416 if (err)
1417 mmc->has_init = 0;
1418 else
1419 mmc->has_init = 1;
e9550449
CLC
1420 mmc->init_in_progress = 0;
1421 return err;
1422}
1423
1424int mmc_init(struct mmc *mmc)
1425{
1426 int err = IN_PROGRESS;
1427 unsigned start = get_timer(0);
1428
1429 if (mmc->has_init)
1430 return 0;
1431 if (!mmc->init_in_progress)
1432 err = mmc_start_init(mmc);
1433
1434 if (!err || err == IN_PROGRESS)
1435 err = mmc_complete_init(mmc);
1436 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
bc897b1d 1437 return err;
272cc70b
AF
1438}
1439
1440/*
1441 * CPU and board-specific MMC initializations. Aliased function
1442 * signals caller to move on
1443 */
1444static int __def_mmc_init(bd_t *bis)
1445{
1446 return -1;
1447}
1448
f9a109b3
PT
1449int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
1450int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
272cc70b
AF
1451
1452void print_mmc_devices(char separator)
1453{
1454 struct mmc *m;
1455 struct list_head *entry;
1456
1457 list_for_each(entry, &mmc_devices) {
1458 m = list_entry(entry, struct mmc, link);
1459
1460 printf("%s: %d", m->name, m->block_dev.dev);
1461
1462 if (entry->next != &mmc_devices)
1463 printf("%c ", separator);
1464 }
1465
1466 printf("\n");
1467}
1468
ea6ebe21
LW
1469int get_mmc_num(void)
1470{
1471 return cur_dev_num;
1472}
1473
e9550449
CLC
1474void mmc_set_preinit(struct mmc *mmc, int preinit)
1475{
1476 mmc->preinit = preinit;
1477}
1478
1479static void do_preinit(void)
1480{
1481 struct mmc *m;
1482 struct list_head *entry;
1483
1484 list_for_each(entry, &mmc_devices) {
1485 m = list_entry(entry, struct mmc, link);
1486
1487 if (m->preinit)
1488 mmc_start_init(m);
1489 }
1490}
1491
1492
272cc70b
AF
1493int mmc_initialize(bd_t *bis)
1494{
1495 INIT_LIST_HEAD (&mmc_devices);
1496 cur_dev_num = 0;
1497
1498 if (board_mmc_init(bis) < 0)
1499 cpu_mmc_init(bis);
1500
1501 print_mmc_devices(',');
1502
e9550449 1503 do_preinit();
272cc70b
AF
1504 return 0;
1505}
3690d6d6
A
1506
1507#ifdef CONFIG_SUPPORT_EMMC_BOOT
1508/*
1509 * This function changes the size of boot partition and the size of rpmb
1510 * partition present on EMMC devices.
1511 *
1512 * Input Parameters:
1513 * struct *mmc: pointer for the mmc device strcuture
1514 * bootsize: size of boot partition
1515 * rpmbsize: size of rpmb partition
1516 *
1517 * Returns 0 on success.
1518 */
1519
1520int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1521 unsigned long rpmbsize)
1522{
1523 int err;
1524 struct mmc_cmd cmd;
1525
1526 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1527 cmd.cmdidx = MMC_CMD_RES_MAN;
1528 cmd.resp_type = MMC_RSP_R1b;
1529 cmd.cmdarg = MMC_CMD62_ARG1;
1530
1531 err = mmc_send_cmd(mmc, &cmd, NULL);
1532 if (err) {
1533 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1534 return err;
1535 }
1536
1537 /* Boot partition changing mode */
1538 cmd.cmdidx = MMC_CMD_RES_MAN;
1539 cmd.resp_type = MMC_RSP_R1b;
1540 cmd.cmdarg = MMC_CMD62_ARG2;
1541
1542 err = mmc_send_cmd(mmc, &cmd, NULL);
1543 if (err) {
1544 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1545 return err;
1546 }
1547 /* boot partition size is multiple of 128KB */
1548 bootsize = (bootsize * 1024) / 128;
1549
1550 /* Arg: boot partition size */
1551 cmd.cmdidx = MMC_CMD_RES_MAN;
1552 cmd.resp_type = MMC_RSP_R1b;
1553 cmd.cmdarg = bootsize;
1554
1555 err = mmc_send_cmd(mmc, &cmd, NULL);
1556 if (err) {
1557 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1558 return err;
1559 }
1560 /* RPMB partition size is multiple of 128KB */
1561 rpmbsize = (rpmbsize * 1024) / 128;
1562 /* Arg: RPMB partition size */
1563 cmd.cmdidx = MMC_CMD_RES_MAN;
1564 cmd.resp_type = MMC_RSP_R1b;
1565 cmd.cmdarg = rpmbsize;
1566
1567 err = mmc_send_cmd(mmc, &cmd, NULL);
1568 if (err) {
1569 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1570 return err;
1571 }
1572 return 0;
1573}
1574
1575/*
1576 * This function shall form and send the commands to open / close the
1577 * boot partition specified by user.
1578 *
1579 * Input Parameters:
1580 * ack: 0x0 - No boot acknowledge sent (default)
1581 * 0x1 - Boot acknowledge sent during boot operation
1582 * part_num: User selects boot data that will be sent to master
1583 * 0x0 - Device not boot enabled (default)
1584 * 0x1 - Boot partition 1 enabled for boot
1585 * 0x2 - Boot partition 2 enabled for boot
1586 * access: User selects partitions to access
1587 * 0x0 : No access to boot partition (default)
1588 * 0x1 : R/W boot partition 1
1589 * 0x2 : R/W boot partition 2
1590 * 0x3 : R/W Replay Protected Memory Block (RPMB)
1591 *
1592 * Returns 0 on success.
1593 */
1594int mmc_boot_part_access(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1595{
1596 int err;
1597 struct mmc_cmd cmd;
1598
1599 /* Boot ack enable, boot partition enable , boot partition access */
1600 cmd.cmdidx = MMC_CMD_SWITCH;
1601 cmd.resp_type = MMC_RSP_R1b;
1602
1603 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
1604 (EXT_CSD_PART_CONF << 16) |
1605 ((EXT_CSD_BOOT_ACK(ack) |
1606 EXT_CSD_BOOT_PART_NUM(part_num) |
1607 EXT_CSD_PARTITION_ACCESS(access)) << 8);
1608
1609 err = mmc_send_cmd(mmc, &cmd, NULL);
1610 if (err) {
1611 if (access) {
1612 debug("mmc boot partition#%d open fail:Error1 = %d\n",
1613 part_num, err);
1614 } else {
1615 debug("mmc boot partition#%d close fail:Error = %d\n",
1616 part_num, err);
1617 }
1618 return err;
1619 }
1620
1621 if (access) {
1622 /* 4bit transfer mode at booting time. */
1623 cmd.cmdidx = MMC_CMD_SWITCH;
1624 cmd.resp_type = MMC_RSP_R1b;
1625
1626 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
1627 (EXT_CSD_BOOT_BUS_WIDTH << 16) |
1628 ((1 << 0) << 8);
1629
1630 err = mmc_send_cmd(mmc, &cmd, NULL);
1631 if (err) {
1632 debug("mmc boot partition#%d open fail:Error2 = %d\n",
1633 part_num, err);
1634 return err;
1635 }
1636 }
1637 return 0;
1638}
1639#endif