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1d9654dc MY |
1 | /* |
2 | * Copyright (C) 2017 Socionext Inc. | |
3 | * Author: Masahiro Yamada <yamada.masahiro@socionext.com> | |
4 | * | |
5 | * SPDX-License-Identifier: GPL-2.0+ | |
6 | */ | |
7 | ||
a89b9bc0 | 8 | #include <clk.h> |
1d9654dc MY |
9 | #include <dm.h> |
10 | #include <linux/io.h> | |
11 | #include <linux/ioport.h> | |
681ed4d0 | 12 | #include <linux/printk.h> |
1d9654dc MY |
13 | |
14 | #include "denali.h" | |
15 | ||
6c71b6f4 MY |
16 | struct denali_dt_data { |
17 | unsigned int revision; | |
18 | unsigned int caps; | |
350d052d | 19 | const struct nand_ecc_caps *ecc_caps; |
6c71b6f4 MY |
20 | }; |
21 | ||
350d052d MY |
22 | NAND_ECC_CAPS_SINGLE(denali_socfpga_ecc_caps, denali_calc_ecc_bytes, |
23 | 512, 8, 15); | |
6c71b6f4 MY |
24 | static const struct denali_dt_data denali_socfpga_data = { |
25 | .caps = DENALI_CAP_HW_ECC_FIXUP, | |
350d052d | 26 | .ecc_caps = &denali_socfpga_ecc_caps, |
6c71b6f4 MY |
27 | }; |
28 | ||
350d052d MY |
29 | NAND_ECC_CAPS_SINGLE(denali_uniphier_v5a_ecc_caps, denali_calc_ecc_bytes, |
30 | 1024, 8, 16, 24); | |
6c71b6f4 MY |
31 | static const struct denali_dt_data denali_uniphier_v5a_data = { |
32 | .caps = DENALI_CAP_HW_ECC_FIXUP | | |
33 | DENALI_CAP_DMA_64BIT, | |
350d052d | 34 | .ecc_caps = &denali_uniphier_v5a_ecc_caps, |
6c71b6f4 MY |
35 | }; |
36 | ||
350d052d MY |
37 | NAND_ECC_CAPS_SINGLE(denali_uniphier_v5b_ecc_caps, denali_calc_ecc_bytes, |
38 | 1024, 8, 16); | |
6c71b6f4 MY |
39 | static const struct denali_dt_data denali_uniphier_v5b_data = { |
40 | .revision = 0x0501, | |
41 | .caps = DENALI_CAP_HW_ECC_FIXUP | | |
42 | DENALI_CAP_DMA_64BIT, | |
350d052d | 43 | .ecc_caps = &denali_uniphier_v5b_ecc_caps, |
6c71b6f4 MY |
44 | }; |
45 | ||
1d9654dc MY |
46 | static const struct udevice_id denali_nand_dt_ids[] = { |
47 | { | |
48 | .compatible = "altr,socfpga-denali-nand", | |
6c71b6f4 | 49 | .data = (unsigned long)&denali_socfpga_data, |
1d9654dc MY |
50 | }, |
51 | { | |
52 | .compatible = "socionext,uniphier-denali-nand-v5a", | |
6c71b6f4 | 53 | .data = (unsigned long)&denali_uniphier_v5a_data, |
1d9654dc MY |
54 | }, |
55 | { | |
56 | .compatible = "socionext,uniphier-denali-nand-v5b", | |
6c71b6f4 | 57 | .data = (unsigned long)&denali_uniphier_v5b_data, |
1d9654dc MY |
58 | }, |
59 | { /* sentinel */ } | |
60 | }; | |
61 | ||
62 | static int denali_dt_probe(struct udevice *dev) | |
63 | { | |
64 | struct denali_nand_info *denali = dev_get_priv(dev); | |
6c71b6f4 | 65 | const struct denali_dt_data *data; |
a89b9bc0 | 66 | struct clk clk; |
1d9654dc MY |
67 | struct resource res; |
68 | int ret; | |
69 | ||
6c71b6f4 MY |
70 | data = (void *)dev_get_driver_data(dev); |
71 | if (data) { | |
72 | denali->revision = data->revision; | |
73 | denali->caps = data->caps; | |
350d052d | 74 | denali->ecc_caps = data->ecc_caps; |
6c71b6f4 MY |
75 | } |
76 | ||
350d052d MY |
77 | denali->dev = dev; |
78 | ||
1d9654dc MY |
79 | ret = dev_read_resource_byname(dev, "denali_reg", &res); |
80 | if (ret) | |
81 | return ret; | |
82 | ||
350d052d | 83 | denali->reg = devm_ioremap(dev, res.start, resource_size(&res)); |
1d9654dc MY |
84 | |
85 | ret = dev_read_resource_byname(dev, "nand_data", &res); | |
86 | if (ret) | |
87 | return ret; | |
88 | ||
350d052d | 89 | denali->host = devm_ioremap(dev, res.start, resource_size(&res)); |
1d9654dc | 90 | |
a89b9bc0 MY |
91 | ret = clk_get_by_index(dev, 0, &clk); |
92 | if (ret) | |
93 | return ret; | |
94 | ||
95 | ret = clk_enable(&clk); | |
96 | if (ret) | |
97 | return ret; | |
98 | ||
99 | denali->clk_x_rate = clk_get_rate(&clk); | |
100 | ||
1d9654dc MY |
101 | return denali_init(denali); |
102 | } | |
103 | ||
104 | U_BOOT_DRIVER(denali_nand_dt) = { | |
105 | .name = "denali-nand-dt", | |
106 | .id = UCLASS_MISC, | |
107 | .of_match = denali_nand_dt_ids, | |
108 | .probe = denali_dt_probe, | |
109 | .priv_auto_alloc_size = sizeof(struct denali_nand_info), | |
110 | }; | |
111 | ||
112 | void board_nand_init(void) | |
113 | { | |
114 | struct udevice *dev; | |
115 | int ret; | |
116 | ||
117 | ret = uclass_get_device_by_driver(UCLASS_MISC, | |
118 | DM_GET_DRIVER(denali_nand_dt), | |
119 | &dev); | |
120 | if (ret && ret != -ENODEV) | |
681ed4d0 | 121 | pr_err("Failed to initialize Denali NAND controller. (error %d)\n", |
1d9654dc MY |
122 | ret); |
123 | } |