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[people/ms/u-boot.git] / drivers / mtd / nand / mpc5121_nfc.c
CommitLineData
35f2edbb
SR		 1/*
2 * Copyright 2004-2008 Freescale Semiconductor, Inc.
3 * Copyright 2009 Semihalf.
4 * (C) Copyright 2009 Stefan Roese <sr@denx.de>
5 *
6 * Based on original driver from Freescale Semiconductor
7 * written by John Rigby <jrigby@freescale.com> on basis
8 * of drivers/mtd/nand/mxc_nand.c. Reworked and extended
9 * Piotr Ziecik <kosmo@semihalf.com>.
10 *
1a459660 11 * SPDX-License-Identifier: GPL-2.0+
35f2edbb
SR		 12 */
13
14#include <common.h>
15#include <malloc.h>
16
17#include <linux/mtd/mtd.h>
18#include <linux/mtd/nand.h>
19#include <linux/mtd/nand_ecc.h>
7b15e2bb 20#include <linux/compat.h>
35f2edbb
SR		 21
22#include <asm/errno.h>
23#include <asm/io.h>
24#include <asm/processor.h>
25#include <nand.h>
26
27#define DRV_NAME "mpc5121_nfc"
28
29/* Timeouts */
30#define NFC_RESET_TIMEOUT 1000 /* 1 ms */
31#define NFC_TIMEOUT 2000 /* 2000 us */
32
33/* Addresses for NFC MAIN RAM BUFFER areas */
34#define NFC_MAIN_AREA(n) ((n) * 0x200)
35
36/* Addresses for NFC SPARE BUFFER areas */
37#define NFC_SPARE_BUFFERS 8
38#define NFC_SPARE_LEN 0x40
39#define NFC_SPARE_AREA(n) (0x1000 + ((n) * NFC_SPARE_LEN))
40
41/* MPC5121 NFC registers */
42#define NFC_BUF_ADDR 0x1E04
43#define NFC_FLASH_ADDR 0x1E06
44#define NFC_FLASH_CMD 0x1E08
45#define NFC_CONFIG 0x1E0A
46#define NFC_ECC_STATUS1 0x1E0C
47#define NFC_ECC_STATUS2 0x1E0E
48#define NFC_SPAS 0x1E10
49#define NFC_WRPROT 0x1E12
50#define NFC_NF_WRPRST 0x1E18
51#define NFC_CONFIG1 0x1E1A
52#define NFC_CONFIG2 0x1E1C
53#define NFC_UNLOCKSTART_BLK0 0x1E20
54#define NFC_UNLOCKEND_BLK0 0x1E22
55#define NFC_UNLOCKSTART_BLK1 0x1E24
56#define NFC_UNLOCKEND_BLK1 0x1E26
57#define NFC_UNLOCKSTART_BLK2 0x1E28
58#define NFC_UNLOCKEND_BLK2 0x1E2A
59#define NFC_UNLOCKSTART_BLK3 0x1E2C
60#define NFC_UNLOCKEND_BLK3 0x1E2E
61
62/* Bit Definitions: NFC_BUF_ADDR */
63#define NFC_RBA_MASK (7 << 0)
64#define NFC_ACTIVE_CS_SHIFT 5
65#define NFC_ACTIVE_CS_MASK (3 << NFC_ACTIVE_CS_SHIFT)
66
67/* Bit Definitions: NFC_CONFIG */
68#define NFC_BLS_UNLOCKED (1 << 1)
69
70/* Bit Definitions: NFC_CONFIG1 */
71#define NFC_ECC_4BIT (1 << 0)
72#define NFC_FULL_PAGE_DMA (1 << 1)
73#define NFC_SPARE_ONLY (1 << 2)
74#define NFC_ECC_ENABLE (1 << 3)
75#define NFC_INT_MASK (1 << 4)
76#define NFC_BIG_ENDIAN (1 << 5)
77#define NFC_RESET (1 << 6)
78#define NFC_CE (1 << 7)
79#define NFC_ONE_CYCLE (1 << 8)
80#define NFC_PPB_32 (0 << 9)
81#define NFC_PPB_64 (1 << 9)
82#define NFC_PPB_128 (2 << 9)
83#define NFC_PPB_256 (3 << 9)
84#define NFC_PPB_MASK (3 << 9)
85#define NFC_FULL_PAGE_INT (1 << 11)
86
87/* Bit Definitions: NFC_CONFIG2 */
88#define NFC_COMMAND (1 << 0)
89#define NFC_ADDRESS (1 << 1)
90#define NFC_INPUT (1 << 2)
91#define NFC_OUTPUT (1 << 3)
92#define NFC_ID (1 << 4)
93#define NFC_STATUS (1 << 5)
94#define NFC_CMD_FAIL (1 << 15)
95#define NFC_INT (1 << 15)
96
97/* Bit Definitions: NFC_WRPROT */
98#define NFC_WPC_LOCK_TIGHT (1 << 0)
99#define NFC_WPC_LOCK (1 << 1)
100#define NFC_WPC_UNLOCK (1 << 2)
101
102struct mpc5121_nfc_prv {
103 struct mtd_info mtd;
104 struct nand_chip chip;
105 int irq;
106 void __iomem *regs;
107 struct clk *clk;
108 uint column;
109 int spareonly;
110 int chipsel;
111};
112
113int mpc5121_nfc_chip = 0;
114
115static void mpc5121_nfc_done(struct mtd_info *mtd);
116
117/* Read NFC register */
118static inline u16 nfc_read(struct mtd_info *mtd, uint reg)
119{
120 struct nand_chip *chip = mtd->priv;
121 struct mpc5121_nfc_prv *prv = chip->priv;
122
123 return in_be16(prv->regs + reg);
124}
125
126/* Write NFC register */
127static inline void nfc_write(struct mtd_info *mtd, uint reg, u16 val)
128{
129 struct nand_chip *chip = mtd->priv;
130 struct mpc5121_nfc_prv *prv = chip->priv;
131
132 out_be16(prv->regs + reg, val);
133}
134
135/* Set bits in NFC register */
136static inline void nfc_set(struct mtd_info *mtd, uint reg, u16 bits)
137{
138 nfc_write(mtd, reg, nfc_read(mtd, reg) | bits);
139}
140
141/* Clear bits in NFC register */
142static inline void nfc_clear(struct mtd_info *mtd, uint reg, u16 bits)
143{
144 nfc_write(mtd, reg, nfc_read(mtd, reg) & ~bits);
145}
146
147/* Invoke address cycle */
148static inline void mpc5121_nfc_send_addr(struct mtd_info *mtd, u16 addr)
149{
150 nfc_write(mtd, NFC_FLASH_ADDR, addr);
151 nfc_write(mtd, NFC_CONFIG2, NFC_ADDRESS);
152 mpc5121_nfc_done(mtd);
153}
154
155/* Invoke command cycle */
156static inline void mpc5121_nfc_send_cmd(struct mtd_info *mtd, u16 cmd)
157{
158 nfc_write(mtd, NFC_FLASH_CMD, cmd);
159 nfc_write(mtd, NFC_CONFIG2, NFC_COMMAND);
160 mpc5121_nfc_done(mtd);
161}
162
163/* Send data from NFC buffers to NAND flash */
164static inline void mpc5121_nfc_send_prog_page(struct mtd_info *mtd)
165{
166 nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
167 nfc_write(mtd, NFC_CONFIG2, NFC_INPUT);
168 mpc5121_nfc_done(mtd);
169}
170
171/* Receive data from NAND flash */
172static inline void mpc5121_nfc_send_read_page(struct mtd_info *mtd)
173{
174 nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
175 nfc_write(mtd, NFC_CONFIG2, NFC_OUTPUT);
176 mpc5121_nfc_done(mtd);
177}
178
179/* Receive ID from NAND flash */
180static inline void mpc5121_nfc_send_read_id(struct mtd_info *mtd)
181{
182 nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
183 nfc_write(mtd, NFC_CONFIG2, NFC_ID);
184 mpc5121_nfc_done(mtd);
185}
186
187/* Receive status from NAND flash */
188static inline void mpc5121_nfc_send_read_status(struct mtd_info *mtd)
189{
190 nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
191 nfc_write(mtd, NFC_CONFIG2, NFC_STATUS);
192 mpc5121_nfc_done(mtd);
193}
194
195static void mpc5121_nfc_done(struct mtd_info *mtd)
196{
197 int max_retries = NFC_TIMEOUT;
198
199 while (1) {
200 max_retries--;
201 if (nfc_read(mtd, NFC_CONFIG2) & NFC_INT)
202 break;
203 udelay(1);
204 }
205
206 if (max_retries <= 0)
207 printk(KERN_WARNING DRV_NAME
208 ": Timeout while waiting for completion.\n");
209}
210
211/* Do address cycle(s) */
212static void mpc5121_nfc_addr_cycle(struct mtd_info *mtd, int column, int page)
213{
214 struct nand_chip *chip = mtd->priv;
215 u32 pagemask = chip->pagemask;
216
217 if (column != -1) {
218 mpc5121_nfc_send_addr(mtd, column);
219 if (mtd->writesize > 512)
220 mpc5121_nfc_send_addr(mtd, column >> 8);
221 }
222
223 if (page != -1) {
224 do {
225 mpc5121_nfc_send_addr(mtd, page & 0xFF);
226 page >>= 8;
227 pagemask >>= 8;
228 } while (pagemask);
229 }
230}
231
232/* Control chip select signals */
233
234/*
235 * Selecting the active device:
236 *
237 * This is different than the linux version. Switching between chips
238 * is done via board_nand_select_device(). The Linux select_chip
239 * function used here in U-Boot has only 2 valid chip numbers:
240 * 0 select
241 * -1 deselect
242 */
243
244/*
245 * Implement it as a weak default, so that boards with a specific
246 * chip-select routine can use their own function.
247 */
248void __mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)
249{
250 if (chip < 0) {
251 nfc_clear(mtd, NFC_CONFIG1, NFC_CE);
252 return;
253 }
254
255 nfc_clear(mtd, NFC_BUF_ADDR, NFC_ACTIVE_CS_MASK);
256 nfc_set(mtd, NFC_BUF_ADDR, (chip << NFC_ACTIVE_CS_SHIFT) &
257 NFC_ACTIVE_CS_MASK);
258 nfc_set(mtd, NFC_CONFIG1, NFC_CE);
259}
260void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)
261 __attribute__((weak, alias("__mpc5121_nfc_select_chip")));
262
263void board_nand_select_device(struct nand_chip *nand, int chip)
264{
265 /*
266 * Only save this chip number in global variable here. This
267 * will be used later in mpc5121_nfc_select_chip().
268 */
269 mpc5121_nfc_chip = chip;
270}
271
272/* Read NAND Ready/Busy signal */
273static int mpc5121_nfc_dev_ready(struct mtd_info *mtd)
274{
275 /*
276 * NFC handles ready/busy signal internally. Therefore, this function
277 * always returns status as ready.
278 */
279 return 1;
280}
281
282/* Write command to NAND flash */
283static void mpc5121_nfc_command(struct mtd_info *mtd, unsigned command,
284 int column, int page)
285{
286 struct nand_chip *chip = mtd->priv;
287 struct mpc5121_nfc_prv *prv = chip->priv;
288
289 prv->column = (column >= 0) ? column : 0;
290 prv->spareonly = 0;
291
292 switch (command) {
293 case NAND_CMD_PAGEPROG:
294 mpc5121_nfc_send_prog_page(mtd);
295 break;
296 /*
297 * NFC does not support sub-page reads and writes,
298 * so emulate them using full page transfers.
299 */
300 case NAND_CMD_READ0:
301 column = 0;
302 break;
303
304 case NAND_CMD_READ1:
305 prv->column += 256;
306 command = NAND_CMD_READ0;
307 column = 0;
308 break;
309
310 case NAND_CMD_READOOB:
311 prv->spareonly = 1;
312 command = NAND_CMD_READ0;
313 column = 0;
314 break;
315
316 case NAND_CMD_SEQIN:
317 mpc5121_nfc_command(mtd, NAND_CMD_READ0, column, page);
318 column = 0;
319 break;
320
321 case NAND_CMD_ERASE1:
322 case NAND_CMD_ERASE2:
323 case NAND_CMD_READID:
324 case NAND_CMD_STATUS:
d3f49418 325 case NAND_CMD_RESET:
35f2edbb
SR		 326 break;
327
328 default:
329 return;
330 }
331
332 mpc5121_nfc_send_cmd(mtd, command);
333 mpc5121_nfc_addr_cycle(mtd, column, page);
334
335 switch (command) {
336 case NAND_CMD_READ0:
337 if (mtd->writesize > 512)
338 mpc5121_nfc_send_cmd(mtd, NAND_CMD_READSTART);
339 mpc5121_nfc_send_read_page(mtd);
340 break;
341
342 case NAND_CMD_READID:
343 mpc5121_nfc_send_read_id(mtd);
344 break;
345
346 case NAND_CMD_STATUS:
347 mpc5121_nfc_send_read_status(mtd);
348 if (chip->options & NAND_BUSWIDTH_16)
349 prv->column = 1;
350 else
351 prv->column = 0;
352 break;
353 }
354}
355
356/* Copy data from/to NFC spare buffers. */
357static void mpc5121_nfc_copy_spare(struct mtd_info *mtd, uint offset,
358 u8 * buffer, uint size, int wr)
359{
360 struct nand_chip *nand = mtd->priv;
361 struct mpc5121_nfc_prv *prv = nand->priv;
362 uint o, s, sbsize, blksize;
363
364 /*
365 * NAND spare area is available through NFC spare buffers.
366 * The NFC divides spare area into (page_size / 512) chunks.
367 * Each chunk is placed into separate spare memory area, using
368 * first (spare_size / num_of_chunks) bytes of the buffer.
369 *
370 * For NAND device in which the spare area is not divided fully
371 * by the number of chunks, number of used bytes in each spare
372 * buffer is rounded down to the nearest even number of bytes,
373 * and all remaining bytes are added to the last used spare area.
374 *
375 * For more information read section 26.6.10 of MPC5121e
376 * Microcontroller Reference Manual, Rev. 3.
377 */
378
379 /* Calculate number of valid bytes in each spare buffer */
380 sbsize = (mtd->oobsize / (mtd->writesize / 512)) & ~1;
381
382 while (size) {
383 /* Calculate spare buffer number */
384 s = offset / sbsize;
385 if (s > NFC_SPARE_BUFFERS - 1)
386 s = NFC_SPARE_BUFFERS - 1;
387
388 /*
389 * Calculate offset to requested data block in selected spare
390 * buffer and its size.
391 */
392 o = offset - (s * sbsize);
393 blksize = min(sbsize - o, size);
394
395 if (wr)
396 memcpy_toio(prv->regs + NFC_SPARE_AREA(s) + o,
397 buffer, blksize);
398 else
399 memcpy_fromio(buffer,
400 prv->regs + NFC_SPARE_AREA(s) + o,
401 blksize);
402
403 buffer += blksize;
404 offset += blksize;
405 size -= blksize;
406 };
407}
408
409/* Copy data from/to NFC main and spare buffers */
410static void mpc5121_nfc_buf_copy(struct mtd_info *mtd, u_char * buf, int len,
411 int wr)
412{
413 struct nand_chip *chip = mtd->priv;
414 struct mpc5121_nfc_prv *prv = chip->priv;
415 uint c = prv->column;
416 uint l;
417
418 /* Handle spare area access */
419 if (prv->spareonly || c >= mtd->writesize) {
420 /* Calculate offset from beginning of spare area */
421 if (c >= mtd->writesize)
422 c -= mtd->writesize;
423
424 prv->column += len;
425 mpc5121_nfc_copy_spare(mtd, c, buf, len, wr);
426 return;
427 }
428
429 /*
430 * Handle main area access - limit copy length to prevent
431 * crossing main/spare boundary.
432 */
433 l = min((uint) len, mtd->writesize - c);
434 prv->column += l;
435
436 if (wr)
437 memcpy_toio(prv->regs + NFC_MAIN_AREA(0) + c, buf, l);
438 else
439 memcpy_fromio(buf, prv->regs + NFC_MAIN_AREA(0) + c, l);
440
441 /* Handle crossing main/spare boundary */
442 if (l != len) {
443 buf += l;
444 len -= l;
445 mpc5121_nfc_buf_copy(mtd, buf, len, wr);
446 }
447}
448
449/* Read data from NFC buffers */
450static void mpc5121_nfc_read_buf(struct mtd_info *mtd, u_char * buf, int len)
451{
452 mpc5121_nfc_buf_copy(mtd, buf, len, 0);
453}
454
455/* Write data to NFC buffers */
456static void mpc5121_nfc_write_buf(struct mtd_info *mtd,
457 const u_char * buf, int len)
458{
459 mpc5121_nfc_buf_copy(mtd, (u_char *) buf, len, 1);
460}
461
ff94bc40 462#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
35f2edbb
SR		 463/* Compare buffer with NAND flash */
464static int mpc5121_nfc_verify_buf(struct mtd_info *mtd,
465 const u_char * buf, int len)
466{
467 u_char tmp[256];
468 uint bsize;
469
470 while (len) {
471 bsize = min(len, 256);
472 mpc5121_nfc_read_buf(mtd, tmp, bsize);
473
474 if (memcmp(buf, tmp, bsize))
475 return 1;
476
477 buf += bsize;
478 len -= bsize;
479 }
480
481 return 0;
482}
ff94bc40 483#endif
35f2edbb
SR		 484
485/* Read byte from NFC buffers */
486static u8 mpc5121_nfc_read_byte(struct mtd_info *mtd)
487{
488 u8 tmp;
489
490 mpc5121_nfc_read_buf(mtd, &tmp, sizeof(tmp));
491
492 return tmp;
493}
494
495/* Read word from NFC buffers */
496static u16 mpc5121_nfc_read_word(struct mtd_info *mtd)
497{
498 u16 tmp;
499
500 mpc5121_nfc_read_buf(mtd, (u_char *) & tmp, sizeof(tmp));
501
502 return tmp;
503}
504
505/*
506 * Read NFC configuration from Reset Config Word
507 *
508 * NFC is configured during reset in basis of information stored
509 * in Reset Config Word. There is no other way to set NAND block
510 * size, spare size and bus width.
511 */
512static int mpc5121_nfc_read_hw_config(struct mtd_info *mtd)
513{
514 immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
515 struct nand_chip *chip = mtd->priv;
516 uint rcw_pagesize = 0;
517 uint rcw_sparesize = 0;
518 uint rcw_width;
519 uint rcwh;
520 uint romloc, ps;
521
522 rcwh = in_be32(&(im->reset.rcwh));
523
524 /* Bit 6: NFC bus width */
525 rcw_width = ((rcwh >> 6) & 0x1) ? 2 : 1;
526
527 /* Bit 7: NFC Page/Spare size */
528 ps = (rcwh >> 7) & 0x1;
529
530 /* Bits [22:21]: ROM Location */
531 romloc = (rcwh >> 21) & 0x3;
532
533 /* Decode RCW bits */
534 switch ((ps << 2) | romloc) {
535 case 0x00:
536 case 0x01:
537 rcw_pagesize = 512;
538 rcw_sparesize = 16;
539 break;
540 case 0x02:
541 case 0x03:
542 rcw_pagesize = 4096;
543 rcw_sparesize = 128;
544 break;
545 case 0x04:
546 case 0x05:
547 rcw_pagesize = 2048;
548 rcw_sparesize = 64;
549 break;
550 case 0x06:
551 case 0x07:
552 rcw_pagesize = 4096;
553 rcw_sparesize = 218;
554 break;
555 }
556
557 mtd->writesize = rcw_pagesize;
558 mtd->oobsize = rcw_sparesize;
559 if (rcw_width == 2)
560 chip->options |= NAND_BUSWIDTH_16;
561
562 debug(KERN_NOTICE DRV_NAME ": Configured for "
563 "%u-bit NAND, page size %u with %u spare.\n",
564 rcw_width * 8, rcw_pagesize, rcw_sparesize);
565 return 0;
566}
567
568int board_nand_init(struct nand_chip *chip)
569{
570 struct mpc5121_nfc_prv *prv;
571 struct mtd_info *mtd;
572 int resettime = 0;
573 int retval = 0;
574 int rev;
575 static int chip_nr = 0;
576
577 /*
578 * Check SoC revision. This driver supports only NFC
579 * in MPC5121 revision 2.
580 */
581 rev = (mfspr(SPRN_SVR) >> 4) & 0xF;
582 if (rev != 2) {
583 printk(KERN_ERR DRV_NAME
584 ": SoC revision %u is not supported!\n", rev);
585 return -ENXIO;
586 }
587
588 prv = malloc(sizeof(*prv));
589 if (!prv) {
590 printk(KERN_ERR DRV_NAME ": Memory exhausted!\n");
591 return -ENOMEM;
592 }
593
594 mtd = &nand_info[chip_nr++];
595 mtd->priv = chip;
596 chip->priv = prv;
597
598 /* Read NFC configuration from Reset Config Word */
599 retval = mpc5121_nfc_read_hw_config(mtd);
600 if (retval) {
601 printk(KERN_ERR DRV_NAME ": Unable to read NFC config!\n");
602 return retval;
603 }
604
605 prv->regs = (void __iomem *)CONFIG_SYS_NAND_BASE;
606 chip->dev_ready = mpc5121_nfc_dev_ready;
607 chip->cmdfunc = mpc5121_nfc_command;
608 chip->read_byte = mpc5121_nfc_read_byte;
609 chip->read_word = mpc5121_nfc_read_word;
610 chip->read_buf = mpc5121_nfc_read_buf;
611 chip->write_buf = mpc5121_nfc_write_buf;
ff94bc40 612#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
35f2edbb 613 chip->verify_buf = mpc5121_nfc_verify_buf;
ff94bc40 614#endif
35f2edbb 615 chip->select_chip = mpc5121_nfc_select_chip;
dfe64e2c 616 chip->bbt_options = NAND_BBT_USE_FLASH;
35f2edbb
SR		 617 chip->ecc.mode = NAND_ECC_SOFT;
618
619 /* Reset NAND Flash controller */
620 nfc_set(mtd, NFC_CONFIG1, NFC_RESET);
621 while (nfc_read(mtd, NFC_CONFIG1) & NFC_RESET) {
622 if (resettime++ >= NFC_RESET_TIMEOUT) {
623 printk(KERN_ERR DRV_NAME
624 ": Timeout while resetting NFC!\n");
625 retval = -EINVAL;
626 goto error;
627 }
628
629 udelay(1);
630 }
631
632 /* Enable write to NFC memory */
633 nfc_write(mtd, NFC_CONFIG, NFC_BLS_UNLOCKED);
634
635 /* Enable write to all NAND pages */
636 nfc_write(mtd, NFC_UNLOCKSTART_BLK0, 0x0000);
637 nfc_write(mtd, NFC_UNLOCKEND_BLK0, 0xFFFF);
638 nfc_write(mtd, NFC_WRPROT, NFC_WPC_UNLOCK);
639
640 /*
641 * Setup NFC:
642 * - Big Endian transfers,
643 * - Interrupt after full page read/write.
644 */
645 nfc_write(mtd, NFC_CONFIG1, NFC_BIG_ENDIAN | NFC_INT_MASK |
646 NFC_FULL_PAGE_INT);
647
648 /* Set spare area size */
649 nfc_write(mtd, NFC_SPAS, mtd->oobsize >> 1);
650
651 /* Detect NAND chips */
652 if (nand_scan(mtd, 1)) {
653 printk(KERN_ERR DRV_NAME ": NAND Flash not found !\n");
654 retval = -ENXIO;
655 goto error;
656 }
657
658 /* Set erase block size */
659 switch (mtd->erasesize / mtd->writesize) {
660 case 32:
661 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_32);
662 break;
663
664 case 64:
665 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_64);
666 break;
667
668 case 128:
669 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_128);
670 break;
671
672 case 256:
673 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_256);
674 break;
675
676 default:
677 printk(KERN_ERR DRV_NAME ": Unsupported NAND flash!\n");
678 retval = -ENXIO;
679 goto error;
680 }
681
682 return 0;
683error:
684 return retval;
685}
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