NAND: Fix integer overflow in ONFI detection of chips >= 4GiB
[people/ms/u-boot.git] / drivers / mtd / nand / nand_base.c
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1/*
2 * drivers/mtd/nand.c
3 *
4 * Overview:
5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
ac7eb8a3 8 *
932394ac 9 * Additional technical information is available on
c45912d8 10 * http://www.linux-mtd.infradead.org/doc/nand.html
ac7eb8a3 11 *
932394ac 12 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
cfa460ad 13 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
932394ac 14 *
cfa460ad 15 * Credits:
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16 * David Woodhouse for adding multichip support
17 *
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18 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
19 * rework for 2K page size chips
20 *
cfa460ad 21 * TODO:
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22 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
24 * if we have HW ecc support.
25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go.
c45912d8 27 * BBT table is not serialized, has to be fixed
932394ac 28 *
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29 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License version 2 as
31 * published by the Free Software Foundation.
32 *
33 */
34
932394ac 35#include <common.h>
addb2e16 36
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37#define ENOTSUPP 524 /* Operation is not supported */
38
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39#include <malloc.h>
40#include <watchdog.h>
cfa460ad 41#include <linux/err.h>
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42#include <linux/mtd/compat.h>
43#include <linux/mtd/mtd.h>
44#include <linux/mtd/nand.h>
45#include <linux/mtd/nand_ecc.h>
46
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47#ifdef CONFIG_MTD_PARTITIONS
48#include <linux/mtd/partitions.h>
49#endif
50
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51#include <asm/io.h>
52#include <asm/errno.h>
53
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54/*
55 * CONFIG_SYS_NAND_RESET_CNT is used as a timeout mechanism when resetting
56 * a flash. NAND flash is initialized prior to interrupts so standard timers
57 * can't be used. CONFIG_SYS_NAND_RESET_CNT should be set to a value
58 * which is greater than (max NAND reset time / NAND status read time).
59 * A conservative default of 200000 (500 us / 25 ns) is used as a default.
60 */
61#ifndef CONFIG_SYS_NAND_RESET_CNT
62#define CONFIG_SYS_NAND_RESET_CNT 200000
63#endif
64
932394ac 65/* Define default oob placement schemes for large and small page devices */
cfa460ad 66static struct nand_ecclayout nand_oob_8 = {
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67 .eccbytes = 3,
68 .eccpos = {0, 1, 2},
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69 .oobfree = {
70 {.offset = 3,
71 .length = 2},
72 {.offset = 6,
73 .length = 2}}
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74};
75
cfa460ad 76static struct nand_ecclayout nand_oob_16 = {
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77 .eccbytes = 6,
78 .eccpos = {0, 1, 2, 3, 6, 7},
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79 .oobfree = {
80 {.offset = 8,
81 . length = 8}}
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82};
83
cfa460ad 84static struct nand_ecclayout nand_oob_64 = {
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85 .eccbytes = 24,
86 .eccpos = {
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87 40, 41, 42, 43, 44, 45, 46, 47,
88 48, 49, 50, 51, 52, 53, 54, 55,
89 56, 57, 58, 59, 60, 61, 62, 63},
90 .oobfree = {
91 {.offset = 2,
92 .length = 38}}
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93};
94
cfa460ad 95static struct nand_ecclayout nand_oob_128 = {
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96 .eccbytes = 48,
97 .eccpos = {
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98 80, 81, 82, 83, 84, 85, 86, 87,
99 88, 89, 90, 91, 92, 93, 94, 95,
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100 96, 97, 98, 99, 100, 101, 102, 103,
101 104, 105, 106, 107, 108, 109, 110, 111,
102 112, 113, 114, 115, 116, 117, 118, 119,
103 120, 121, 122, 123, 124, 125, 126, 127},
104 .oobfree = {
105 {.offset = 2,
106 .length = 78}}
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107};
108
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109
110static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd,
111 int new_state);
112
113static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
114 struct mtd_oob_ops *ops);
115
116static int nand_wait(struct mtd_info *mtd, struct nand_chip *this);
248ae5cf 117
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118/**
119 * nand_release_device - [GENERIC] release chip
120 * @mtd: MTD device structure
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121 *
122 * Deselect, release chip lock and wake up anyone waiting on the device
932394ac 123 */
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124static void nand_release_device (struct mtd_info *mtd)
125{
126 struct nand_chip *this = mtd->priv;
127 this->select_chip(mtd, -1); /* De-select the NAND device */
128}
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129
130/**
131 * nand_read_byte - [DEFAULT] read one byte from the chip
132 * @mtd: MTD device structure
133 *
134 * Default read function for 8bit buswith
135 */
cfa460ad 136static uint8_t nand_read_byte(struct mtd_info *mtd)
932394ac 137{
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138 struct nand_chip *chip = mtd->priv;
139 return readb(chip->IO_ADDR_R);
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140}
141
142/**
143 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
144 * @mtd: MTD device structure
145 *
ac7eb8a3 146 * Default read function for 16bit buswith with
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147 * endianess conversion
148 */
cfa460ad 149static uint8_t nand_read_byte16(struct mtd_info *mtd)
932394ac 150{
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151 struct nand_chip *chip = mtd->priv;
152 return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));
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153}
154
155/**
156 * nand_read_word - [DEFAULT] read one word from the chip
157 * @mtd: MTD device structure
158 *
ac7eb8a3 159 * Default read function for 16bit buswith without
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160 * endianess conversion
161 */
162static u16 nand_read_word(struct mtd_info *mtd)
163{
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164 struct nand_chip *chip = mtd->priv;
165 return readw(chip->IO_ADDR_R);
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166}
167
168/**
169 * nand_select_chip - [DEFAULT] control CE line
170 * @mtd: MTD device structure
cfa460ad 171 * @chipnr: chipnumber to select, -1 for deselect
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172 *
173 * Default select function for 1 chip devices.
174 */
cfa460ad 175static void nand_select_chip(struct mtd_info *mtd, int chipnr)
932394ac 176{
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177 struct nand_chip *chip = mtd->priv;
178
179 switch (chipnr) {
932394ac 180 case -1:
cfa460ad 181 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
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182 break;
183 case 0:
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184 break;
185
186 default:
187 BUG();
188 }
189}
190
191/**
192 * nand_write_buf - [DEFAULT] write buffer to chip
193 * @mtd: MTD device structure
194 * @buf: data buffer
195 * @len: number of bytes to write
196 *
197 * Default write function for 8bit buswith
198 */
cfa460ad 199static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
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200{
201 int i;
cfa460ad 202 struct nand_chip *chip = mtd->priv;
932394ac 203
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204 for (i = 0; i < len; i++)
205 writeb(buf[i], chip->IO_ADDR_W);
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206}
207
208/**
ac7eb8a3 209 * nand_read_buf - [DEFAULT] read chip data into buffer
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210 * @mtd: MTD device structure
211 * @buf: buffer to store date
212 * @len: number of bytes to read
213 *
214 * Default read function for 8bit buswith
215 */
cfa460ad 216static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
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217{
218 int i;
cfa460ad 219 struct nand_chip *chip = mtd->priv;
932394ac 220
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221 for (i = 0; i < len; i++)
222 buf[i] = readb(chip->IO_ADDR_R);
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223}
224
225/**
ac7eb8a3 226 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
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227 * @mtd: MTD device structure
228 * @buf: buffer containing the data to compare
229 * @len: number of bytes to compare
230 *
231 * Default verify function for 8bit buswith
232 */
cfa460ad 233static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
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234{
235 int i;
cfa460ad 236 struct nand_chip *chip = mtd->priv;
932394ac 237
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238 for (i = 0; i < len; i++)
239 if (buf[i] != readb(chip->IO_ADDR_R))
932394ac 240 return -EFAULT;
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241 return 0;
242}
243
244/**
245 * nand_write_buf16 - [DEFAULT] write buffer to chip
246 * @mtd: MTD device structure
247 * @buf: data buffer
248 * @len: number of bytes to write
249 *
250 * Default write function for 16bit buswith
251 */
cfa460ad 252static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
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253{
254 int i;
cfa460ad 255 struct nand_chip *chip = mtd->priv;
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256 u16 *p = (u16 *) buf;
257 len >>= 1;
ac7eb8a3 258
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259 for (i = 0; i < len; i++)
260 writew(p[i], chip->IO_ADDR_W);
ac7eb8a3 261
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262}
263
264/**
ac7eb8a3 265 * nand_read_buf16 - [DEFAULT] read chip data into buffer
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266 * @mtd: MTD device structure
267 * @buf: buffer to store date
268 * @len: number of bytes to read
269 *
270 * Default read function for 16bit buswith
271 */
cfa460ad 272static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
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273{
274 int i;
cfa460ad 275 struct nand_chip *chip = mtd->priv;
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276 u16 *p = (u16 *) buf;
277 len >>= 1;
278
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279 for (i = 0; i < len; i++)
280 p[i] = readw(chip->IO_ADDR_R);
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281}
282
283/**
ac7eb8a3 284 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
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285 * @mtd: MTD device structure
286 * @buf: buffer containing the data to compare
287 * @len: number of bytes to compare
288 *
289 * Default verify function for 16bit buswith
290 */
cfa460ad 291static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
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292{
293 int i;
cfa460ad 294 struct nand_chip *chip = mtd->priv;
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295 u16 *p = (u16 *) buf;
296 len >>= 1;
297
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298 for (i = 0; i < len; i++)
299 if (p[i] != readw(chip->IO_ADDR_R))
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300 return -EFAULT;
301
302 return 0;
303}
304
305/**
306 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
307 * @mtd: MTD device structure
308 * @ofs: offset from device start
309 * @getchip: 0, if the chip is already selected
310 *
ac7eb8a3 311 * Check, if the block is bad.
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312 */
313static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
314{
315 int page, chipnr, res = 0;
cfa460ad 316 struct nand_chip *chip = mtd->priv;
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317 u16 bad;
318
cfa460ad 319 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
a7988659 320
932394ac 321 if (getchip) {
cfa460ad 322 chipnr = (int)(ofs >> chip->chip_shift);
932394ac 323
cfa460ad 324 nand_get_device(chip, mtd, FL_READING);
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325
326 /* Select the NAND device */
cfa460ad 327 chip->select_chip(mtd, chipnr);
a7988659 328 }
932394ac 329
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330 if (chip->options & NAND_BUSWIDTH_16) {
331 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE,
332 page);
333 bad = cpu_to_le16(chip->read_word(mtd));
334 if (chip->badblockpos & 0x1)
335 bad >>= 8;
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336 if ((bad & 0xFF) != 0xff)
337 res = 1;
338 } else {
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339 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page);
340 if (chip->read_byte(mtd) != 0xff)
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341 res = 1;
342 }
ac7eb8a3 343
cfa460ad 344 if (getchip)
932394ac 345 nand_release_device(mtd);
ac7eb8a3 346
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347 return res;
348}
349
350/**
351 * nand_default_block_markbad - [DEFAULT] mark a block bad
352 * @mtd: MTD device structure
353 * @ofs: offset from device start
354 *
355 * This is the default implementation, which can be overridden by
356 * a hardware specific driver.
357*/
358static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
359{
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360 struct nand_chip *chip = mtd->priv;
361 uint8_t buf[2] = { 0, 0 };
362 int block, ret;
ac7eb8a3 363
932394ac 364 /* Get block number */
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365 block = (int)(ofs >> chip->bbt_erase_shift);
366 if (chip->bbt)
367 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
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368
369 /* Do we have a flash based bad block table ? */
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370 if (chip->options & NAND_USE_FLASH_BBT)
371 ret = nand_update_bbt(mtd, ofs);
372 else {
373 /* We write two bytes, so we dont have to mess with 16 bit
374 * access
375 */
c45912d8 376 nand_get_device(chip, mtd, FL_WRITING);
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377 ofs += mtd->oobsize;
378 chip->ops.len = chip->ops.ooblen = 2;
379 chip->ops.datbuf = NULL;
380 chip->ops.oobbuf = buf;
381 chip->ops.ooboffs = chip->badblockpos & ~0x01;
ac7eb8a3 382
cfa460ad 383 ret = nand_do_write_oob(mtd, ofs, &chip->ops);
c45912d8 384 nand_release_device(mtd);
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385 }
386 if (!ret)
387 mtd->ecc_stats.badblocks++;
c45912d8 388
cfa460ad 389 return ret;
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390}
391
ac7eb8a3 392/**
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393 * nand_check_wp - [GENERIC] check if the chip is write protected
394 * @mtd: MTD device structure
ac7eb8a3 395 * Check, if the device is write protected
932394ac 396 *
ac7eb8a3 397 * The function expects, that the device is already selected
932394ac 398 */
cfa460ad 399static int nand_check_wp(struct mtd_info *mtd)
932394ac 400{
cfa460ad 401 struct nand_chip *chip = mtd->priv;
932394ac 402 /* Check the WP bit */
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403 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
404 return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
932394ac 405}