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916527f4 KP |
1 | /* |
2 | * linux/drivers/mtd/onenand/onenand_base.c | |
3 | * | |
4 | * Copyright (C) 2005-2007 Samsung Electronics | |
5 | * Kyungmin Park <kyungmin.park@samsung.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <common.h> | |
13 | ||
14 | #ifdef CONFIG_CMD_ONENAND | |
15 | ||
16 | #include <linux/mtd/compat.h> | |
17 | #include <linux/mtd/mtd.h> | |
18 | #include <linux/mtd/onenand.h> | |
19 | ||
20 | #include <asm/io.h> | |
21 | #include <asm/errno.h> | |
22 | ||
77e475cc | 23 | /* It should access 16-bit instead of 8-bit */ |
d2c6fbec | 24 | static inline void *memcpy_16(void *dst, const void *src, unsigned int len) |
77e475cc KP |
25 | { |
26 | void *ret = dst; | |
27 | short *d = dst; | |
28 | const short *s = src; | |
29 | ||
30 | len >>= 1; | |
31 | while (len-- > 0) | |
32 | *d++ = *s++; | |
33 | return ret; | |
34 | } | |
35 | ||
916527f4 KP |
36 | static const unsigned char ffchars[] = { |
37 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
38 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ | |
39 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
40 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */ | |
41 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
42 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */ | |
43 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
44 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */ | |
45 | }; | |
46 | ||
47 | /** | |
48 | * onenand_readw - [OneNAND Interface] Read OneNAND register | |
49 | * @param addr address to read | |
50 | * | |
51 | * Read OneNAND register | |
52 | */ | |
53 | static unsigned short onenand_readw(void __iomem * addr) | |
54 | { | |
55 | return readw(addr); | |
56 | } | |
57 | ||
58 | /** | |
59 | * onenand_writew - [OneNAND Interface] Write OneNAND register with value | |
60 | * @param value value to write | |
61 | * @param addr address to write | |
62 | * | |
63 | * Write OneNAND register with value | |
64 | */ | |
65 | static void onenand_writew(unsigned short value, void __iomem * addr) | |
66 | { | |
67 | writew(value, addr); | |
68 | } | |
69 | ||
70 | /** | |
71 | * onenand_block_address - [DEFAULT] Get block address | |
72 | * @param device the device id | |
73 | * @param block the block | |
74 | * @return translated block address if DDP, otherwise same | |
75 | * | |
76 | * Setup Start Address 1 Register (F100h) | |
77 | */ | |
78 | static int onenand_block_address(int device, int block) | |
79 | { | |
80 | if (device & ONENAND_DEVICE_IS_DDP) { | |
81 | /* Device Flash Core select, NAND Flash Block Address */ | |
82 | int dfs = 0, density, mask; | |
83 | ||
84 | density = device >> ONENAND_DEVICE_DENSITY_SHIFT; | |
85 | mask = (1 << (density + 6)); | |
86 | ||
87 | if (block & mask) | |
88 | dfs = 1; | |
89 | ||
90 | return (dfs << ONENAND_DDP_SHIFT) | (block & (mask - 1)); | |
91 | } | |
92 | ||
93 | return block; | |
94 | } | |
95 | ||
96 | /** | |
97 | * onenand_bufferram_address - [DEFAULT] Get bufferram address | |
98 | * @param device the device id | |
99 | * @param block the block | |
100 | * @return set DBS value if DDP, otherwise 0 | |
101 | * | |
102 | * Setup Start Address 2 Register (F101h) for DDP | |
103 | */ | |
104 | static int onenand_bufferram_address(int device, int block) | |
105 | { | |
106 | if (device & ONENAND_DEVICE_IS_DDP) { | |
107 | /* Device BufferRAM Select */ | |
108 | int dbs = 0, density, mask; | |
109 | ||
110 | density = device >> ONENAND_DEVICE_DENSITY_SHIFT; | |
111 | mask = (1 << (density + 6)); | |
112 | ||
113 | if (block & mask) | |
114 | dbs = 1; | |
115 | ||
116 | return (dbs << ONENAND_DDP_SHIFT); | |
117 | } | |
118 | ||
119 | return 0; | |
120 | } | |
121 | ||
122 | /** | |
123 | * onenand_page_address - [DEFAULT] Get page address | |
124 | * @param page the page address | |
125 | * @param sector the sector address | |
126 | * @return combined page and sector address | |
127 | * | |
128 | * Setup Start Address 8 Register (F107h) | |
129 | */ | |
130 | static int onenand_page_address(int page, int sector) | |
131 | { | |
132 | /* Flash Page Address, Flash Sector Address */ | |
133 | int fpa, fsa; | |
134 | ||
135 | fpa = page & ONENAND_FPA_MASK; | |
136 | fsa = sector & ONENAND_FSA_MASK; | |
137 | ||
138 | return ((fpa << ONENAND_FPA_SHIFT) | fsa); | |
139 | } | |
140 | ||
141 | /** | |
142 | * onenand_buffer_address - [DEFAULT] Get buffer address | |
143 | * @param dataram1 DataRAM index | |
144 | * @param sectors the sector address | |
145 | * @param count the number of sectors | |
146 | * @return the start buffer value | |
147 | * | |
148 | * Setup Start Buffer Register (F200h) | |
149 | */ | |
150 | static int onenand_buffer_address(int dataram1, int sectors, int count) | |
151 | { | |
152 | int bsa, bsc; | |
153 | ||
154 | /* BufferRAM Sector Address */ | |
155 | bsa = sectors & ONENAND_BSA_MASK; | |
156 | ||
157 | if (dataram1) | |
158 | bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */ | |
159 | else | |
160 | bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */ | |
161 | ||
162 | /* BufferRAM Sector Count */ | |
163 | bsc = count & ONENAND_BSC_MASK; | |
164 | ||
165 | return ((bsa << ONENAND_BSA_SHIFT) | bsc); | |
166 | } | |
167 | ||
168 | /** | |
169 | * onenand_command - [DEFAULT] Send command to OneNAND device | |
170 | * @param mtd MTD device structure | |
171 | * @param cmd the command to be sent | |
172 | * @param addr offset to read from or write to | |
173 | * @param len number of bytes to read or write | |
174 | * | |
175 | * Send command to OneNAND device. This function is used for middle/large page | |
176 | * devices (1KB/2KB Bytes per page) | |
177 | */ | |
178 | static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, | |
179 | size_t len) | |
180 | { | |
181 | struct onenand_chip *this = mtd->priv; | |
182 | int value, readcmd = 0; | |
183 | int block, page; | |
184 | /* Now we use page size operation */ | |
185 | int sectors = 4, count = 4; | |
186 | ||
187 | /* Address translation */ | |
188 | switch (cmd) { | |
189 | case ONENAND_CMD_UNLOCK: | |
190 | case ONENAND_CMD_LOCK: | |
191 | case ONENAND_CMD_LOCK_TIGHT: | |
192 | block = -1; | |
193 | page = -1; | |
194 | break; | |
195 | ||
196 | case ONENAND_CMD_ERASE: | |
197 | case ONENAND_CMD_BUFFERRAM: | |
198 | block = (int)(addr >> this->erase_shift); | |
199 | page = -1; | |
200 | break; | |
201 | ||
202 | default: | |
203 | block = (int)(addr >> this->erase_shift); | |
204 | page = (int)(addr >> this->page_shift); | |
205 | page &= this->page_mask; | |
206 | break; | |
207 | } | |
208 | ||
209 | /* NOTE: The setting order of the registers is very important! */ | |
210 | if (cmd == ONENAND_CMD_BUFFERRAM) { | |
211 | /* Select DataRAM for DDP */ | |
212 | value = onenand_bufferram_address(this->device_id, block); | |
213 | this->write_word(value, | |
214 | this->base + ONENAND_REG_START_ADDRESS2); | |
215 | ||
216 | /* Switch to the next data buffer */ | |
217 | ONENAND_SET_NEXT_BUFFERRAM(this); | |
218 | ||
219 | return 0; | |
220 | } | |
221 | ||
222 | if (block != -1) { | |
223 | /* Write 'DFS, FBA' of Flash */ | |
224 | value = onenand_block_address(this->device_id, block); | |
225 | this->write_word(value, | |
226 | this->base + ONENAND_REG_START_ADDRESS1); | |
227 | } | |
228 | ||
229 | if (page != -1) { | |
230 | int dataram; | |
231 | ||
232 | switch (cmd) { | |
233 | case ONENAND_CMD_READ: | |
234 | case ONENAND_CMD_READOOB: | |
235 | dataram = ONENAND_SET_NEXT_BUFFERRAM(this); | |
236 | readcmd = 1; | |
237 | break; | |
238 | ||
239 | default: | |
240 | dataram = ONENAND_CURRENT_BUFFERRAM(this); | |
241 | break; | |
242 | } | |
243 | ||
244 | /* Write 'FPA, FSA' of Flash */ | |
245 | value = onenand_page_address(page, sectors); | |
246 | this->write_word(value, | |
247 | this->base + ONENAND_REG_START_ADDRESS8); | |
248 | ||
249 | /* Write 'BSA, BSC' of DataRAM */ | |
250 | value = onenand_buffer_address(dataram, sectors, count); | |
251 | this->write_word(value, this->base + ONENAND_REG_START_BUFFER); | |
252 | ||
253 | if (readcmd) { | |
254 | /* Select DataRAM for DDP */ | |
255 | value = | |
256 | onenand_bufferram_address(this->device_id, block); | |
257 | this->write_word(value, | |
258 | this->base + | |
259 | ONENAND_REG_START_ADDRESS2); | |
260 | } | |
261 | } | |
262 | ||
263 | /* Interrupt clear */ | |
264 | this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); | |
265 | /* Write command */ | |
266 | this->write_word(cmd, this->base + ONENAND_REG_COMMAND); | |
267 | ||
268 | return 0; | |
269 | } | |
270 | ||
271 | /** | |
272 | * onenand_wait - [DEFAULT] wait until the command is done | |
273 | * @param mtd MTD device structure | |
274 | * @param state state to select the max. timeout value | |
275 | * | |
276 | * Wait for command done. This applies to all OneNAND command | |
277 | * Read can take up to 30us, erase up to 2ms and program up to 350us | |
278 | * according to general OneNAND specs | |
279 | */ | |
280 | static int onenand_wait(struct mtd_info *mtd, int state) | |
281 | { | |
282 | struct onenand_chip *this = mtd->priv; | |
283 | unsigned int flags = ONENAND_INT_MASTER; | |
284 | unsigned int interrupt = 0; | |
285 | unsigned int ctrl, ecc; | |
286 | ||
287 | while (1) { | |
288 | interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); | |
289 | if (interrupt & flags) | |
290 | break; | |
291 | } | |
292 | ||
293 | ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); | |
294 | ||
295 | if (ctrl & ONENAND_CTRL_ERROR) { | |
296 | DEBUG(MTD_DEBUG_LEVEL0, | |
297 | "onenand_wait: controller error = 0x%04x\n", ctrl); | |
298 | return -EAGAIN; | |
299 | } | |
300 | ||
301 | if (ctrl & ONENAND_CTRL_LOCK) { | |
302 | DEBUG(MTD_DEBUG_LEVEL0, | |
303 | "onenand_wait: it's locked error = 0x%04x\n", ctrl); | |
304 | return -EIO; | |
305 | } | |
306 | ||
307 | if (interrupt & ONENAND_INT_READ) { | |
308 | ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS); | |
309 | if (ecc & ONENAND_ECC_2BIT_ALL) { | |
310 | DEBUG(MTD_DEBUG_LEVEL0, | |
311 | "onenand_wait: ECC error = 0x%04x\n", ecc); | |
312 | return -EBADMSG; | |
313 | } | |
314 | } | |
315 | ||
316 | return 0; | |
317 | } | |
318 | ||
319 | /** | |
320 | * onenand_bufferram_offset - [DEFAULT] BufferRAM offset | |
321 | * @param mtd MTD data structure | |
322 | * @param area BufferRAM area | |
323 | * @return offset given area | |
324 | * | |
325 | * Return BufferRAM offset given area | |
326 | */ | |
327 | static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) | |
328 | { | |
329 | struct onenand_chip *this = mtd->priv; | |
330 | ||
331 | if (ONENAND_CURRENT_BUFFERRAM(this)) { | |
332 | if (area == ONENAND_DATARAM) | |
333 | return mtd->oobblock; | |
334 | if (area == ONENAND_SPARERAM) | |
335 | return mtd->oobsize; | |
336 | } | |
337 | ||
338 | return 0; | |
339 | } | |
340 | ||
341 | /** | |
342 | * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area | |
343 | * @param mtd MTD data structure | |
344 | * @param area BufferRAM area | |
345 | * @param buffer the databuffer to put/get data | |
346 | * @param offset offset to read from or write to | |
347 | * @param count number of bytes to read/write | |
348 | * | |
349 | * Read the BufferRAM area | |
350 | */ | |
351 | static int onenand_read_bufferram(struct mtd_info *mtd, int area, | |
352 | unsigned char *buffer, int offset, | |
353 | size_t count) | |
354 | { | |
355 | struct onenand_chip *this = mtd->priv; | |
356 | void __iomem *bufferram; | |
357 | ||
358 | bufferram = this->base + area; | |
359 | bufferram += onenand_bufferram_offset(mtd, area); | |
360 | ||
d2c6fbec | 361 | memcpy_16(buffer, bufferram + offset, count); |
916527f4 KP |
362 | |
363 | return 0; | |
364 | } | |
365 | ||
366 | /** | |
367 | * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode | |
368 | * @param mtd MTD data structure | |
369 | * @param area BufferRAM area | |
370 | * @param buffer the databuffer to put/get data | |
371 | * @param offset offset to read from or write to | |
372 | * @param count number of bytes to read/write | |
373 | * | |
374 | * Read the BufferRAM area with Sync. Burst Mode | |
375 | */ | |
376 | static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area, | |
377 | unsigned char *buffer, int offset, | |
378 | size_t count) | |
379 | { | |
380 | struct onenand_chip *this = mtd->priv; | |
381 | void __iomem *bufferram; | |
382 | ||
383 | bufferram = this->base + area; | |
384 | bufferram += onenand_bufferram_offset(mtd, area); | |
385 | ||
386 | this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ); | |
387 | ||
d2c6fbec | 388 | memcpy_16(buffer, bufferram + offset, count); |
916527f4 KP |
389 | |
390 | this->mmcontrol(mtd, 0); | |
391 | ||
392 | return 0; | |
393 | } | |
394 | ||
395 | /** | |
396 | * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area | |
397 | * @param mtd MTD data structure | |
398 | * @param area BufferRAM area | |
399 | * @param buffer the databuffer to put/get data | |
400 | * @param offset offset to read from or write to | |
401 | * @param count number of bytes to read/write | |
402 | * | |
403 | * Write the BufferRAM area | |
404 | */ | |
405 | static int onenand_write_bufferram(struct mtd_info *mtd, int area, | |
406 | const unsigned char *buffer, int offset, | |
407 | size_t count) | |
408 | { | |
409 | struct onenand_chip *this = mtd->priv; | |
410 | void __iomem *bufferram; | |
411 | ||
412 | bufferram = this->base + area; | |
413 | bufferram += onenand_bufferram_offset(mtd, area); | |
414 | ||
d2c6fbec | 415 | memcpy_16(bufferram + offset, buffer, count); |
916527f4 KP |
416 | |
417 | return 0; | |
418 | } | |
419 | ||
420 | /** | |
421 | * onenand_check_bufferram - [GENERIC] Check BufferRAM information | |
422 | * @param mtd MTD data structure | |
423 | * @param addr address to check | |
424 | * @return 1 if there are valid data, otherwise 0 | |
425 | * | |
426 | * Check bufferram if there is data we required | |
427 | */ | |
428 | static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) | |
429 | { | |
430 | struct onenand_chip *this = mtd->priv; | |
431 | int block, page; | |
432 | int i; | |
433 | ||
434 | block = (int)(addr >> this->erase_shift); | |
435 | page = (int)(addr >> this->page_shift); | |
436 | page &= this->page_mask; | |
437 | ||
438 | i = ONENAND_CURRENT_BUFFERRAM(this); | |
439 | ||
440 | /* Is there valid data? */ | |
441 | if (this->bufferram[i].block == block && | |
442 | this->bufferram[i].page == page && this->bufferram[i].valid) | |
443 | return 1; | |
444 | ||
445 | return 0; | |
446 | } | |
447 | ||
448 | /** | |
449 | * onenand_update_bufferram - [GENERIC] Update BufferRAM information | |
450 | * @param mtd MTD data structure | |
451 | * @param addr address to update | |
452 | * @param valid valid flag | |
453 | * | |
454 | * Update BufferRAM information | |
455 | */ | |
456 | static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, | |
457 | int valid) | |
458 | { | |
459 | struct onenand_chip *this = mtd->priv; | |
460 | int block, page; | |
461 | int i; | |
462 | ||
463 | block = (int)(addr >> this->erase_shift); | |
464 | page = (int)(addr >> this->page_shift); | |
465 | page &= this->page_mask; | |
466 | ||
467 | /* Invalidate BufferRAM */ | |
468 | for (i = 0; i < MAX_BUFFERRAM; i++) { | |
469 | if (this->bufferram[i].block == block && | |
470 | this->bufferram[i].page == page) | |
471 | this->bufferram[i].valid = 0; | |
472 | } | |
473 | ||
474 | /* Update BufferRAM */ | |
475 | i = ONENAND_CURRENT_BUFFERRAM(this); | |
476 | this->bufferram[i].block = block; | |
477 | this->bufferram[i].page = page; | |
478 | this->bufferram[i].valid = valid; | |
479 | ||
480 | return 0; | |
481 | } | |
482 | ||
483 | /** | |
484 | * onenand_get_device - [GENERIC] Get chip for selected access | |
485 | * @param mtd MTD device structure | |
486 | * @param new_state the state which is requested | |
487 | * | |
488 | * Get the device and lock it for exclusive access | |
489 | */ | |
490 | static void onenand_get_device(struct mtd_info *mtd, int new_state) | |
491 | { | |
492 | /* Do nothing */ | |
493 | } | |
494 | ||
495 | /** | |
496 | * onenand_release_device - [GENERIC] release chip | |
497 | * @param mtd MTD device structure | |
498 | * | |
499 | * Deselect, release chip lock and wake up anyone waiting on the device | |
500 | */ | |
501 | static void onenand_release_device(struct mtd_info *mtd) | |
502 | { | |
503 | /* Do nothing */ | |
504 | } | |
505 | ||
506 | /** | |
507 | * onenand_read_ecc - [MTD Interface] Read data with ECC | |
508 | * @param mtd MTD device structure | |
509 | * @param from offset to read from | |
510 | * @param len number of bytes to read | |
511 | * @param retlen pointer to variable to store the number of read bytes | |
512 | * @param buf the databuffer to put data | |
513 | * @param oob_buf filesystem supplied oob data buffer | |
514 | * @param oobsel oob selection structure | |
515 | * | |
516 | * OneNAND read with ECC | |
517 | */ | |
518 | static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, | |
519 | size_t * retlen, u_char * buf, | |
520 | u_char * oob_buf, struct nand_oobinfo *oobsel) | |
521 | { | |
522 | struct onenand_chip *this = mtd->priv; | |
523 | int read = 0, column; | |
524 | int thislen; | |
525 | int ret = 0; | |
526 | ||
527 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ecc: from = 0x%08x, len = %i\n", | |
528 | (unsigned int)from, (int)len); | |
529 | ||
530 | /* Do not allow reads past end of device */ | |
531 | if ((from + len) > mtd->size) { | |
532 | DEBUG(MTD_DEBUG_LEVEL0, | |
533 | "onenand_read_ecc: Attempt read beyond end of device\n"); | |
534 | *retlen = 0; | |
535 | return -EINVAL; | |
536 | } | |
537 | ||
538 | /* Grab the lock and see if the device is available */ | |
539 | onenand_get_device(mtd, FL_READING); | |
540 | ||
541 | while (read < len) { | |
542 | thislen = min_t(int, mtd->oobblock, len - read); | |
543 | ||
544 | column = from & (mtd->oobblock - 1); | |
545 | if (column + thislen > mtd->oobblock) | |
546 | thislen = mtd->oobblock - column; | |
547 | ||
548 | if (!onenand_check_bufferram(mtd, from)) { | |
549 | this->command(mtd, ONENAND_CMD_READ, from, | |
550 | mtd->oobblock); | |
551 | ret = this->wait(mtd, FL_READING); | |
552 | /* First copy data and check return value for ECC handling */ | |
553 | onenand_update_bufferram(mtd, from, 1); | |
554 | } | |
555 | ||
556 | this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, | |
557 | thislen); | |
558 | ||
559 | read += thislen; | |
560 | if (read == len) | |
561 | break; | |
562 | ||
563 | if (ret) { | |
564 | DEBUG(MTD_DEBUG_LEVEL0, | |
565 | "onenand_read_ecc: read failed = %d\n", ret); | |
566 | break; | |
567 | } | |
568 | ||
569 | from += thislen; | |
570 | buf += thislen; | |
571 | } | |
572 | ||
573 | /* Deselect and wake up anyone waiting on the device */ | |
574 | onenand_release_device(mtd); | |
575 | ||
576 | /* | |
577 | * Return success, if no ECC failures, else -EBADMSG | |
578 | * fs driver will take care of that, because | |
579 | * retlen == desired len and result == -EBADMSG | |
580 | */ | |
581 | *retlen = read; | |
582 | return ret; | |
583 | } | |
584 | ||
585 | /** | |
586 | * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc | |
587 | * @param mtd MTD device structure | |
588 | * @param from offset to read from | |
589 | * @param len number of bytes to read | |
590 | * @param retlen pointer to variable to store the number of read bytes | |
591 | * @param buf the databuffer to put data | |
592 | * | |
593 | * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL | |
594 | */ | |
595 | int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, | |
596 | size_t * retlen, u_char * buf) | |
597 | { | |
598 | return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL); | |
599 | } | |
600 | ||
601 | /** | |
602 | * onenand_read_oob - [MTD Interface] OneNAND read out-of-band | |
603 | * @param mtd MTD device structure | |
604 | * @param from offset to read from | |
605 | * @param len number of bytes to read | |
606 | * @param retlen pointer to variable to store the number of read bytes | |
607 | * @param buf the databuffer to put data | |
608 | * | |
609 | * OneNAND read out-of-band data from the spare area | |
610 | */ | |
611 | int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, | |
612 | size_t * retlen, u_char * buf) | |
613 | { | |
614 | struct onenand_chip *this = mtd->priv; | |
615 | int read = 0, thislen, column; | |
616 | int ret = 0; | |
617 | ||
618 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", | |
619 | (unsigned int)from, (int)len); | |
620 | ||
621 | /* Initialize return length value */ | |
622 | *retlen = 0; | |
623 | ||
624 | /* Do not allow reads past end of device */ | |
625 | if (unlikely((from + len) > mtd->size)) { | |
626 | DEBUG(MTD_DEBUG_LEVEL0, | |
627 | "onenand_read_oob: Attempt read beyond end of device\n"); | |
628 | return -EINVAL; | |
629 | } | |
630 | ||
631 | /* Grab the lock and see if the device is available */ | |
632 | onenand_get_device(mtd, FL_READING); | |
633 | ||
634 | column = from & (mtd->oobsize - 1); | |
635 | ||
636 | while (read < len) { | |
637 | thislen = mtd->oobsize - column; | |
638 | thislen = min_t(int, thislen, len); | |
639 | ||
640 | this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize); | |
641 | ||
642 | onenand_update_bufferram(mtd, from, 0); | |
643 | ||
644 | ret = this->wait(mtd, FL_READING); | |
645 | /* First copy data and check return value for ECC handling */ | |
646 | ||
647 | this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, | |
648 | thislen); | |
649 | ||
650 | read += thislen; | |
651 | if (read == len) | |
652 | break; | |
653 | ||
654 | if (ret) { | |
655 | DEBUG(MTD_DEBUG_LEVEL0, | |
656 | "onenand_read_oob: read failed = %d\n", ret); | |
657 | break; | |
658 | } | |
659 | ||
660 | buf += thislen; | |
661 | /* Read more? */ | |
662 | if (read < len) { | |
663 | /* Page size */ | |
664 | from += mtd->oobblock; | |
665 | column = 0; | |
666 | } | |
667 | } | |
668 | ||
669 | /* Deselect and wake up anyone waiting on the device */ | |
670 | onenand_release_device(mtd); | |
671 | ||
672 | *retlen = read; | |
673 | return ret; | |
674 | } | |
675 | ||
676 | #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE | |
677 | /** | |
678 | * onenand_verify_page - [GENERIC] verify the chip contents after a write | |
679 | * @param mtd MTD device structure | |
680 | * @param buf the databuffer to verify | |
681 | * @param block block address | |
682 | * @param page page address | |
683 | * | |
684 | * Check DataRAM area directly | |
685 | */ | |
686 | static int onenand_verify_page(struct mtd_info *mtd, u_char * buf, | |
687 | loff_t addr, int block, int page) | |
688 | { | |
689 | struct onenand_chip *this = mtd->priv; | |
690 | void __iomem *dataram0, *dataram1; | |
691 | int ret = 0; | |
692 | ||
693 | this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock); | |
694 | ||
695 | ret = this->wait(mtd, FL_READING); | |
696 | if (ret) | |
697 | return ret; | |
698 | ||
699 | onenand_update_bufferram(mtd, addr, 1); | |
700 | ||
701 | /* Check, if the two dataram areas are same */ | |
702 | dataram0 = this->base + ONENAND_DATARAM; | |
703 | dataram1 = dataram0 + mtd->oobblock; | |
704 | ||
705 | if (memcmp(dataram0, dataram1, mtd->oobblock)) | |
706 | return -EBADMSG; | |
707 | ||
708 | return 0; | |
709 | } | |
710 | #else | |
711 | #define onenand_verify_page(...) (0) | |
712 | #endif | |
713 | ||
714 | #define NOTALIGNED(x) ((x & (mtd->oobblock - 1)) != 0) | |
715 | ||
716 | /** | |
717 | * onenand_write_ecc - [MTD Interface] OneNAND write with ECC | |
718 | * @param mtd MTD device structure | |
719 | * @param to offset to write to | |
720 | * @param len number of bytes to write | |
721 | * @param retlen pointer to variable to store the number of written bytes | |
722 | * @param buf the data to write | |
723 | * @param eccbuf filesystem supplied oob data buffer | |
724 | * @param oobsel oob selection structure | |
725 | * | |
726 | * OneNAND write with ECC | |
727 | */ | |
728 | static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len, | |
729 | size_t * retlen, const u_char * buf, | |
730 | u_char * eccbuf, struct nand_oobinfo *oobsel) | |
731 | { | |
732 | struct onenand_chip *this = mtd->priv; | |
733 | int written = 0; | |
734 | int ret = 0; | |
735 | ||
736 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ecc: to = 0x%08x, len = %i\n", | |
737 | (unsigned int)to, (int)len); | |
738 | ||
739 | /* Initialize retlen, in case of early exit */ | |
740 | *retlen = 0; | |
741 | ||
742 | /* Do not allow writes past end of device */ | |
743 | if (unlikely((to + len) > mtd->size)) { | |
744 | DEBUG(MTD_DEBUG_LEVEL0, | |
745 | "onenand_write_ecc: Attempt write to past end of device\n"); | |
746 | return -EINVAL; | |
747 | } | |
748 | ||
749 | /* Reject writes, which are not page aligned */ | |
750 | if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) { | |
751 | DEBUG(MTD_DEBUG_LEVEL0, | |
752 | "onenand_write_ecc: Attempt to write not page aligned data\n"); | |
753 | return -EINVAL; | |
754 | } | |
755 | ||
756 | /* Grab the lock and see if the device is available */ | |
757 | onenand_get_device(mtd, FL_WRITING); | |
758 | ||
759 | /* Loop until all data write */ | |
760 | while (written < len) { | |
761 | int thislen = min_t(int, mtd->oobblock, len - written); | |
762 | ||
763 | this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock); | |
764 | ||
765 | this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen); | |
766 | this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, | |
767 | mtd->oobsize); | |
768 | ||
769 | this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock); | |
770 | ||
771 | onenand_update_bufferram(mtd, to, 1); | |
772 | ||
773 | ret = this->wait(mtd, FL_WRITING); | |
774 | if (ret) { | |
775 | DEBUG(MTD_DEBUG_LEVEL0, | |
776 | "onenand_write_ecc: write filaed %d\n", ret); | |
777 | break; | |
778 | } | |
779 | ||
780 | written += thislen; | |
781 | ||
782 | /* Only check verify write turn on */ | |
783 | ret = onenand_verify_page(mtd, (u_char *) buf, to, block, page); | |
784 | if (ret) { | |
785 | DEBUG(MTD_DEBUG_LEVEL0, | |
786 | "onenand_write_ecc: verify failed %d\n", ret); | |
787 | break; | |
788 | } | |
789 | ||
790 | if (written == len) | |
791 | break; | |
792 | ||
793 | to += thislen; | |
794 | buf += thislen; | |
795 | } | |
796 | ||
797 | /* Deselect and wake up anyone waiting on the device */ | |
798 | onenand_release_device(mtd); | |
799 | ||
800 | *retlen = written; | |
801 | ||
802 | return ret; | |
803 | } | |
804 | ||
805 | /** | |
806 | * onenand_write - [MTD Interface] compability function for onenand_write_ecc | |
807 | * @param mtd MTD device structure | |
808 | * @param to offset to write to | |
809 | * @param len number of bytes to write | |
810 | * @param retlen pointer to variable to store the number of written bytes | |
811 | * @param buf the data to write | |
812 | * | |
813 | * This function simply calls onenand_write_ecc | |
814 | * with oob buffer and oobsel = NULL | |
815 | */ | |
816 | int onenand_write(struct mtd_info *mtd, loff_t to, size_t len, | |
817 | size_t * retlen, const u_char * buf) | |
818 | { | |
819 | return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL); | |
820 | } | |
821 | ||
822 | /** | |
823 | * onenand_write_oob - [MTD Interface] OneNAND write out-of-band | |
824 | * @param mtd MTD device structure | |
825 | * @param to offset to write to | |
826 | * @param len number of bytes to write | |
827 | * @param retlen pointer to variable to store the number of written bytes | |
828 | * @param buf the data to write | |
829 | * | |
830 | * OneNAND write out-of-band | |
831 | */ | |
832 | int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, | |
833 | size_t * retlen, const u_char * buf) | |
834 | { | |
835 | struct onenand_chip *this = mtd->priv; | |
836 | int column, status; | |
837 | int written = 0; | |
838 | ||
839 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", | |
840 | (unsigned int)to, (int)len); | |
841 | ||
842 | /* Initialize retlen, in case of early exit */ | |
843 | *retlen = 0; | |
844 | ||
845 | /* Do not allow writes past end of device */ | |
846 | if (unlikely((to + len) > mtd->size)) { | |
847 | DEBUG(MTD_DEBUG_LEVEL0, | |
848 | "onenand_write_oob: Attempt write to past end of device\n"); | |
849 | return -EINVAL; | |
850 | } | |
851 | ||
852 | /* Grab the lock and see if the device is available */ | |
853 | onenand_get_device(mtd, FL_WRITING); | |
854 | ||
855 | /* Loop until all data write */ | |
856 | while (written < len) { | |
857 | int thislen = min_t(int, mtd->oobsize, len - written); | |
858 | ||
859 | column = to & (mtd->oobsize - 1); | |
860 | ||
861 | this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize); | |
862 | ||
863 | this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, | |
864 | mtd->oobsize); | |
865 | this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column, | |
866 | thislen); | |
867 | ||
868 | this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize); | |
869 | ||
870 | onenand_update_bufferram(mtd, to, 0); | |
871 | ||
872 | status = this->wait(mtd, FL_WRITING); | |
873 | if (status) | |
874 | break; | |
875 | ||
876 | written += thislen; | |
877 | if (written == len) | |
878 | break; | |
879 | ||
880 | to += thislen; | |
881 | buf += thislen; | |
882 | } | |
883 | ||
884 | /* Deselect and wake up anyone waiting on the device */ | |
885 | onenand_release_device(mtd); | |
886 | ||
887 | *retlen = written; | |
888 | ||
889 | return 0; | |
890 | } | |
891 | ||
892 | /** | |
893 | * onenand_erase - [MTD Interface] erase block(s) | |
894 | * @param mtd MTD device structure | |
895 | * @param instr erase instruction | |
896 | * | |
897 | * Erase one ore more blocks | |
898 | */ | |
899 | int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) | |
900 | { | |
901 | struct onenand_chip *this = mtd->priv; | |
902 | unsigned int block_size; | |
903 | loff_t addr; | |
904 | int len; | |
905 | int ret = 0; | |
906 | ||
907 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", | |
908 | (unsigned int)instr->addr, (unsigned int)instr->len); | |
909 | ||
910 | block_size = (1 << this->erase_shift); | |
911 | ||
912 | /* Start address must align on block boundary */ | |
913 | if (unlikely(instr->addr & (block_size - 1))) { | |
914 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n"); | |
915 | return -EINVAL; | |
916 | } | |
917 | ||
918 | /* Length must align on block boundary */ | |
919 | if (unlikely(instr->len & (block_size - 1))) { | |
920 | DEBUG(MTD_DEBUG_LEVEL0, | |
921 | "onenand_erase: Length not block aligned\n"); | |
922 | return -EINVAL; | |
923 | } | |
924 | ||
925 | /* Do not allow erase past end of device */ | |
926 | if (unlikely((instr->len + instr->addr) > mtd->size)) { | |
927 | DEBUG(MTD_DEBUG_LEVEL0, | |
928 | "onenand_erase: Erase past end of device\n"); | |
929 | return -EINVAL; | |
930 | } | |
931 | ||
932 | instr->fail_addr = 0xffffffff; | |
933 | ||
934 | /* Grab the lock and see if the device is available */ | |
935 | onenand_get_device(mtd, FL_ERASING); | |
936 | ||
937 | /* Loop throught the pages */ | |
938 | len = instr->len; | |
939 | addr = instr->addr; | |
940 | ||
941 | instr->state = MTD_ERASING; | |
942 | ||
943 | while (len) { | |
944 | ||
945 | /* TODO Check badblock */ | |
946 | ||
947 | this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); | |
948 | ||
949 | ret = this->wait(mtd, FL_ERASING); | |
950 | /* Check, if it is write protected */ | |
951 | if (ret) { | |
952 | if (ret == -EPERM) | |
953 | DEBUG(MTD_DEBUG_LEVEL0, | |
954 | "onenand_erase: Device is write protected!!!\n"); | |
955 | else | |
956 | DEBUG(MTD_DEBUG_LEVEL0, | |
957 | "onenand_erase: Failed erase, block %d\n", | |
958 | (unsigned)(addr >> this->erase_shift)); | |
959 | instr->state = MTD_ERASE_FAILED; | |
960 | instr->fail_addr = addr; | |
961 | goto erase_exit; | |
962 | } | |
963 | ||
964 | len -= block_size; | |
965 | addr += block_size; | |
966 | } | |
967 | ||
968 | instr->state = MTD_ERASE_DONE; | |
969 | ||
970 | erase_exit: | |
971 | ||
972 | ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; | |
973 | /* Do call back function */ | |
974 | if (!ret) | |
975 | mtd_erase_callback(instr); | |
976 | ||
977 | /* Deselect and wake up anyone waiting on the device */ | |
978 | onenand_release_device(mtd); | |
979 | ||
980 | return ret; | |
981 | } | |
982 | ||
983 | /** | |
984 | * onenand_sync - [MTD Interface] sync | |
985 | * @param mtd MTD device structure | |
986 | * | |
987 | * Sync is actually a wait for chip ready function | |
988 | */ | |
989 | void onenand_sync(struct mtd_info *mtd) | |
990 | { | |
991 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n"); | |
992 | ||
993 | /* Grab the lock and see if the device is available */ | |
994 | onenand_get_device(mtd, FL_SYNCING); | |
995 | ||
996 | /* Release it and go back */ | |
997 | onenand_release_device(mtd); | |
998 | } | |
999 | ||
1000 | /** | |
1001 | * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad | |
1002 | * @param mtd MTD device structure | |
1003 | * @param ofs offset relative to mtd start | |
1004 | */ | |
1005 | int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) | |
1006 | { | |
1007 | /* | |
1008 | * TODO | |
1009 | * 1. Bad block table (BBT) | |
1010 | * -> using NAND BBT to support JFFS2 | |
1011 | * 2. Bad block management (BBM) | |
1012 | * -> bad block replace scheme | |
1013 | * | |
1014 | * Currently we do nothing | |
1015 | */ | |
1016 | return 0; | |
1017 | } | |
1018 | ||
1019 | /** | |
1020 | * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad | |
1021 | * @param mtd MTD device structure | |
1022 | * @param ofs offset relative to mtd start | |
1023 | */ | |
1024 | int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) | |
1025 | { | |
1026 | /* see above */ | |
1027 | return 0; | |
1028 | } | |
1029 | ||
1030 | /** | |
1031 | * onenand_unlock - [MTD Interface] Unlock block(s) | |
1032 | * @param mtd MTD device structure | |
1033 | * @param ofs offset relative to mtd start | |
1034 | * @param len number of bytes to unlock | |
1035 | * | |
1036 | * Unlock one or more blocks | |
1037 | */ | |
1038 | int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) | |
1039 | { | |
1040 | struct onenand_chip *this = mtd->priv; | |
1041 | int start, end, block, value, status; | |
1042 | ||
1043 | start = ofs >> this->erase_shift; | |
1044 | end = len >> this->erase_shift; | |
1045 | ||
1046 | /* Continuous lock scheme */ | |
1047 | if (this->options & ONENAND_CONT_LOCK) { | |
1048 | /* Set start block address */ | |
1049 | this->write_word(start, | |
1050 | this->base + ONENAND_REG_START_BLOCK_ADDRESS); | |
1051 | /* Set end block address */ | |
1052 | this->write_word(end - 1, | |
1053 | this->base + ONENAND_REG_END_BLOCK_ADDRESS); | |
1054 | /* Write unlock command */ | |
1055 | this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0); | |
1056 | ||
1057 | /* There's no return value */ | |
1058 | this->wait(mtd, FL_UNLOCKING); | |
1059 | ||
1060 | /* Sanity check */ | |
1061 | while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) | |
1062 | & ONENAND_CTRL_ONGO) | |
1063 | continue; | |
1064 | ||
1065 | /* Check lock status */ | |
1066 | status = this->read_word(this->base + ONENAND_REG_WP_STATUS); | |
1067 | if (!(status & ONENAND_WP_US)) | |
1068 | printk(KERN_ERR "wp status = 0x%x\n", status); | |
1069 | ||
1070 | return 0; | |
1071 | } | |
1072 | ||
1073 | /* Block lock scheme */ | |
1074 | for (block = start; block < end; block++) { | |
1075 | /* Set start block address */ | |
1076 | this->write_word(block, | |
1077 | this->base + ONENAND_REG_START_BLOCK_ADDRESS); | |
1078 | /* Write unlock command */ | |
1079 | this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0); | |
1080 | ||
1081 | /* There's no return value */ | |
1082 | this->wait(mtd, FL_UNLOCKING); | |
1083 | ||
1084 | /* Sanity check */ | |
1085 | while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) | |
1086 | & ONENAND_CTRL_ONGO) | |
1087 | continue; | |
1088 | ||
1089 | /* Set block address for read block status */ | |
1090 | value = onenand_block_address(this->device_id, block); | |
1091 | this->write_word(value, | |
1092 | this->base + ONENAND_REG_START_ADDRESS1); | |
1093 | ||
1094 | /* Check lock status */ | |
1095 | status = this->read_word(this->base + ONENAND_REG_WP_STATUS); | |
1096 | if (!(status & ONENAND_WP_US)) | |
1097 | printk(KERN_ERR "block = %d, wp status = 0x%x\n", | |
1098 | block, status); | |
1099 | } | |
1100 | ||
1101 | return 0; | |
1102 | } | |
1103 | ||
1104 | /** | |
1105 | * onenand_print_device_info - Print device ID | |
1106 | * @param device device ID | |
1107 | * | |
1108 | * Print device ID | |
1109 | */ | |
1110 | void onenand_print_device_info(int device, int verbose) | |
1111 | { | |
1112 | int vcc, demuxed, ddp, density; | |
1113 | ||
1114 | if (!verbose) | |
1115 | return; | |
1116 | ||
1117 | vcc = device & ONENAND_DEVICE_VCC_MASK; | |
1118 | demuxed = device & ONENAND_DEVICE_IS_DEMUX; | |
1119 | ddp = device & ONENAND_DEVICE_IS_DDP; | |
1120 | density = device >> ONENAND_DEVICE_DENSITY_SHIFT; | |
1121 | printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n", | |
1122 | demuxed ? "" : "Muxed ", | |
1123 | ddp ? "(DDP)" : "", | |
1124 | (16 << density), vcc ? "2.65/3.3" : "1.8", device); | |
1125 | } | |
1126 | ||
1127 | static const struct onenand_manufacturers onenand_manuf_ids[] = { | |
1128 | {ONENAND_MFR_SAMSUNG, "Samsung"}, | |
1129 | {ONENAND_MFR_UNKNOWN, "Unknown"} | |
1130 | }; | |
1131 | ||
1132 | /** | |
1133 | * onenand_check_maf - Check manufacturer ID | |
1134 | * @param manuf manufacturer ID | |
1135 | * | |
1136 | * Check manufacturer ID | |
1137 | */ | |
1138 | static int onenand_check_maf(int manuf) | |
1139 | { | |
1140 | int i; | |
1141 | ||
1142 | for (i = 0; onenand_manuf_ids[i].id; i++) { | |
1143 | if (manuf == onenand_manuf_ids[i].id) | |
1144 | break; | |
1145 | } | |
1146 | ||
1147 | #ifdef ONENAND_DEBUG | |
1148 | printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", | |
1149 | onenand_manuf_ids[i].name, manuf); | |
1150 | #endif | |
1151 | ||
1152 | return (i != ONENAND_MFR_UNKNOWN); | |
1153 | } | |
1154 | ||
1155 | /** | |
1156 | * onenand_probe - [OneNAND Interface] Probe the OneNAND device | |
1157 | * @param mtd MTD device structure | |
1158 | * | |
1159 | * OneNAND detection method: | |
1160 | * Compare the the values from command with ones from register | |
1161 | */ | |
1162 | static int onenand_probe(struct mtd_info *mtd) | |
1163 | { | |
1164 | struct onenand_chip *this = mtd->priv; | |
1165 | int bram_maf_id, bram_dev_id, maf_id, dev_id; | |
1166 | int version_id; | |
1167 | int density; | |
1168 | ||
1169 | /* Send the command for reading device ID from BootRAM */ | |
1170 | this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); | |
1171 | ||
1172 | /* Read manufacturer and device IDs from BootRAM */ | |
1173 | bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); | |
1174 | bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); | |
1175 | ||
1176 | /* Check manufacturer ID */ | |
1177 | if (onenand_check_maf(bram_maf_id)) | |
1178 | return -ENXIO; | |
1179 | ||
1180 | /* Reset OneNAND to read default register values */ | |
1181 | this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); | |
1182 | ||
1183 | { | |
1184 | int i; | |
1185 | for (i = 0; i < 10000; i++) ; | |
1186 | } | |
1187 | ||
1188 | /* Read manufacturer and device IDs from Register */ | |
1189 | maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); | |
1190 | dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); | |
1191 | ||
1192 | /* Check OneNAND device */ | |
1193 | if (maf_id != bram_maf_id || dev_id != bram_dev_id) | |
1194 | return -ENXIO; | |
1195 | ||
1bb707c3 KP |
1196 | /* FIXME : Current OneNAND MTD doesn't support Flex-OneNAND */ |
1197 | if (dev_id & (1 << 9)) { | |
1198 | printk("Not yet support Flex-OneNAND\n"); | |
1199 | return -ENXIO; | |
1200 | } | |
1201 | ||
916527f4 KP |
1202 | /* Flash device information */ |
1203 | onenand_print_device_info(dev_id, 0); | |
1204 | this->device_id = dev_id; | |
1205 | ||
1206 | density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; | |
1207 | this->chipsize = (16 << density) << 20; | |
1208 | ||
1209 | /* OneNAND page size & block size */ | |
1210 | /* The data buffer size is equal to page size */ | |
1211 | mtd->oobblock = | |
1212 | this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); | |
1213 | mtd->oobsize = mtd->oobblock >> 5; | |
1214 | /* Pagers per block is always 64 in OneNAND */ | |
1215 | mtd->erasesize = mtd->oobblock << 6; | |
1216 | ||
1217 | this->erase_shift = ffs(mtd->erasesize) - 1; | |
1218 | this->page_shift = ffs(mtd->oobblock) - 1; | |
1219 | this->ppb_shift = (this->erase_shift - this->page_shift); | |
1220 | this->page_mask = (mtd->erasesize / mtd->oobblock) - 1; | |
1221 | ||
1222 | /* REVIST: Multichip handling */ | |
1223 | ||
1224 | mtd->size = this->chipsize; | |
1225 | ||
1226 | /* Version ID */ | |
1227 | version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); | |
1228 | #ifdef ONENAND_DEBUG | |
1229 | printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id); | |
1230 | #endif | |
1231 | ||
1232 | /* Lock scheme */ | |
1233 | if (density <= ONENAND_DEVICE_DENSITY_512Mb && | |
1234 | !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) { | |
1235 | printk(KERN_INFO "Lock scheme is Continues Lock\n"); | |
1236 | this->options |= ONENAND_CONT_LOCK; | |
1237 | } | |
1238 | ||
1239 | return 0; | |
1240 | } | |
1241 | ||
1242 | /** | |
1243 | * onenand_scan - [OneNAND Interface] Scan for the OneNAND device | |
1244 | * @param mtd MTD device structure | |
1245 | * @param maxchips Number of chips to scan for | |
1246 | * | |
1247 | * This fills out all the not initialized function pointers | |
1248 | * with the defaults. | |
1249 | * The flash ID is read and the mtd/chip structures are | |
1250 | * filled with the appropriate values. | |
1251 | */ | |
1252 | int onenand_scan(struct mtd_info *mtd, int maxchips) | |
1253 | { | |
1254 | struct onenand_chip *this = mtd->priv; | |
1255 | ||
1256 | if (!this->read_word) | |
1257 | this->read_word = onenand_readw; | |
1258 | if (!this->write_word) | |
1259 | this->write_word = onenand_writew; | |
1260 | ||
1261 | if (!this->command) | |
1262 | this->command = onenand_command; | |
1263 | if (!this->wait) | |
1264 | this->wait = onenand_wait; | |
1265 | ||
1266 | if (!this->read_bufferram) | |
1267 | this->read_bufferram = onenand_read_bufferram; | |
1268 | if (!this->write_bufferram) | |
1269 | this->write_bufferram = onenand_write_bufferram; | |
1270 | ||
1271 | if (onenand_probe(mtd)) | |
1272 | return -ENXIO; | |
1273 | ||
1274 | /* Set Sync. Burst Read after probing */ | |
1275 | if (this->mmcontrol) { | |
1276 | printk(KERN_INFO "OneNAND Sync. Burst Read support\n"); | |
1277 | this->read_bufferram = onenand_sync_read_bufferram; | |
1278 | } | |
1279 | ||
1280 | onenand_unlock(mtd, 0, mtd->size); | |
1281 | ||
1282 | return onenand_default_bbt(mtd); | |
1283 | } | |
1284 | ||
1285 | /** | |
1286 | * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device | |
1287 | * @param mtd MTD device structure | |
1288 | */ | |
1289 | void onenand_release(struct mtd_info *mtd) | |
1290 | { | |
1291 | } | |
1292 | ||
916527f4 | 1293 | #endif /* CONFIG_CMD_ONENAND */ |