[people/ms/u-boot.git] / drivers / mtd / spi / sf_probe.c

/*
 * SPI flash probing
 *
 * Copyright (C) 2008 Atmel Corporation
 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
#include <malloc.h>
#include <mapmem.h>
#include <spi.h>
#include <spi_flash.h>
#include <asm/io.h>

#include "sf_internal.h"

DECLARE_GLOBAL_DATA_PTR;

/* Read commands array */
static u8 spi_read_cmds_array[] = {
	CMD_READ_ARRAY_SLOW,
	CMD_READ_ARRAY_FAST,
	CMD_READ_DUAL_OUTPUT_FAST,
	CMD_READ_DUAL_IO_FAST,
	CMD_READ_QUAD_OUTPUT_FAST,
	CMD_READ_QUAD_IO_FAST,
};

#ifdef CONFIG_SPI_FLASH_MACRONIX
static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
{
	u8 qeb_status;
	int ret;

	ret = spi_flash_cmd_read_status(flash, &qeb_status);
	if (ret < 0)
		return ret;

	if (qeb_status & STATUS_QEB_MXIC) {
		debug("SF: mxic: QEB is already set\n");
	} else {
		ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC);
		if (ret < 0)
			return ret;
	}

	return ret;
}
#endif

#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
static int spi_flash_set_qeb_winspan(struct spi_flash *flash)
{
	u8 qeb_status;
	int ret;

	ret = spi_flash_cmd_read_config(flash, &qeb_status);
	if (ret < 0)
		return ret;

	if (qeb_status & STATUS_QEB_WINSPAN) {
		debug("SF: winspan: QEB is already set\n");
	} else {
		ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN);
		if (ret < 0)
			return ret;
	}

	return ret;
}
#endif

static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0)
{
	switch (idcode0) {
#ifdef CONFIG_SPI_FLASH_MACRONIX
	case SPI_FLASH_CFI_MFR_MACRONIX:
		return spi_flash_set_qeb_mxic(flash);
#endif
#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
	case SPI_FLASH_CFI_MFR_SPANSION:
	case SPI_FLASH_CFI_MFR_WINBOND:
		return spi_flash_set_qeb_winspan(flash);
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO
	case SPI_FLASH_CFI_MFR_STMICRO:
		debug("SF: QEB is volatile for %02x flash\n", idcode0);
		return 0;
#endif
	default:
		printf("SF: Need set QEB func for %02x flash\n", idcode0);
		return -1;
	}
}

static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode,
				     struct spi_flash *flash)
{
	const struct spi_flash_params *params;
	u8 cmd;
	u16 jedec = idcode[1] << 8 | idcode[2];
	u16 ext_jedec = idcode[3] << 8 | idcode[4];

	/* Validate params from spi_flash_params table */
	params = spi_flash_params_table;
	for (; params->name != NULL; params++) {
		if ((params->jedec >> 16) == idcode[0]) {
			if ((params->jedec & 0xFFFF) == jedec) {
				if (params->ext_jedec == 0)
					break;
				else if (params->ext_jedec == ext_jedec)
					break;
			}
		}
	}

	if (!params->name) {
		printf("SF: Unsupported flash IDs: ");
		printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
		       idcode[0], jedec, ext_jedec);
		return -EPROTONOSUPPORT;
	}

	/* Assign spi data */
	flash->spi = spi;
	flash->name = params->name;
	flash->memory_map = spi->memory_map;
	flash->dual_flash = flash->spi->option;
#ifdef CONFIG_DM_SPI_FLASH
	flash->flags = params->flags;
#endif

	/* Assign spi_flash ops */
#ifndef CONFIG_DM_SPI_FLASH
	flash->write = spi_flash_cmd_write_ops;
#if defined(CONFIG_SPI_FLASH_SST)
	if (params->flags & SST_WR) {
		if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
			flash->write = sst_write_bp;
		else
			flash->write = sst_write_wp;
	}
#endif
	flash->erase = spi_flash_cmd_erase_ops;
	flash->read = spi_flash_cmd_read_ops;
#endif

	/* Compute the flash size */
	flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
	/*
	 * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
	 * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
	 * the 0x4d00 Extended JEDEC code have 512b pages. All of the others
	 * have 256b pages.
	 */
	if (ext_jedec == 0x4d00) {
		if ((jedec == 0x0215) || (jedec == 0x216))
			flash->page_size = 256;
		else
			flash->page_size = 512;
	} else {
		flash->page_size = 256;
	}
	flash->page_size <<= flash->shift;
	flash->sector_size = params->sector_size << flash->shift;
	flash->size = flash->sector_size * params->nr_sectors << flash->shift;
#ifdef CONFIG_SF_DUAL_FLASH
	if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
		flash->size <<= 1;
#endif

	/* Compute erase sector and command */
	if (params->flags & SECT_4K) {
		flash->erase_cmd = CMD_ERASE_4K;
		flash->erase_size = 4096 << flash->shift;
	} else if (params->flags & SECT_32K) {
		flash->erase_cmd = CMD_ERASE_32K;
		flash->erase_size = 32768 << flash->shift;
	} else {
		flash->erase_cmd = CMD_ERASE_64K;
		flash->erase_size = flash->sector_size;
	}

	/* Now erase size becomes valid sector size */
	flash->sector_size = flash->erase_size;

	/* Look for the fastest read cmd */
	cmd = fls(params->e_rd_cmd & flash->spi->op_mode_rx);
	if (cmd) {
		cmd = spi_read_cmds_array[cmd - 1];
		flash->read_cmd = cmd;
	} else {
		/* Go for default supported read cmd */
		flash->read_cmd = CMD_READ_ARRAY_FAST;
	}

	/* Not require to look for fastest only two write cmds yet */
	if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP)
		flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
	else
		/* Go for default supported write cmd */
		flash->write_cmd = CMD_PAGE_PROGRAM;

	/* Read dummy_byte: dummy byte is determined based on the
	 * dummy cycles of a particular command.
	 * Fast commands - dummy_byte = dummy_cycles/8
	 * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8
	 * For I/O commands except cmd[0] everything goes on no.of lines
	 * based on particular command but incase of fast commands except
	 * data all go on single line irrespective of command.
	 */
	switch (flash->read_cmd) {
	case CMD_READ_QUAD_IO_FAST:
		flash->dummy_byte = 2;
		break;
	case CMD_READ_ARRAY_SLOW:
		flash->dummy_byte = 0;
		break;
	default:
		flash->dummy_byte = 1;
	}

	/* Poll cmd selection */
	flash->poll_cmd = CMD_READ_STATUS;
#ifdef CONFIG_SPI_FLASH_STMICRO
	if (params->flags & E_FSR)
		flash->poll_cmd = CMD_FLAG_STATUS;
#endif

	/* Configure the BAR - discover bank cmds and read current bank */
#ifdef CONFIG_SPI_FLASH_BAR
	u8 curr_bank = 0;
	if (flash->size > SPI_FLASH_16MB_BOUN) {
		int ret;

		flash->bank_read_cmd = (idcode[0] == 0x01) ?
					CMD_BANKADDR_BRRD : CMD_EXTNADDR_RDEAR;
		flash->bank_write_cmd = (idcode[0] == 0x01) ?
					CMD_BANKADDR_BRWR : CMD_EXTNADDR_WREAR;

		ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
					    &curr_bank, 1);
		if (ret) {
			debug("SF: fail to read bank addr register\n");
			return ret;
		}
		flash->bank_curr = curr_bank;
	} else {
		flash->bank_curr = curr_bank;
	}
#endif

	/* Flash powers up read-only, so clear BP# bits */
#if defined(CONFIG_SPI_FLASH_ATMEL) || \
	defined(CONFIG_SPI_FLASH_MACRONIX) || \
	defined(CONFIG_SPI_FLASH_SST)
		spi_flash_cmd_write_status(flash, 0);
#endif

	return 0;
}

#if CONFIG_IS_ENABLED(OF_CONTROL)
int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
{
	fdt_addr_t addr;
	fdt_size_t size;
	int node;

	/* If there is no node, do nothing */
	node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
	if (node < 0)
		return 0;

	addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
	if (addr == FDT_ADDR_T_NONE) {
		debug("%s: Cannot decode address\n", __func__);
		return 0;
	}

	if (flash->size != size) {
		debug("%s: Memory map must cover entire device\n", __func__);
		return -1;
	}
	flash->memory_map = map_sysmem(addr, size);

	return 0;
}
#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */

/**
 * spi_flash_probe_slave() - Probe for a SPI flash device on a bus
 *
 * @spi: Bus to probe
 * @flashp: Pointer to place to put flash info, which may be NULL if the
 * space should be allocated
 */
int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash)
{
	u8 idcode[5];
	int ret;

	/* Setup spi_slave */
	if (!spi) {
		printf("SF: Failed to set up slave\n");
		return -ENODEV;
	}

	/* Claim spi bus */
	ret = spi_claim_bus(spi);
	if (ret) {
		debug("SF: Failed to claim SPI bus: %d\n", ret);
		return ret;
	}

	/* Read the ID codes */
	ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
	if (ret) {
		printf("SF: Failed to get idcodes\n");
		goto err_read_id;
	}

#ifdef DEBUG
	printf("SF: Got idcodes\n");
	print_buffer(0, idcode, 1, sizeof(idcode), 0);
#endif

	if (spi_flash_validate_params(spi, idcode, flash)) {
		ret = -EINVAL;
		goto err_read_id;
	}

	/* Set the quad enable bit - only for quad commands */
	if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
	    (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
	    (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
		if (spi_flash_set_qeb(flash, idcode[0])) {
			debug("SF: Fail to set QEB for %02x\n", idcode[0]);
			ret = -EINVAL;
			goto err_read_id;
		}
	}

#if CONFIG_IS_ENABLED(OF_CONTROL)
	if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
		debug("SF: FDT decode error\n");
		ret = -EINVAL;
		goto err_read_id;
	}
#endif
#ifndef CONFIG_SPL_BUILD
	printf("SF: Detected %s with page size ", flash->name);
	print_size(flash->page_size, ", erase size ");
	print_size(flash->erase_size, ", total ");
	print_size(flash->size, "");
	if (flash->memory_map)
		printf(", mapped at %p", flash->memory_map);
	puts("\n");
#endif
#ifndef CONFIG_SPI_FLASH_BAR
	if (((flash->dual_flash == SF_SINGLE_FLASH) &&
	     (flash->size > SPI_FLASH_16MB_BOUN)) ||
	     ((flash->dual_flash > SF_SINGLE_FLASH) &&
	     (flash->size > SPI_FLASH_16MB_BOUN << 1))) {
		puts("SF: Warning - Only lower 16MiB accessible,");
		puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
	}
#endif
#ifdef CONFIG_SPI_FLASH_MTD
	ret = spi_flash_mtd_register(flash);
#endif

err_read_id:
	spi_release_bus(spi);
	return ret;
}

#ifndef CONFIG_DM_SPI_FLASH
struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus)
{
	struct spi_flash *flash;

	/* Allocate space if needed (not used by sf-uclass */
	flash = calloc(1, sizeof(*flash));
	if (!flash) {
		debug("SF: Failed to allocate spi_flash\n");
		return NULL;
	}

	if (spi_flash_probe_slave(bus, flash)) {
		spi_free_slave(bus);
		free(flash);
		return NULL;
	}

	return flash;
}

struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,
		unsigned int max_hz, unsigned int spi_mode)
{
	struct spi_slave *bus;

	bus = spi_setup_slave(busnum, cs, max_hz, spi_mode);
	if (!bus)
		return NULL;
	return spi_flash_probe_tail(bus);
}

#ifdef CONFIG_OF_SPI_FLASH
struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node,
				      int spi_node)
{
	struct spi_slave *bus;

	bus = spi_setup_slave_fdt(blob, slave_node, spi_node);
	if (!bus)
		return NULL;
	return spi_flash_probe_tail(bus);
}
#endif

void spi_flash_free(struct spi_flash *flash)
{
#ifdef CONFIG_SPI_FLASH_MTD
	spi_flash_mtd_unregister();
#endif
	spi_free_slave(flash->spi);
	free(flash);
}

#else /* defined CONFIG_DM_SPI_FLASH */

static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len,
			      void *buf)
{
	struct spi_flash *flash = dev_get_uclass_priv(dev);

	return spi_flash_cmd_read_ops(flash, offset, len, buf);
}

int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len,
			const void *buf)
{
	struct spi_flash *flash = dev_get_uclass_priv(dev);

#if defined(CONFIG_SPI_FLASH_SST)
	if (flash->flags & SST_WR) {
		if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
			return sst_write_bp(flash, offset, len, buf);
		else
			return sst_write_wp(flash, offset, len, buf);
	}
#endif

	return spi_flash_cmd_write_ops(flash, offset, len, buf);
}

int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len)
{
	struct spi_flash *flash = dev_get_uclass_priv(dev);

	return spi_flash_cmd_erase_ops(flash, offset, len);
}

int spi_flash_std_probe(struct udevice *dev)
{
	struct spi_slave *slave = dev_get_parent_priv(dev);
	struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
	struct spi_flash *flash;

	flash = dev_get_uclass_priv(dev);
	flash->dev = dev;
	debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs);
	return spi_flash_probe_slave(slave, flash);
}

static const struct dm_spi_flash_ops spi_flash_std_ops = {
	.read = spi_flash_std_read,
	.write = spi_flash_std_write,
	.erase = spi_flash_std_erase,
};

static const struct udevice_id spi_flash_std_ids[] = {
	{ .compatible = "spi-flash" },
	{ }
};

U_BOOT_DRIVER(spi_flash_std) = {
	.name		= "spi_flash_std",
	.id		= UCLASS_SPI_FLASH,
	.of_match	= spi_flash_std_ids,
	.probe		= spi_flash_std_probe,
	.priv_auto_alloc_size = sizeof(struct spi_flash),
	.ops		= &spi_flash_std_ops,
};

#endif /* CONFIG_DM_SPI_FLASH */
Commit	Line	Data
4d5e29a6 JT	1	/*
	2	* SPI flash probing
	3	*
	4	* Copyright (C) 2008 Atmel Corporation
	5	* Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
	6	* Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
	7	*
0c88a84a	8	* SPDX-License-Identifier: GPL-2.0+
4d5e29a6 JT	9	*/
	10
	11	#include <common.h>
fbb09918	12	#include <dm.h>
ae242cbf	13	#include <errno.h>
4d5e29a6 JT	14	#include <fdtdec.h>
4d5e29a6 JT	15	#include <malloc.h>
0eb25b61	16	#include <mapmem.h>
4d5e29a6 JT	17	#include <spi.h>
4d5e29a6 JT	18	#include <spi_flash.h>
ffdb20be	19	#include <asm/io.h>
4d5e29a6	20
898e76c9	21	#include "sf_internal.h"
4d5e29a6 JT	22
	23	DECLARE_GLOBAL_DATA_PTR;
	24
4e09cc1e JT	25	/* Read commands array */
	26	static u8 spi_read_cmds_array[] = {
	27	CMD_READ_ARRAY_SLOW,
6dd6e90e	28	CMD_READ_ARRAY_FAST,
4e09cc1e JT	29	CMD_READ_DUAL_OUTPUT_FAST,
4e09cc1e JT	30	CMD_READ_DUAL_IO_FAST,
3163aaa6	31	CMD_READ_QUAD_OUTPUT_FAST,
c4ba0d82	32	CMD_READ_QUAD_IO_FAST,
4e09cc1e JT	33	};
4e09cc1e JT	34
9f4322fd JT	35	#ifdef CONFIG_SPI_FLASH_MACRONIX
	36	static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
	37	{
	38	u8 qeb_status;
	39	int ret;
	40
	41	ret = spi_flash_cmd_read_status(flash, &qeb_status);
	42	if (ret < 0)
	43	return ret;
	44
	45	if (qeb_status & STATUS_QEB_MXIC) {
	46	debug("SF: mxic: QEB is already set\n");
	47	} else {
	48	ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC);
	49	if (ret < 0)
	50	return ret;
	51	}
	52
	53	return ret;
	54	}
	55	#endif
	56
	57	#if defined(CONFIG_SPI_FLASH_SPANSION) \|\| defined(CONFIG_SPI_FLASH_WINBOND)
	58	static int spi_flash_set_qeb_winspan(struct spi_flash *flash)
	59	{
	60	u8 qeb_status;
	61	int ret;
	62
	63	ret = spi_flash_cmd_read_config(flash, &qeb_status);
	64	if (ret < 0)
	65	return ret;
	66
	67	if (qeb_status & STATUS_QEB_WINSPAN) {
	68	debug("SF: winspan: QEB is already set\n");
	69	} else {
	70	ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN);
	71	if (ret < 0)
	72	return ret;
	73	}
	74
	75	return ret;
	76	}
	77	#endif
	78
d08a1baf JT	79	static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0)
	80	{
	81	switch (idcode0) {
06795122 JT	82	#ifdef CONFIG_SPI_FLASH_MACRONIX
	83	case SPI_FLASH_CFI_MFR_MACRONIX:
	84	return spi_flash_set_qeb_mxic(flash);
	85	#endif
d08a1baf JT	86	#if defined(CONFIG_SPI_FLASH_SPANSION) \|\| defined(CONFIG_SPI_FLASH_WINBOND)
	87	case SPI_FLASH_CFI_MFR_SPANSION:
	88	case SPI_FLASH_CFI_MFR_WINBOND:
	89	return spi_flash_set_qeb_winspan(flash);
	90	#endif
	91	#ifdef CONFIG_SPI_FLASH_STMICRO
	92	case SPI_FLASH_CFI_MFR_STMICRO:
	93	debug("SF: QEB is volatile for %02x flash\n", idcode0);
	94	return 0;
	95	#endif
	96	default:
	97	printf("SF: Need set QEB func for %02x flash\n", idcode0);
	98	return -1;
	99	}
	100	}
	101
ae242cbf SG	102	static int spi_flash_validate_params(struct spi_slave spi, u8 idcode,
ae242cbf SG	103	struct spi_flash *flash)
4d4ec992 JT	104	{
4d4ec992 JT	105	const struct spi_flash_params *params;
4e09cc1e	106	u8 cmd;
4d4ec992	107	u16 jedec = idcode[1] << 8 \| idcode[2];
74bec16e	108	u16 ext_jedec = idcode[3] << 8 \| idcode[4];
4d4ec992	109
ae242cbf	110	/* Validate params from spi_flash_params table */
33adfb5f JT	111	params = spi_flash_params_table;
33adfb5f JT	112	for (; params->name != NULL; params++) {
4d4ec992	113	if ((params->jedec >> 16) == idcode[0]) {
74bec16e JT	114	if ((params->jedec & 0xFFFF) == jedec) {
	115	if (params->ext_jedec == 0)
	116	break;
	117	else if (params->ext_jedec == ext_jedec)
	118	break;
	119	}
4d4ec992 JT	120	}
	121	}
	122
33adfb5f	123	if (!params->name) {
74bec16e JT	124	printf("SF: Unsupported flash IDs: ");
	125	printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
	126	idcode[0], jedec, ext_jedec);
ae242cbf	127	return -EPROTONOSUPPORT;
4d4ec992	128	}
4d4ec992	129
469146c0	130	/* Assign spi data */
4d4ec992 JT	131	flash->spi = spi;
4d4ec992 JT	132	flash->name = params->name;
ce22b922	133	flash->memory_map = spi->memory_map;
f77f4691	134	flash->dual_flash = flash->spi->option;
be7be78e BM	135	#ifdef CONFIG_DM_SPI_FLASH
	136	flash->flags = params->flags;
	137	#endif
4d4ec992 JT	138
4d4ec992 JT	139	/* Assign spi_flash ops */
fbb09918	140	#ifndef CONFIG_DM_SPI_FLASH
a5e8199a	141	flash->write = spi_flash_cmd_write_ops;
fbb09918	142	#if defined(CONFIG_SPI_FLASH_SST)
54ba653a JT	143	if (params->flags & SST_WR) {
	144	if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
	145	flash->write = sst_write_bp;
	146	else
	147	flash->write = sst_write_wp;
	148	}
10ca45d0	149	#endif
a5e8199a JT	150	flash->erase = spi_flash_cmd_erase_ops;
a5e8199a JT	151	flash->read = spi_flash_cmd_read_ops;
fbb09918	152	#endif
4d4ec992 JT	153
4d4ec992 JT	154	/* Compute the flash size */
056fbc73	155	flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
bf64035a MV	156	/*
	157	* The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
	158	* 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
	159	* the 0x4d00 Extended JEDEC code have 512b pages. All of the others
	160	* have 256b pages.
	161	*/
	162	if (ext_jedec == 0x4d00) {
	163	if ((jedec == 0x0215) \|\| (jedec == 0x216))
	164	flash->page_size = 256;
	165	else
	166	flash->page_size = 512;
	167	} else {
	168	flash->page_size = 256;
	169	}
	170	flash->page_size <<= flash->shift;
056fbc73 JT	171	flash->sector_size = params->sector_size << flash->shift;
056fbc73 JT	172	flash->size = flash->sector_size * params->nr_sectors << flash->shift;
b902e07c	173	#ifdef CONFIG_SF_DUAL_FLASH
f77f4691 JT	174	if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
f77f4691 JT	175	flash->size <<= 1;
b902e07c	176	#endif
4d4ec992	177
f4f51a8f JT	178	/* Compute erase sector and command */
	179	if (params->flags & SECT_4K) {
	180	flash->erase_cmd = CMD_ERASE_4K;
056fbc73	181	flash->erase_size = 4096 << flash->shift;
f4f51a8f JT	182	} else if (params->flags & SECT_32K) {
f4f51a8f JT	183	flash->erase_cmd = CMD_ERASE_32K;
056fbc73	184	flash->erase_size = 32768 << flash->shift;
f4f51a8f JT	185	} else {
	186	flash->erase_cmd = CMD_ERASE_64K;
	187	flash->erase_size = flash->sector_size;
	188	}
	189
c650ca7b JT	190	/* Now erase size becomes valid sector size */
	191	flash->sector_size = flash->erase_size;
	192
4e09cc1e JT	193	/* Look for the fastest read cmd */
	194	cmd = fls(params->e_rd_cmd & flash->spi->op_mode_rx);
	195	if (cmd) {
	196	cmd = spi_read_cmds_array[cmd - 1];
	197	flash->read_cmd = cmd;
	198	} else {
2ba863fa	199	/* Go for default supported read cmd */
4e09cc1e JT	200	flash->read_cmd = CMD_READ_ARRAY_FAST;
	201	}
	202
3163aaa6 JT	203	/* Not require to look for fastest only two write cmds yet */
	204	if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP)
	205	flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
	206	else
	207	/* Go for default supported write cmd */
	208	flash->write_cmd = CMD_PAGE_PROGRAM;
	209
ff063ed4 JT	210	/* Read dummy_byte: dummy byte is determined based on the
	211	* dummy cycles of a particular command.
	212	* Fast commands - dummy_byte = dummy_cycles/8
	213	* I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8
	214	* For I/O commands except cmd[0] everything goes on no.of lines
	215	* based on particular command but incase of fast commands except
	216	* data all go on single line irrespective of command.
	217	*/
	218	switch (flash->read_cmd) {
	219	case CMD_READ_QUAD_IO_FAST:
	220	flash->dummy_byte = 2;
	221	break;
	222	case CMD_READ_ARRAY_SLOW:
	223	flash->dummy_byte = 0;
	224	break;
	225	default:
	226	flash->dummy_byte = 1;
	227	}
	228
2ba863fa	229	/* Poll cmd selection */
0f623280 JT	230	flash->poll_cmd = CMD_READ_STATUS;
	231	#ifdef CONFIG_SPI_FLASH_STMICRO
	232	if (params->flags & E_FSR)
	233	flash->poll_cmd = CMD_FLAG_STATUS;
	234	#endif
	235
ce22b922	236	/* Configure the BAR - discover bank cmds and read current bank */
4d5e29a6	237	#ifdef CONFIG_SPI_FLASH_BAR
4d5e29a6	238	u8 curr_bank = 0;
4d5e29a6	239	if (flash->size > SPI_FLASH_16MB_BOUN) {
ae242cbf SG	240	int ret;
ae242cbf SG	241
32ebd1a7 JT	242	flash->bank_read_cmd = (idcode[0] == 0x01) ?
	243	CMD_BANKADDR_BRRD : CMD_EXTNADDR_RDEAR;
	244	flash->bank_write_cmd = (idcode[0] == 0x01) ?
	245	CMD_BANKADDR_BRWR : CMD_EXTNADDR_WREAR;
	246
ae242cbf SG	247	ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
	248	&curr_bank, 1);
	249	if (ret) {
4d5e29a6	250	debug("SF: fail to read bank addr register\n");
ae242cbf	251	return ret;
4d5e29a6 JT	252	}
	253	flash->bank_curr = curr_bank;
	254	} else {
	255	flash->bank_curr = curr_bank;
	256	}
32ebd1a7	257	#endif
4d5e29a6	258
32ebd1a7 JT	259	/* Flash powers up read-only, so clear BP# bits */
	260	#if defined(CONFIG_SPI_FLASH_ATMEL) \|\| \
	261	defined(CONFIG_SPI_FLASH_MACRONIX) \|\| \
	262	defined(CONFIG_SPI_FLASH_SST)
	263	spi_flash_cmd_write_status(flash, 0);
4d5e29a6 JT	264	#endif
4d5e29a6 JT	265
ae242cbf	266	return 0;
32ebd1a7 JT	267	}
32ebd1a7 JT	268
0f925822	269	#if CONFIG_IS_ENABLED(OF_CONTROL)
4d5e29a6 JT	270	int spi_flash_decode_fdt(const void blob, struct spi_flash flash)
	271	{
	272	fdt_addr_t addr;
	273	fdt_size_t size;
	274	int node;
	275
	276	/* If there is no node, do nothing */
	277	node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
	278	if (node < 0)
	279	return 0;
	280
	281	addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
	282	if (addr == FDT_ADDR_T_NONE) {
	283	debug("%s: Cannot decode address\n", __func__);
	284	return 0;
	285	}
	286
	287	if (flash->size != size) {
	288	debug("%s: Memory map must cover entire device\n", __func__);
	289	return -1;
	290	}
ffdb20be	291	flash->memory_map = map_sysmem(addr, size);
4d5e29a6 JT	292
	293	return 0;
	294	}
0f925822	295	#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
4d5e29a6	296
ae242cbf SG	297	/**
	298	* spi_flash_probe_slave() - Probe for a SPI flash device on a bus
	299	*
	300	* @spi: Bus to probe
	301	* @flashp: Pointer to place to put flash info, which may be NULL if the
	302	* space should be allocated
	303	*/
	304	int spi_flash_probe_slave(struct spi_slave spi, struct spi_flash flash)
4d5e29a6	305	{
32ebd1a7	306	u8 idcode[5];
4d4ec992	307	int ret;
4d5e29a6	308
4d4ec992	309	/* Setup spi_slave */
4d5e29a6 JT	310	if (!spi) {
4d5e29a6 JT	311	printf("SF: Failed to set up slave\n");
ae242cbf	312	return -ENODEV;
4d5e29a6 JT	313	}
4d5e29a6 JT	314
4d4ec992	315	/* Claim spi bus */
4d5e29a6 JT	316	ret = spi_claim_bus(spi);
	317	if (ret) {
	318	debug("SF: Failed to claim SPI bus: %d\n", ret);
ae242cbf	319	return ret;
4d5e29a6 JT	320	}
	321
	322	/* Read the ID codes */
	323	ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
4d4ec992 JT	324	if (ret) {
4d4ec992 JT	325	printf("SF: Failed to get idcodes\n");
4d5e29a6	326	goto err_read_id;
4d4ec992	327	}
4d5e29a6 JT	328
	329	#ifdef DEBUG
	330	printf("SF: Got idcodes\n");
	331	print_buffer(0, idcode, 1, sizeof(idcode), 0);
	332	#endif
	333
ae242cbf SG	334	if (spi_flash_validate_params(spi, idcode, flash)) {
ae242cbf SG	335	ret = -EINVAL;
4d4ec992	336	goto err_read_id;
ae242cbf	337	}
4d5e29a6	338
1f436a6d PS	339	/* Set the quad enable bit - only for quad commands */
	340	if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) \|\|
	341	(flash->read_cmd == CMD_READ_QUAD_IO_FAST) \|\|
	342	(flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
	343	if (spi_flash_set_qeb(flash, idcode[0])) {
	344	debug("SF: Fail to set QEB for %02x\n", idcode[0]);
ae242cbf SG	345	ret = -EINVAL;
ae242cbf SG	346	goto err_read_id;
1f436a6d PS	347	}
	348	}
	349
0f925822	350	#if CONFIG_IS_ENABLED(OF_CONTROL)
4d5e29a6 JT	351	if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
4d5e29a6 JT	352	debug("SF: FDT decode error\n");
ae242cbf	353	ret = -EINVAL;
4d4ec992	354	goto err_read_id;
4d5e29a6 JT	355	}
	356	#endif
	357	#ifndef CONFIG_SPL_BUILD
	358	printf("SF: Detected %s with page size ", flash->name);
3ea708f0 JT	359	print_size(flash->page_size, ", erase size ");
3ea708f0 JT	360	print_size(flash->erase_size, ", total ");
4d5e29a6 JT	361	print_size(flash->size, "");
	362	if (flash->memory_map)
	363	printf(", mapped at %p", flash->memory_map);
	364	puts("\n");
	365	#endif
	366	#ifndef CONFIG_SPI_FLASH_BAR
f77f4691 JT	367	if (((flash->dual_flash == SF_SINGLE_FLASH) &&
	368	(flash->size > SPI_FLASH_16MB_BOUN)) \|\|
	369	((flash->dual_flash > SF_SINGLE_FLASH) &&
	370	(flash->size > SPI_FLASH_16MB_BOUN << 1))) {
4d5e29a6 JT	371	puts("SF: Warning - Only lower 16MiB accessible,");
	372	puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
	373	}
	374	#endif
9fe6d871 DS	375	#ifdef CONFIG_SPI_FLASH_MTD
	376	ret = spi_flash_mtd_register(flash);
	377	#endif
4d5e29a6	378
4d5e29a6 JT	379	err_read_id:
4d5e29a6 JT	380	spi_release_bus(spi);
ae242cbf SG	381	return ret;
	382	}
	383
fbb09918 SG	384	#ifndef CONFIG_DM_SPI_FLASH
fbb09918 SG	385	struct spi_flash spi_flash_probe_tail(struct spi_slave bus)
ae242cbf SG	386	{
	387	struct spi_flash *flash;
	388
	389	/* Allocate space if needed (not used by sf-uclass */
	390	flash = calloc(1, sizeof(*flash));
	391	if (!flash) {
	392	debug("SF: Failed to allocate spi_flash\n");
	393	return NULL;
	394	}
	395
	396	if (spi_flash_probe_slave(bus, flash)) {
	397	spi_free_slave(bus);
	398	free(flash);
	399	return NULL;
	400	}
	401
	402	return flash;
4d5e29a6 JT	403	}
4d5e29a6 JT	404
ae242cbf	405	struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,
0efc0249 SG	406	unsigned int max_hz, unsigned int spi_mode)
0efc0249 SG	407	{
ae242cbf	408	struct spi_slave *bus;
0efc0249	409
ae242cbf	410	bus = spi_setup_slave(busnum, cs, max_hz, spi_mode);
4fbad92e PF	411	if (!bus)
4fbad92e PF	412	return NULL;
ae242cbf	413	return spi_flash_probe_tail(bus);
0efc0249 SG	414	}
	415
	416	#ifdef CONFIG_OF_SPI_FLASH
	417	struct spi_flash spi_flash_probe_fdt(const void blob, int slave_node,
	418	int spi_node)
	419	{
ae242cbf	420	struct spi_slave *bus;
0efc0249	421
ae242cbf	422	bus = spi_setup_slave_fdt(blob, slave_node, spi_node);
4fbad92e PF	423	if (!bus)
4fbad92e PF	424	return NULL;
ae242cbf	425	return spi_flash_probe_tail(bus);
0efc0249 SG	426	}
	427	#endif
	428
4d5e29a6 JT	429	void spi_flash_free(struct spi_flash *flash)
4d5e29a6 JT	430	{
9fe6d871 DS	431	#ifdef CONFIG_SPI_FLASH_MTD
	432	spi_flash_mtd_unregister();
	433	#endif
4d5e29a6 JT	434	spi_free_slave(flash->spi);
	435	free(flash);
	436	}
fbb09918 SG	437
	438	#else /* defined CONFIG_DM_SPI_FLASH */
	439
	440	static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len,
	441	void *buf)
	442	{
e564f054	443	struct spi_flash *flash = dev_get_uclass_priv(dev);
fbb09918 SG	444
	445	return spi_flash_cmd_read_ops(flash, offset, len, buf);
	446	}
	447
	448	int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len,
	449	const void *buf)
	450	{
e564f054	451	struct spi_flash *flash = dev_get_uclass_priv(dev);
fbb09918	452
074eed51 BM	453	#if defined(CONFIG_SPI_FLASH_SST)
	454	if (flash->flags & SST_WR) {
	455	if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
	456	return sst_write_bp(flash, offset, len, buf);
	457	else
	458	return sst_write_wp(flash, offset, len, buf);
	459	}
	460	#endif
	461
fbb09918 SG	462	return spi_flash_cmd_write_ops(flash, offset, len, buf);
	463	}
	464
	465	int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len)
	466	{
e564f054	467	struct spi_flash *flash = dev_get_uclass_priv(dev);
fbb09918 SG	468
	469	return spi_flash_cmd_erase_ops(flash, offset, len);
	470	}
	471
	472	int spi_flash_std_probe(struct udevice *dev)
	473	{
bcbe3d15	474	struct spi_slave *slave = dev_get_parent_priv(dev);
d0cff03e	475	struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
fbb09918 SG	476	struct spi_flash *flash;
fbb09918 SG	477
e564f054	478	flash = dev_get_uclass_priv(dev);
fbb09918	479	flash->dev = dev;
d0cff03e	480	debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs);
fbb09918 SG	481	return spi_flash_probe_slave(slave, flash);
	482	}
	483
	484	static const struct dm_spi_flash_ops spi_flash_std_ops = {
	485	.read = spi_flash_std_read,
	486	.write = spi_flash_std_write,
	487	.erase = spi_flash_std_erase,
	488	};
	489
	490	static const struct udevice_id spi_flash_std_ids[] = {
	491	{ .compatible = "spi-flash" },
	492	{ }
	493	};
	494
	495	U_BOOT_DRIVER(spi_flash_std) = {
	496	.name = "spi_flash_std",
	497	.id = UCLASS_SPI_FLASH,
	498	.of_match = spi_flash_std_ids,
	499	.probe = spi_flash_std_probe,
	500	.priv_auto_alloc_size = sizeof(struct spi_flash),
	501	.ops = &spi_flash_std_ops,
	502	};
	503
	504	#endif /* CONFIG_DM_SPI_FLASH */