[people/ms/u-boot.git] / drivers / rtc / ds3231.c

/*
 * (C) Copyright 2006
 * Markus Klotzbuecher, mk@denx.de
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/*
 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
 * Extremly Accurate DS3231 Real Time Clock (RTC).
 *
 * copied from ds1337.c
 */

#include <common.h>
#include <command.h>
#include <rtc.h>
#include <i2c.h>

#if defined(CONFIG_CMD_DATE)

/*
 * RTC register addresses
 */
#define RTC_SEC_REG_ADDR	0x0
#define RTC_MIN_REG_ADDR	0x1
#define RTC_HR_REG_ADDR		0x2
#define RTC_DAY_REG_ADDR	0x3
#define RTC_DATE_REG_ADDR	0x4
#define RTC_MON_REG_ADDR	0x5
#define RTC_YR_REG_ADDR		0x6
#define RTC_CTL_REG_ADDR	0x0e
#define RTC_STAT_REG_ADDR	0x0f


/*
 * RTC control register bits
 */
#define RTC_CTL_BIT_A1IE	0x1	/* Alarm 1 interrupt enable     */
#define RTC_CTL_BIT_A2IE	0x2	/* Alarm 2 interrupt enable     */
#define RTC_CTL_BIT_INTCN	0x4	/* Interrupt control            */
#define RTC_CTL_BIT_RS1		0x8	/* Rate select 1                */
#define RTC_CTL_BIT_RS2		0x10	/* Rate select 2                */
#define RTC_CTL_BIT_DOSC	0x80	/* Disable Oscillator           */

/*
 * RTC status register bits
 */
#define RTC_STAT_BIT_A1F	0x1	/* Alarm 1 flag                 */
#define RTC_STAT_BIT_A2F	0x2	/* Alarm 2 flag                 */
#define RTC_STAT_BIT_OSF	0x80	/* Oscillator stop flag         */
#define RTC_STAT_BIT_BB32KHZ	0x40	/* Battery backed 32KHz Output  */
#define RTC_STAT_BIT_EN32KHZ	0x8	/* Enable 32KHz Output  */


static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);


/*
 * Get the current time from the RTC
 */
int rtc_get (struct rtc_time *tmp)
{
	int rel = 0;
	uchar sec, min, hour, mday, wday, mon_cent, year, control, status;

	control = rtc_read (RTC_CTL_REG_ADDR);
	status = rtc_read (RTC_STAT_REG_ADDR);
	sec = rtc_read (RTC_SEC_REG_ADDR);
	min = rtc_read (RTC_MIN_REG_ADDR);
	hour = rtc_read (RTC_HR_REG_ADDR);
	wday = rtc_read (RTC_DAY_REG_ADDR);
	mday = rtc_read (RTC_DATE_REG_ADDR);
	mon_cent = rtc_read (RTC_MON_REG_ADDR);
	year = rtc_read (RTC_YR_REG_ADDR);

	debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
		"hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
		year, mon_cent, mday, wday, hour, min, sec, control, status);

	if (status & RTC_STAT_BIT_OSF) {
		printf ("### Warning: RTC oscillator has stopped\n");
		/* clear the OSF flag */
		rtc_write (RTC_STAT_REG_ADDR,
			   rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
		rel = -1;
	}

	tmp->tm_sec  = bcd2bin (sec & 0x7F);
	tmp->tm_min  = bcd2bin (min & 0x7F);
	tmp->tm_hour = bcd2bin (hour & 0x3F);
	tmp->tm_mday = bcd2bin (mday & 0x3F);
	tmp->tm_mon  = bcd2bin (mon_cent & 0x1F);
	tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900);
	tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
	tmp->tm_yday = 0;
	tmp->tm_isdst= 0;

	debug("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	return rel;
}


/*
 * Set the RTC
 */
int rtc_set (struct rtc_time *tmp)
{
	uchar century;

	debug("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));

	century = (tmp->tm_year >= 2000) ? 0x80 : 0;
	rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century);

	rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
	rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
	rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
	rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
	rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));

	return 0;
}


/*
 * Reset the RTC.  We also enable the oscillator output on the
 * SQW/INTB* pin and program it for 32,768 Hz output. Note that
 * according to the datasheet, turning on the square wave output
 * increases the current drain on the backup battery from about
 * 600 nA to 2uA.
 */
void rtc_reset (void)
{
	rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
}

/*
 * Enable 32KHz output
 */
void rtc_enable_32khz_output(void)
{
	rtc_write(RTC_STAT_REG_ADDR,
		  RTC_STAT_BIT_BB32KHZ | RTC_STAT_BIT_EN32KHZ);
}

/*
 * Helper functions
 */

static
uchar rtc_read (uchar reg)
{
	return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
}


static void rtc_write (uchar reg, uchar val)
{
	i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
}

#endif
Commit	Line	Data
0be62728 MK	1	/*
	2	* (C) Copyright 2006
	3	* Markus Klotzbuecher, mk@denx.de
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
0be62728 MK	6	*/
	7
	8	/*
	9	* Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
	10	* Extremly Accurate DS3231 Real Time Clock (RTC).
	11	*
	12	* copied from ds1337.c
	13	*/
	14
	15	#include <common.h>
	16	#include <command.h>
	17	#include <rtc.h>
	18	#include <i2c.h>
	19
871c18dd	20	#if defined(CONFIG_CMD_DATE)
0be62728	21
0be62728 MK	22	/*
	23	* RTC register addresses
	24	*/
	25	#define RTC_SEC_REG_ADDR 0x0
	26	#define RTC_MIN_REG_ADDR 0x1
	27	#define RTC_HR_REG_ADDR 0x2
	28	#define RTC_DAY_REG_ADDR 0x3
	29	#define RTC_DATE_REG_ADDR 0x4
	30	#define RTC_MON_REG_ADDR 0x5
	31	#define RTC_YR_REG_ADDR 0x6
	32	#define RTC_CTL_REG_ADDR 0x0e
	33	#define RTC_STAT_REG_ADDR 0x0f
	34
	35
	36	/*
	37	* RTC control register bits
	38	*/
	39	#define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */
	40	#define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */
	41	#define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */
	42	#define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */
	43	#define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */
	44	#define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */
	45
	46	/*
	47	* RTC status register bits
	48	*/
	49	#define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */
	50	#define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */
	51	#define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */
c340941e PJ	52	#define RTC_STAT_BIT_BB32KHZ 0x40 /* Battery backed 32KHz Output */
c340941e PJ	53	#define RTC_STAT_BIT_EN32KHZ 0x8 /* Enable 32KHz Output */
0be62728 MK	54
	55
	56	static uchar rtc_read (uchar reg);
	57	static void rtc_write (uchar reg, uchar val);
0be62728 MK	58
	59
	60	/*
	61	* Get the current time from the RTC
	62	*/
b73a19e1	63	int rtc_get (struct rtc_time *tmp)
0be62728	64	{
b73a19e1	65	int rel = 0;
0be62728 MK	66	uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
	67
	68	control = rtc_read (RTC_CTL_REG_ADDR);
	69	status = rtc_read (RTC_STAT_REG_ADDR);
	70	sec = rtc_read (RTC_SEC_REG_ADDR);
	71	min = rtc_read (RTC_MIN_REG_ADDR);
	72	hour = rtc_read (RTC_HR_REG_ADDR);
	73	wday = rtc_read (RTC_DAY_REG_ADDR);
	74	mday = rtc_read (RTC_DATE_REG_ADDR);
	75	mon_cent = rtc_read (RTC_MON_REG_ADDR);
	76	year = rtc_read (RTC_YR_REG_ADDR);
	77
397b40ca	78	debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
0be62728 MK	79	"hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
	80	year, mon_cent, mday, wday, hour, min, sec, control, status);
	81
	82	if (status & RTC_STAT_BIT_OSF) {
	83	printf ("### Warning: RTC oscillator has stopped\n");
	84	/* clear the OSF flag */
	85	rtc_write (RTC_STAT_REG_ADDR,
	86	rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
b73a19e1	87	rel = -1;
0be62728 MK	88	}
	89
	90	tmp->tm_sec = bcd2bin (sec & 0x7F);
	91	tmp->tm_min = bcd2bin (min & 0x7F);
	92	tmp->tm_hour = bcd2bin (hour & 0x3F);
	93	tmp->tm_mday = bcd2bin (mday & 0x3F);
	94	tmp->tm_mon = bcd2bin (mon_cent & 0x1F);
	95	tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900);
	96	tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
	97	tmp->tm_yday = 0;
	98	tmp->tm_isdst= 0;
	99
397b40ca	100	debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
0be62728 MK	101	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
0be62728 MK	102	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
b73a19e1 YT	103
b73a19e1 YT	104	return rel;
0be62728 MK	105	}
	106
	107
	108	/*
	109	* Set the RTC
	110	*/
d1e23194	111	int rtc_set (struct rtc_time *tmp)
0be62728 MK	112	{
	113	uchar century;
	114
397b40ca	115	debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
0be62728 MK	116	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	117	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
	118
	119	rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
	120
	121	century = (tmp->tm_year >= 2000) ? 0x80 : 0;
	122	rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) \| century);
	123
	124	rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
	125	rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
	126	rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
	127	rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
	128	rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
d1e23194 JCPV	129
d1e23194 JCPV	130	return 0;
0be62728 MK	131	}
	132
	133
	134	/*
	135	* Reset the RTC. We also enable the oscillator output on the
	136	* SQW/INTB* pin and program it for 32,768 Hz output. Note that
	137	* according to the datasheet, turning on the square wave output
	138	* increases the current drain on the backup battery from about
	139	* 600 nA to 2uA.
	140	*/
	141	void rtc_reset (void)
	142	{
	143	rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 \| RTC_CTL_BIT_RS2);
	144	}
	145
c340941e PJ	146	/*
	147	* Enable 32KHz output
	148	*/
	149	void rtc_enable_32khz_output(void)
	150	{
	151	rtc_write(RTC_STAT_REG_ADDR,
	152	RTC_STAT_BIT_BB32KHZ \| RTC_STAT_BIT_EN32KHZ);
	153	}
0be62728 MK	154
	155	/*
	156	* Helper functions
	157	*/
	158
	159	static
	160	uchar rtc_read (uchar reg)
	161	{
6d0f6bcf	162	return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
0be62728 MK	163	}
	164
	165
	166	static void rtc_write (uchar reg, uchar val)
	167	{
6d0f6bcf	168	i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
0be62728 MK	169	}
0be62728 MK	170
a593814f	171	#endif