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Commit | Line | Data |
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e85390dc WD |
1 | /* |
2 | * COM1 NS16550 support | |
a47a12be | 3 | * originally from linux source (arch/powerpc/boot/ns16550.c) |
6d0f6bcf | 4 | * modified to use CONFIG_SYS_ISA_MEM and new defines |
e85390dc WD |
5 | */ |
6 | ||
fa54eb12 | 7 | #include <common.h> |
12e431b2 SG |
8 | #include <dm.h> |
9 | #include <errno.h> | |
10 | #include <fdtdec.h> | |
e85390dc | 11 | #include <ns16550.h> |
12e431b2 | 12 | #include <serial.h> |
a1b322a9 | 13 | #include <watchdog.h> |
167cdad1 GR |
14 | #include <linux/types.h> |
15 | #include <asm/io.h> | |
e85390dc | 16 | |
12e431b2 SG |
17 | DECLARE_GLOBAL_DATA_PTR; |
18 | ||
200779e3 DZ |
19 | #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */ |
20 | #define UART_MCRVAL (UART_MCR_DTR | \ | |
21 | UART_MCR_RTS) /* RTS/DTR */ | |
22 | #define UART_FCRVAL (UART_FCR_FIFO_EN | \ | |
23 | UART_FCR_RXSR | \ | |
24 | UART_FCR_TXSR) /* Clear & enable FIFOs */ | |
12e431b2 SG |
25 | |
26 | #ifndef CONFIG_DM_SERIAL | |
167cdad1 | 27 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
f8df9d0d SG |
28 | #define serial_out(x, y) outb(x, (ulong)y) |
29 | #define serial_in(y) inb((ulong)y) | |
79df1208 | 30 | #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0) |
f8df9d0d SG |
31 | #define serial_out(x, y) out_be32(y, x) |
32 | #define serial_in(y) in_be32(y) | |
79df1208 | 33 | #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0) |
f8df9d0d SG |
34 | #define serial_out(x, y) out_le32(y, x) |
35 | #define serial_in(y) in_le32(y) | |
167cdad1 | 36 | #else |
f8df9d0d SG |
37 | #define serial_out(x, y) writeb(x, y) |
38 | #define serial_in(y) readb(y) | |
167cdad1 | 39 | #endif |
12e431b2 | 40 | #endif /* !CONFIG_DM_SERIAL */ |
e85390dc | 41 | |
7c387646 | 42 | #if defined(CONFIG_SOC_KEYSTONE) |
ef509b90 VA |
43 | #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 |
44 | #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0)) | |
d57dee57 KM |
45 | #undef UART_MCRVAL |
46 | #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL | |
47 | #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE) | |
48 | #else | |
49 | #define UART_MCRVAL (UART_MCR_RTS) | |
50 | #endif | |
ef509b90 VA |
51 | #endif |
52 | ||
a160ea0b PW |
53 | #ifndef CONFIG_SYS_NS16550_IER |
54 | #define CONFIG_SYS_NS16550_IER 0x00 | |
55 | #endif /* CONFIG_SYS_NS16550_IER */ | |
56 | ||
12e431b2 SG |
57 | #ifdef CONFIG_DM_SERIAL |
58 | static void ns16550_writeb(NS16550_t port, int offset, int value) | |
59 | { | |
60 | struct ns16550_platdata *plat = port->plat; | |
61 | unsigned char *addr; | |
62 | ||
63 | offset *= 1 << plat->reg_shift; | |
167efe01 | 64 | addr = map_sysmem(plat->base, 0) + offset; |
12e431b2 SG |
65 | /* |
66 | * As far as we know it doesn't make sense to support selection of | |
67 | * these options at run-time, so use the existing CONFIG options. | |
68 | */ | |
69 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED | |
70 | outb(value, addr); | |
71 | #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) | |
72 | out_le32(addr, value); | |
73 | #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) | |
74 | out_be32(addr, value); | |
75 | #elif defined(CONFIG_SYS_BIG_ENDIAN) | |
76 | writeb(value, addr + (1 << plat->reg_shift) - 1); | |
77 | #else | |
78 | writeb(value, addr); | |
79 | #endif | |
80 | } | |
81 | ||
82 | static int ns16550_readb(NS16550_t port, int offset) | |
83 | { | |
84 | struct ns16550_platdata *plat = port->plat; | |
85 | unsigned char *addr; | |
86 | ||
87 | offset *= 1 << plat->reg_shift; | |
167efe01 | 88 | addr = map_sysmem(plat->base, 0) + offset; |
12e431b2 SG |
89 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
90 | return inb(addr); | |
91 | #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) | |
92 | return in_le32(addr); | |
93 | #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) | |
94 | return in_be32(addr); | |
95 | #elif defined(CONFIG_SYS_BIG_ENDIAN) | |
96 | return readb(addr + (1 << plat->reg_shift) - 1); | |
97 | #else | |
98 | return readb(addr); | |
99 | #endif | |
100 | } | |
101 | ||
102 | /* We can clean these up once everything is moved to driver model */ | |
103 | #define serial_out(value, addr) \ | |
104 | ns16550_writeb(com_port, addr - (unsigned char *)com_port, value) | |
105 | #define serial_in(addr) \ | |
106 | ns16550_readb(com_port, addr - (unsigned char *)com_port) | |
107 | #endif | |
108 | ||
fa54eb12 SG |
109 | int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate) |
110 | { | |
111 | const unsigned int mode_x_div = 16; | |
112 | ||
113 | #ifdef CONFIG_OMAP1510 | |
114 | /* If can't cleanly clock 115200 set div to 1 */ | |
115 | if ((clock == 12000000) && (baudrate == 115200)) { | |
116 | port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */ | |
117 | return 1; /* return 1 for base divisor */ | |
118 | } | |
119 | port->osc_12m_sel = 0; /* clear if previsouly set */ | |
120 | #endif | |
121 | ||
122 | return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate); | |
123 | } | |
124 | ||
8bbe33c8 SG |
125 | static void NS16550_setbrg(NS16550_t com_port, int baud_divisor) |
126 | { | |
127 | serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); | |
128 | serial_out(baud_divisor & 0xff, &com_port->dll); | |
129 | serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); | |
130 | serial_out(UART_LCRVAL, &com_port->lcr); | |
131 | } | |
132 | ||
f8df9d0d | 133 | void NS16550_init(NS16550_t com_port, int baud_divisor) |
e85390dc | 134 | { |
fd2aeac5 MH |
135 | #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_OMAP34XX)) |
136 | /* | |
137 | * On some OMAP3 devices when UART3 is configured for boot mode before | |
138 | * SPL starts only THRE bit is set. We have to empty the transmitter | |
139 | * before initialization starts. | |
140 | */ | |
141 | if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE)) | |
142 | == UART_LSR_THRE) { | |
12e431b2 SG |
143 | if (baud_divisor != -1) |
144 | NS16550_setbrg(com_port, baud_divisor); | |
fd2aeac5 MH |
145 | serial_out(0, &com_port->mdr1); |
146 | } | |
147 | #endif | |
148 | ||
cb55b332 SW |
149 | while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT)) |
150 | ; | |
151 | ||
a160ea0b | 152 | serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); |
456ccfdf TR |
153 | #if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \ |
154 | defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) | |
167cdad1 | 155 | serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ |
945af8d7 | 156 | #endif |
8bbe33c8 | 157 | NS16550_setbrg(com_port, 0); |
167cdad1 GR |
158 | serial_out(UART_MCRVAL, &com_port->mcr); |
159 | serial_out(UART_FCRVAL, &com_port->fcr); | |
12e431b2 SG |
160 | if (baud_divisor != -1) |
161 | NS16550_setbrg(com_port, baud_divisor); | |
8ac22a60 | 162 | #if defined(CONFIG_OMAP) || \ |
6213a68f | 163 | defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \ |
9ed6e412 | 164 | defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) |
5289e83a | 165 | |
f8df9d0d SG |
166 | /* /16 is proper to hit 115200 with 48MHz */ |
167 | serial_out(0, &com_port->mdr1); | |
b4746d8b | 168 | #endif /* CONFIG_OMAP */ |
7c387646 | 169 | #if defined(CONFIG_SOC_KEYSTONE) |
ef509b90 VA |
170 | serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC); |
171 | #endif | |
e85390dc WD |
172 | } |
173 | ||
f5675aa5 | 174 | #ifndef CONFIG_NS16550_MIN_FUNCTIONS |
f8df9d0d | 175 | void NS16550_reinit(NS16550_t com_port, int baud_divisor) |
e85390dc | 176 | { |
a160ea0b | 177 | serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); |
8bbe33c8 | 178 | NS16550_setbrg(com_port, 0); |
167cdad1 GR |
179 | serial_out(UART_MCRVAL, &com_port->mcr); |
180 | serial_out(UART_FCRVAL, &com_port->fcr); | |
8bbe33c8 | 181 | NS16550_setbrg(com_port, baud_divisor); |
e85390dc | 182 | } |
f5675aa5 | 183 | #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ |
e85390dc | 184 | |
f8df9d0d | 185 | void NS16550_putc(NS16550_t com_port, char c) |
e85390dc | 186 | { |
f8df9d0d SG |
187 | while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0) |
188 | ; | |
167cdad1 | 189 | serial_out(c, &com_port->thr); |
1a2d9b30 SR |
190 | |
191 | /* | |
192 | * Call watchdog_reset() upon newline. This is done here in putc | |
193 | * since the environment code uses a single puts() to print the complete | |
194 | * environment upon "printenv". So we can't put this watchdog call | |
195 | * in puts(). | |
196 | */ | |
197 | if (c == '\n') | |
198 | WATCHDOG_RESET(); | |
e85390dc WD |
199 | } |
200 | ||
f5675aa5 | 201 | #ifndef CONFIG_NS16550_MIN_FUNCTIONS |
f8df9d0d | 202 | char NS16550_getc(NS16550_t com_port) |
e85390dc | 203 | { |
167cdad1 | 204 | while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) { |
f2041388 | 205 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY) |
232c150a WD |
206 | extern void usbtty_poll(void); |
207 | usbtty_poll(); | |
208 | #endif | |
a1b322a9 | 209 | WATCHDOG_RESET(); |
232c150a | 210 | } |
167cdad1 | 211 | return serial_in(&com_port->rbr); |
e85390dc WD |
212 | } |
213 | ||
f8df9d0d | 214 | int NS16550_tstc(NS16550_t com_port) |
e85390dc | 215 | { |
f8df9d0d | 216 | return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0; |
e85390dc WD |
217 | } |
218 | ||
f5675aa5 | 219 | #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ |
12e431b2 SG |
220 | |
221 | #ifdef CONFIG_DM_SERIAL | |
222 | static int ns16550_serial_putc(struct udevice *dev, const char ch) | |
223 | { | |
224 | struct NS16550 *const com_port = dev_get_priv(dev); | |
225 | ||
226 | if (!(serial_in(&com_port->lsr) & UART_LSR_THRE)) | |
227 | return -EAGAIN; | |
228 | serial_out(ch, &com_port->thr); | |
229 | ||
230 | /* | |
231 | * Call watchdog_reset() upon newline. This is done here in putc | |
232 | * since the environment code uses a single puts() to print the complete | |
233 | * environment upon "printenv". So we can't put this watchdog call | |
234 | * in puts(). | |
235 | */ | |
236 | if (ch == '\n') | |
237 | WATCHDOG_RESET(); | |
238 | ||
239 | return 0; | |
240 | } | |
241 | ||
242 | static int ns16550_serial_pending(struct udevice *dev, bool input) | |
243 | { | |
244 | struct NS16550 *const com_port = dev_get_priv(dev); | |
245 | ||
246 | if (input) | |
247 | return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0; | |
248 | else | |
249 | return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1; | |
250 | } | |
251 | ||
252 | static int ns16550_serial_getc(struct udevice *dev) | |
253 | { | |
254 | struct NS16550 *const com_port = dev_get_priv(dev); | |
255 | ||
aea2be20 | 256 | if (!(serial_in(&com_port->lsr) & UART_LSR_DR)) |
12e431b2 SG |
257 | return -EAGAIN; |
258 | ||
259 | return serial_in(&com_port->rbr); | |
260 | } | |
261 | ||
262 | static int ns16550_serial_setbrg(struct udevice *dev, int baudrate) | |
263 | { | |
264 | struct NS16550 *const com_port = dev_get_priv(dev); | |
265 | struct ns16550_platdata *plat = com_port->plat; | |
266 | int clock_divisor; | |
267 | ||
268 | clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate); | |
269 | ||
270 | NS16550_setbrg(com_port, clock_divisor); | |
271 | ||
272 | return 0; | |
273 | } | |
274 | ||
275 | int ns16550_serial_probe(struct udevice *dev) | |
276 | { | |
277 | struct NS16550 *const com_port = dev_get_priv(dev); | |
278 | ||
279 | NS16550_init(com_port, -1); | |
280 | ||
281 | return 0; | |
282 | } | |
283 | ||
284 | int ns16550_serial_ofdata_to_platdata(struct udevice *dev) | |
285 | { | |
286 | struct NS16550 *const com_port = dev_get_priv(dev); | |
287 | struct ns16550_platdata *plat = dev->platdata; | |
288 | fdt_addr_t addr; | |
289 | ||
290 | addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg"); | |
291 | if (addr == FDT_ADDR_T_NONE) | |
292 | return -EINVAL; | |
293 | ||
167efe01 | 294 | plat->base = addr; |
12e431b2 SG |
295 | plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset, |
296 | "reg-shift", 1); | |
297 | com_port->plat = plat; | |
298 | ||
299 | return 0; | |
300 | } | |
301 | ||
302 | const struct dm_serial_ops ns16550_serial_ops = { | |
303 | .putc = ns16550_serial_putc, | |
304 | .pending = ns16550_serial_pending, | |
305 | .getc = ns16550_serial_getc, | |
306 | .setbrg = ns16550_serial_setbrg, | |
307 | }; | |
308 | #endif /* CONFIG_DM_SERIAL */ |