[people/ms/u-boot.git] / drivers / serial / ns16550.c

/*
 * COM1 NS16550 support
 * originally from linux source (arch/powerpc/boot/ns16550.c)
 * modified to use CONFIG_SYS_ISA_MEM and new defines
 */

#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
#include <ns16550.h>
#include <serial.h>
#include <watchdog.h>
#include <linux/types.h>
#include <asm/io.h>

DECLARE_GLOBAL_DATA_PTR;

#define UART_LCRVAL UART_LCR_8N1		/* 8 data, 1 stop, no parity */
#define UART_MCRVAL (UART_MCR_DTR | \
		     UART_MCR_RTS)		/* RTS/DTR */

#ifndef CONFIG_DM_SERIAL
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
#define serial_out(x, y)	outb(x, (ulong)y)
#define serial_in(y)		inb((ulong)y)
#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
#define serial_out(x, y)	out_be32(y, x)
#define serial_in(y)		in_be32(y)
#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
#define serial_out(x, y)	out_le32(y, x)
#define serial_in(y)		in_le32(y)
#else
#define serial_out(x, y)	writeb(x, y)
#define serial_in(y)		readb(y)
#endif
#endif /* !CONFIG_DM_SERIAL */

#if defined(CONFIG_SOC_KEYSTONE)
#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE   0
#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
#undef UART_MCRVAL
#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
#define UART_MCRVAL             (UART_MCR_RTS | UART_MCR_AFE)
#else
#define UART_MCRVAL             (UART_MCR_RTS)
#endif
#endif

#ifndef CONFIG_SYS_NS16550_IER
#define CONFIG_SYS_NS16550_IER  0x00
#endif /* CONFIG_SYS_NS16550_IER */

static inline void serial_out_shift(void *addr, int shift, int value)
{
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
	outb(value, (ulong)addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
	out_le32(addr, value);
#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	out_be32(addr, value);
#elif defined(CONFIG_SYS_NS16550_MEM32)
	writel(value, addr);
#elif defined(CONFIG_SYS_BIG_ENDIAN)
	writeb(value, addr + (1 << shift) - 1);
#else
	writeb(value, addr);
#endif
}

static inline int serial_in_shift(void *addr, int shift)
{
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
	return inb((ulong)addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
	return in_le32(addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	return in_be32(addr);
#elif defined(CONFIG_SYS_NS16550_MEM32)
	return readl(addr);
#elif defined(CONFIG_SYS_BIG_ENDIAN)
	return readb(addr + (1 << shift) - 1);
#else
	return readb(addr);
#endif
}

#ifdef CONFIG_DM_SERIAL

#ifndef CONFIG_SYS_NS16550_CLK
#define CONFIG_SYS_NS16550_CLK  0
#endif

static void ns16550_writeb(NS16550_t port, int offset, int value)
{
	struct ns16550_platdata *plat = port->plat;
	unsigned char *addr;

	offset *= 1 << plat->reg_shift;
	addr = (unsigned char *)plat->base + offset;

	/*
	 * As far as we know it doesn't make sense to support selection of
	 * these options at run-time, so use the existing CONFIG options.
	 */
	serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
}

static int ns16550_readb(NS16550_t port, int offset)
{
	struct ns16550_platdata *plat = port->plat;
	unsigned char *addr;

	offset *= 1 << plat->reg_shift;
	addr = (unsigned char *)plat->base + offset;

	return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
}

static u32 ns16550_getfcr(NS16550_t port)
{
	struct ns16550_platdata *plat = port->plat;

	return plat->fcr;
}

/* We can clean these up once everything is moved to driver model */
#define serial_out(value, addr)	\
	ns16550_writeb(com_port, \
		(unsigned char *)addr - (unsigned char *)com_port, value)
#define serial_in(addr) \
	ns16550_readb(com_port, \
		(unsigned char *)addr - (unsigned char *)com_port)
#else
static u32 ns16550_getfcr(NS16550_t port)
{
	return UART_FCR_DEFVAL;
}
#endif

int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
{
	const unsigned int mode_x_div = 16;

	return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
}

static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
{
	serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
	serial_out(baud_divisor & 0xff, &com_port->dll);
	serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
	serial_out(UART_LCRVAL, &com_port->lcr);
}

void NS16550_init(NS16550_t com_port, int baud_divisor)
{
#if (defined(CONFIG_SPL_BUILD) && \
		(defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
	/*
	 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
	 * before SPL starts only THRE bit is set. We have to empty the
	 * transmitter before initialization starts.
	 */
	if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
	     == UART_LSR_THRE) {
		if (baud_divisor != -1)
			NS16550_setbrg(com_port, baud_divisor);
		serial_out(0, &com_port->mdr1);
	}
#endif

	while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
		;

	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
#if defined(CONFIG_ARCH_OMAP2PLUS)
	serial_out(0x7, &com_port->mdr1);	/* mode select reset TL16C750*/
#endif
	serial_out(UART_MCRVAL, &com_port->mcr);
	serial_out(ns16550_getfcr(com_port), &com_port->fcr);
	if (baud_divisor != -1)
		NS16550_setbrg(com_port, baud_divisor);
#if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX)
	/* /16 is proper to hit 115200 with 48MHz */
	serial_out(0, &com_port->mdr1);
#endif
#if defined(CONFIG_SOC_KEYSTONE)
	serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
#endif
}

#ifndef CONFIG_NS16550_MIN_FUNCTIONS
void NS16550_reinit(NS16550_t com_port, int baud_divisor)
{
	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
	NS16550_setbrg(com_port, 0);
	serial_out(UART_MCRVAL, &com_port->mcr);
	serial_out(ns16550_getfcr(com_port), &com_port->fcr);
	NS16550_setbrg(com_port, baud_divisor);
}
#endif /* CONFIG_NS16550_MIN_FUNCTIONS */

void NS16550_putc(NS16550_t com_port, char c)
{
	while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
		;
	serial_out(c, &com_port->thr);

	/*
	 * Call watchdog_reset() upon newline. This is done here in putc
	 * since the environment code uses a single puts() to print the complete
	 * environment upon "printenv". So we can't put this watchdog call
	 * in puts().
	 */
	if (c == '\n')
		WATCHDOG_RESET();
}

#ifndef CONFIG_NS16550_MIN_FUNCTIONS
char NS16550_getc(NS16550_t com_port)
{
	while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
		extern void usbtty_poll(void);
		usbtty_poll();
#endif
		WATCHDOG_RESET();
	}
	return serial_in(&com_port->rbr);
}

int NS16550_tstc(NS16550_t com_port)
{
	return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
}

#endif /* CONFIG_NS16550_MIN_FUNCTIONS */

#ifdef CONFIG_DEBUG_UART_NS16550

#include <debug_uart.h>

static inline void _debug_uart_init(void)
{
	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
	int baud_divisor;

	/*
	 * We copy the code from above because it is already horribly messy.
	 * Trying to refactor to nicely remove the duplication doesn't seem
	 * feasible. The better fix is to move all users of this driver to
	 * driver model.
	 */
	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
					    CONFIG_BAUDRATE);
	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
	serial_dout(&com_port->mcr, UART_MCRVAL);
	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);

	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
	serial_dout(&com_port->dll, baud_divisor & 0xff);
	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
	serial_dout(&com_port->lcr, UART_LCRVAL);
}

static inline void _debug_uart_putc(int ch)
{
	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;

	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
		;
	serial_dout(&com_port->thr, ch);
}

DEBUG_UART_FUNCS

#endif

#ifdef CONFIG_DEBUG_UART_OMAP

#include <debug_uart.h>

static inline void _debug_uart_init(void)
{
	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
	int baud_divisor;

	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
					    CONFIG_BAUDRATE);
	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
	serial_dout(&com_port->mdr1, 0x7);
	serial_dout(&com_port->mcr, UART_MCRVAL);
	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);

	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
	serial_dout(&com_port->dll, baud_divisor & 0xff);
	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
	serial_dout(&com_port->lcr, UART_LCRVAL);
	serial_dout(&com_port->mdr1, 0x0);
}

static inline void _debug_uart_putc(int ch)
{
	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;

	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
		;
	serial_dout(&com_port->thr, ch);
}

DEBUG_UART_FUNCS

#endif

#ifdef CONFIG_DM_SERIAL
static int ns16550_serial_putc(struct udevice *dev, const char ch)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
		return -EAGAIN;
	serial_out(ch, &com_port->thr);

	/*
	 * Call watchdog_reset() upon newline. This is done here in putc
	 * since the environment code uses a single puts() to print the complete
	 * environment upon "printenv". So we can't put this watchdog call
	 * in puts().
	 */
	if (ch == '\n')
		WATCHDOG_RESET();

	return 0;
}

static int ns16550_serial_pending(struct udevice *dev, bool input)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	if (input)
		return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0;
	else
		return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1;
}

static int ns16550_serial_getc(struct udevice *dev)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
		return -EAGAIN;

	return serial_in(&com_port->rbr);
}

static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
{
	struct NS16550 *const com_port = dev_get_priv(dev);
	struct ns16550_platdata *plat = com_port->plat;
	int clock_divisor;

	clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);

	NS16550_setbrg(com_port, clock_divisor);

	return 0;
}

int ns16550_serial_probe(struct udevice *dev)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	com_port->plat = dev_get_platdata(dev);
	NS16550_init(com_port, -1);

	return 0;
}

#if CONFIG_IS_ENABLED(OF_CONTROL)
enum {
	PORT_NS16550 = 0,
	PORT_JZ4780,
};
#endif

#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
{
	struct ns16550_platdata *plat = dev->platdata;
	const u32 port_type = dev_get_driver_data(dev);
	fdt_addr_t addr;
	struct clk clk;
	int err;

	/* try Processor Local Bus device first */
	addr = dev_read_addr(dev);
#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
	if (addr == FDT_ADDR_T_NONE) {
		/* then try pci device */
		struct fdt_pci_addr pci_addr;
		u32 bar;
		int ret;

		/* we prefer to use a memory-mapped register */
		ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev),
					  FDT_PCI_SPACE_MEM32, "reg",
					  &pci_addr);
		if (ret) {
			/* try if there is any i/o-mapped register */
			ret = fdtdec_get_pci_addr(gd->fdt_blob,
						  dev_of_offset(dev),
						  FDT_PCI_SPACE_IO,
						  "reg", &pci_addr);
			if (ret)
				return ret;
		}

		ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
		if (ret)
			return ret;

		addr = bar;
	}
#endif

	if (addr == FDT_ADDR_T_NONE)
		return -EINVAL;

#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
	plat->base = addr;
#else
	plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
#endif

	plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
	plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);

	err = clk_get_by_index(dev, 0, &clk);
	if (!err) {
		err = clk_get_rate(&clk);
		if (!IS_ERR_VALUE(err))
			plat->clock = err;
	} else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
		debug("ns16550 failed to get clock\n");
		return err;
	}

	if (!plat->clock)
		plat->clock = dev_read_u32_default(dev, "clock-frequency",
						   CONFIG_SYS_NS16550_CLK);
	if (!plat->clock) {
		debug("ns16550 clock not defined\n");
		return -EINVAL;
	}

	plat->fcr = UART_FCR_DEFVAL;
	if (port_type == PORT_JZ4780)
		plat->fcr |= UART_FCR_UME;

	return 0;
}
#endif

const struct dm_serial_ops ns16550_serial_ops = {
	.putc = ns16550_serial_putc,
	.pending = ns16550_serial_pending,
	.getc = ns16550_serial_getc,
	.setbrg = ns16550_serial_setbrg,
};

#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
/*
 * Please consider existing compatible strings before adding a new
 * one to keep this table compact. Or you may add a generic "ns16550"
 * compatible string to your dts.
 */
static const struct udevice_id ns16550_serial_ids[] = {
	{ .compatible = "ns16550",		.data = PORT_NS16550 },
	{ .compatible = "ns16550a",		.data = PORT_NS16550 },
	{ .compatible = "ingenic,jz4780-uart",	.data = PORT_JZ4780  },
	{ .compatible = "nvidia,tegra20-uart",	.data = PORT_NS16550 },
	{ .compatible = "snps,dw-apb-uart",	.data = PORT_NS16550 },
	{ .compatible = "ti,omap2-uart",	.data = PORT_NS16550 },
	{ .compatible = "ti,omap3-uart",	.data = PORT_NS16550 },
	{ .compatible = "ti,omap4-uart",	.data = PORT_NS16550 },
	{ .compatible = "ti,am3352-uart",	.data = PORT_NS16550 },
	{ .compatible = "ti,am4372-uart",	.data = PORT_NS16550 },
	{ .compatible = "ti,dra742-uart",	.data = PORT_NS16550 },
	{}
};
#endif /* OF_CONTROL && !OF_PLATDATA */

#if CONFIG_IS_ENABLED(SERIAL_PRESENT)

/* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
#if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
U_BOOT_DRIVER(ns16550_serial) = {
	.name	= "ns16550_serial",
	.id	= UCLASS_SERIAL,
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
	.of_match = ns16550_serial_ids,
	.ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
	.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
#endif
	.priv_auto_alloc_size = sizeof(struct NS16550),
	.probe = ns16550_serial_probe,
	.ops	= &ns16550_serial_ops,
	.flags	= DM_FLAG_PRE_RELOC,
};
#endif
#endif /* SERIAL_PRESENT */

#endif /* CONFIG_DM_SERIAL */
Commit	Line	Data
e85390dc WD	1	/*
e85390dc WD	2	* COM1 NS16550 support
a47a12be	3	* originally from linux source (arch/powerpc/boot/ns16550.c)
6d0f6bcf	4	* modified to use CONFIG_SYS_ISA_MEM and new defines
e85390dc WD	5	*/
e85390dc WD	6
fa54eb12	7	#include <common.h>
50fce1d5	8	#include <clk.h>
12e431b2 SG	9	#include <dm.h>
12e431b2 SG	10	#include <errno.h>
e85390dc	11	#include <ns16550.h>
12e431b2	12	#include <serial.h>
a1b322a9	13	#include <watchdog.h>
167cdad1 GR	14	#include <linux/types.h>
167cdad1 GR	15	#include <asm/io.h>
e85390dc	16
12e431b2 SG	17	DECLARE_GLOBAL_DATA_PTR;
12e431b2 SG	18
200779e3 DZ	19	#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
	20	#define UART_MCRVAL (UART_MCR_DTR \| \
	21	UART_MCR_RTS) /* RTS/DTR */
12e431b2 SG	22
12e431b2 SG	23	#ifndef CONFIG_DM_SERIAL
167cdad1	24	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
f8df9d0d SG	25	#define serial_out(x, y) outb(x, (ulong)y)
f8df9d0d SG	26	#define serial_in(y) inb((ulong)y)
79df1208	27	#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
f8df9d0d SG	28	#define serial_out(x, y) out_be32(y, x)
f8df9d0d SG	29	#define serial_in(y) in_be32(y)
79df1208	30	#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
f8df9d0d SG	31	#define serial_out(x, y) out_le32(y, x)
f8df9d0d SG	32	#define serial_in(y) in_le32(y)
167cdad1	33	#else
f8df9d0d SG	34	#define serial_out(x, y) writeb(x, y)
f8df9d0d SG	35	#define serial_in(y) readb(y)
167cdad1	36	#endif
12e431b2	37	#endif /* !CONFIG_DM_SERIAL */
e85390dc	38
7c387646	39	#if defined(CONFIG_SOC_KEYSTONE)
ef509b90 VA	40	#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
ef509b90 VA	41	#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) \| (1 << 13) \| (1 << 0))
d57dee57 KM	42	#undef UART_MCRVAL
	43	#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
	44	#define UART_MCRVAL (UART_MCR_RTS \| UART_MCR_AFE)
	45	#else
	46	#define UART_MCRVAL (UART_MCR_RTS)
	47	#endif
ef509b90 VA	48	#endif
ef509b90 VA	49
a160ea0b PW	50	#ifndef CONFIG_SYS_NS16550_IER
	51	#define CONFIG_SYS_NS16550_IER 0x00
	52	#endif /* CONFIG_SYS_NS16550_IER */
	53
363e6da1	54	static inline void serial_out_shift(void *addr, int shift, int value)
76571674	55	{
12e431b2	56	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
1f77690e	57	outb(value, (ulong)addr);
78b7d37b	58	#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
12e431b2 SG	59	out_le32(addr, value);
	60	#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	61	out_be32(addr, value);
90914008 SG	62	#elif defined(CONFIG_SYS_NS16550_MEM32)
90914008 SG	63	writel(value, addr);
12e431b2	64	#elif defined(CONFIG_SYS_BIG_ENDIAN)
76571674	65	writeb(value, addr + (1 << shift) - 1);
12e431b2 SG	66	#else
	67	writeb(value, addr);
	68	#endif
	69	}
	70
363e6da1	71	static inline int serial_in_shift(void *addr, int shift)
12e431b2	72	{
12e431b2	73	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
1f77690e	74	return inb((ulong)addr);
78b7d37b	75	#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
12e431b2 SG	76	return in_le32(addr);
	77	#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	78	return in_be32(addr);
90914008 SG	79	#elif defined(CONFIG_SYS_NS16550_MEM32)
90914008 SG	80	return readl(addr);
12e431b2	81	#elif defined(CONFIG_SYS_BIG_ENDIAN)
20379c11	82	return readb(addr + (1 << shift) - 1);
12e431b2 SG	83	#else
	84	return readb(addr);
	85	#endif
	86	}
	87
fa4ce723 MV	88	#ifdef CONFIG_DM_SERIAL
	89
	90	#ifndef CONFIG_SYS_NS16550_CLK
	91	#define CONFIG_SYS_NS16550_CLK 0
	92	#endif
	93
76571674 SG	94	static void ns16550_writeb(NS16550_t port, int offset, int value)
	95	{
	96	struct ns16550_platdata *plat = port->plat;
	97	unsigned char *addr;
	98
	99	offset *= 1 << plat->reg_shift;
df8ec55d PB	100	addr = (unsigned char *)plat->base + offset;
df8ec55d PB	101
76571674 SG	102	/*
	103	* As far as we know it doesn't make sense to support selection of
	104	* these options at run-time, so use the existing CONFIG options.
	105	*/
59b35ddd	106	serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
76571674 SG	107	}
	108
	109	static int ns16550_readb(NS16550_t port, int offset)
	110	{
	111	struct ns16550_platdata *plat = port->plat;
	112	unsigned char *addr;
	113
	114	offset *= 1 << plat->reg_shift;
df8ec55d	115	addr = (unsigned char *)plat->base + offset;
76571674	116
59b35ddd	117	return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
76571674 SG	118	}
76571674 SG	119
65f83802 MV	120	static u32 ns16550_getfcr(NS16550_t port)
	121	{
	122	struct ns16550_platdata *plat = port->plat;
	123
	124	return plat->fcr;
	125	}
	126
12e431b2 SG	127	/* We can clean these up once everything is moved to driver model */
12e431b2 SG	128	#define serial_out(value, addr) \
363e6da1 SG	129	ns16550_writeb(com_port, \
363e6da1 SG	130	(unsigned char )addr - (unsigned char )com_port, value)
12e431b2	131	#define serial_in(addr) \
363e6da1 SG	132	ns16550_readb(com_port, \
363e6da1 SG	133	(unsigned char )addr - (unsigned char )com_port)
65f83802 MV	134	#else
	135	static u32 ns16550_getfcr(NS16550_t port)
	136	{
17fa0326	137	return UART_FCR_DEFVAL;
65f83802	138	}
12e431b2 SG	139	#endif
12e431b2 SG	140
03c6f176	141	int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
fa54eb12 SG	142	{
	143	const unsigned int mode_x_div = 16;
	144
21d00436 SG	145	return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
	146	}
	147
8bbe33c8 SG	148	static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
	149	{
	150	serial_out(UART_LCR_BKSE \| UART_LCRVAL, &com_port->lcr);
	151	serial_out(baud_divisor & 0xff, &com_port->dll);
	152	serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
	153	serial_out(UART_LCRVAL, &com_port->lcr);
	154	}
	155
f8df9d0d	156	void NS16550_init(NS16550_t com_port, int baud_divisor)
e85390dc	157	{
956a8bae GG	158	#if (defined(CONFIG_SPL_BUILD) && \
956a8bae GG	159	(defined(CONFIG_OMAP34XX) \|\| defined(CONFIG_OMAP44XX)))
fd2aeac5	160	/*
956a8bae GG	161	* On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
	162	* before SPL starts only THRE bit is set. We have to empty the
	163	* transmitter before initialization starts.
fd2aeac5 MH	164	*/
	165	if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT \| UART_LSR_THRE))
	166	== UART_LSR_THRE) {
12e431b2 SG	167	if (baud_divisor != -1)
12e431b2 SG	168	NS16550_setbrg(com_port, baud_divisor);
fd2aeac5 MH	169	serial_out(0, &com_port->mdr1);
	170	}
	171	#endif
	172
cb55b332 SW	173	while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
	174	;
	175
a160ea0b	176	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
89024ddc	177	#if defined(CONFIG_ARCH_OMAP2PLUS)
167cdad1	178	serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
945af8d7	179	#endif
167cdad1	180	serial_out(UART_MCRVAL, &com_port->mcr);
65f83802	181	serial_out(ns16550_getfcr(com_port), &com_port->fcr);
12e431b2 SG	182	if (baud_divisor != -1)
12e431b2 SG	183	NS16550_setbrg(com_port, baud_divisor);
89024ddc	184	#if defined(CONFIG_ARCH_OMAP2PLUS) \|\| defined(CONFIG_SOC_DA8XX)
f8df9d0d SG	185	/* /16 is proper to hit 115200 with 48MHz */
f8df9d0d SG	186	serial_out(0, &com_port->mdr1);
89024ddc	187	#endif
7c387646	188	#if defined(CONFIG_SOC_KEYSTONE)
ef509b90 VA	189	serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
ef509b90 VA	190	#endif
e85390dc WD	191	}
e85390dc WD	192
f5675aa5	193	#ifndef CONFIG_NS16550_MIN_FUNCTIONS
f8df9d0d	194	void NS16550_reinit(NS16550_t com_port, int baud_divisor)
e85390dc	195	{
a160ea0b	196	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
8bbe33c8	197	NS16550_setbrg(com_port, 0);
167cdad1	198	serial_out(UART_MCRVAL, &com_port->mcr);
65f83802	199	serial_out(ns16550_getfcr(com_port), &com_port->fcr);
8bbe33c8	200	NS16550_setbrg(com_port, baud_divisor);
e85390dc	201	}
f5675aa5	202	#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
e85390dc	203
f8df9d0d	204	void NS16550_putc(NS16550_t com_port, char c)
e85390dc	205	{
f8df9d0d SG	206	while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
f8df9d0d SG	207	;
167cdad1	208	serial_out(c, &com_port->thr);
1a2d9b30 SR	209
	210	/*
	211	* Call watchdog_reset() upon newline. This is done here in putc
	212	* since the environment code uses a single puts() to print the complete
	213	* environment upon "printenv". So we can't put this watchdog call
	214	* in puts().
	215	*/
	216	if (c == '\n')
	217	WATCHDOG_RESET();
e85390dc WD	218	}
e85390dc WD	219
f5675aa5	220	#ifndef CONFIG_NS16550_MIN_FUNCTIONS
f8df9d0d	221	char NS16550_getc(NS16550_t com_port)
e85390dc	222	{
167cdad1	223	while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
f2041388	224	#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
232c150a WD	225	extern void usbtty_poll(void);
	226	usbtty_poll();
	227	#endif
a1b322a9	228	WATCHDOG_RESET();
232c150a	229	}
167cdad1	230	return serial_in(&com_port->rbr);
e85390dc WD	231	}
e85390dc WD	232
f8df9d0d	233	int NS16550_tstc(NS16550_t com_port)
e85390dc	234	{
f8df9d0d	235	return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
e85390dc WD	236	}
e85390dc WD	237
f5675aa5	238	#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
12e431b2	239
21d00436 SG	240	#ifdef CONFIG_DEBUG_UART_NS16550
	241
	242	#include <debug_uart.h>
	243
97b05973	244	static inline void _debug_uart_init(void)
21d00436 SG	245	{
	246	struct NS16550 com_port = (struct NS16550 )CONFIG_DEBUG_UART_BASE;
	247	int baud_divisor;
	248
	249	/*
	250	* We copy the code from above because it is already horribly messy.
	251	* Trying to refactor to nicely remove the duplication doesn't seem
	252	* feasible. The better fix is to move all users of this driver to
	253	* driver model.
	254	*/
03c6f176 MV	255	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
03c6f176 MV	256	CONFIG_BAUDRATE);
6e780c7a SG	257	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
6e780c7a SG	258	serial_dout(&com_port->mcr, UART_MCRVAL);
17fa0326	259	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
6e780c7a SG	260
	261	serial_dout(&com_port->lcr, UART_LCR_BKSE \| UART_LCRVAL);
	262	serial_dout(&com_port->dll, baud_divisor & 0xff);
	263	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
	264	serial_dout(&com_port->lcr, UART_LCRVAL);
21d00436 SG	265	}
	266
	267	static inline void _debug_uart_putc(int ch)
	268	{
	269	struct NS16550 com_port = (struct NS16550 )CONFIG_DEBUG_UART_BASE;
	270
6e780c7a	271	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
21d00436	272	;
6e780c7a	273	serial_dout(&com_port->thr, ch);
21d00436 SG	274	}
	275
	276	DEBUG_UART_FUNCS
	277
	278	#endif
	279
a52cf086 LV	280	#ifdef CONFIG_DEBUG_UART_OMAP
	281
	282	#include <debug_uart.h>
	283
	284	static inline void _debug_uart_init(void)
	285	{
	286	struct NS16550 com_port = (struct NS16550 )CONFIG_DEBUG_UART_BASE;
	287	int baud_divisor;
	288
	289	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
	290	CONFIG_BAUDRATE);
	291	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
	292	serial_dout(&com_port->mdr1, 0x7);
	293	serial_dout(&com_port->mcr, UART_MCRVAL);
	294	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
	295
	296	serial_dout(&com_port->lcr, UART_LCR_BKSE \| UART_LCRVAL);
	297	serial_dout(&com_port->dll, baud_divisor & 0xff);
	298	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
	299	serial_dout(&com_port->lcr, UART_LCRVAL);
	300	serial_dout(&com_port->mdr1, 0x0);
	301	}
	302
	303	static inline void _debug_uart_putc(int ch)
	304	{
	305	struct NS16550 com_port = (struct NS16550 )CONFIG_DEBUG_UART_BASE;
	306
	307	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
	308	;
	309	serial_dout(&com_port->thr, ch);
	310	}
	311
	312	DEBUG_UART_FUNCS
	313
	314	#endif
	315
12e431b2 SG	316	#ifdef CONFIG_DM_SERIAL
	317	static int ns16550_serial_putc(struct udevice *dev, const char ch)
	318	{
	319	struct NS16550 *const com_port = dev_get_priv(dev);
	320
	321	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
	322	return -EAGAIN;
	323	serial_out(ch, &com_port->thr);
	324
	325	/*
	326	* Call watchdog_reset() upon newline. This is done here in putc
	327	* since the environment code uses a single puts() to print the complete
	328	* environment upon "printenv". So we can't put this watchdog call
	329	* in puts().
	330	*/
	331	if (ch == '\n')
	332	WATCHDOG_RESET();
	333
	334	return 0;
	335	}
	336
	337	static int ns16550_serial_pending(struct udevice *dev, bool input)
	338	{
	339	struct NS16550 *const com_port = dev_get_priv(dev);
	340
	341	if (input)
4dbf9bed	342	return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0;
12e431b2	343	else
4dbf9bed	344	return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1;
12e431b2 SG	345	}
	346
	347	static int ns16550_serial_getc(struct udevice *dev)
	348	{
7fded0ce SR	349	struct NS16550 *const com_port = dev_get_priv(dev);
	350
	351	if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
12e431b2 SG	352	return -EAGAIN;
12e431b2 SG	353
7fded0ce	354	return serial_in(&com_port->rbr);
12e431b2 SG	355	}
	356
	357	static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
	358	{
	359	struct NS16550 *const com_port = dev_get_priv(dev);
	360	struct ns16550_platdata *plat = com_port->plat;
	361	int clock_divisor;
	362
	363	clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
	364
	365	NS16550_setbrg(com_port, clock_divisor);
	366
	367	return 0;
	368	}
	369
	370	int ns16550_serial_probe(struct udevice *dev)
	371	{
	372	struct NS16550 *const com_port = dev_get_priv(dev);
	373
11c1a878	374	com_port->plat = dev_get_platdata(dev);
12e431b2 SG	375	NS16550_init(com_port, -1);
	376
	377	return 0;
	378	}
	379
79fd9281 MV	380	#if CONFIG_IS_ENABLED(OF_CONTROL)
	381	enum {
	382	PORT_NS16550 = 0,
0b060eef	383	PORT_JZ4780,
79fd9281 MV	384	};
	385	#endif
	386
b2927fba	387	#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
12e431b2 SG	388	int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
12e431b2 SG	389	{
12e431b2	390	struct ns16550_platdata *plat = dev->platdata;
0b060eef	391	const u32 port_type = dev_get_driver_data(dev);
12e431b2	392	fdt_addr_t addr;
021abf69 MY	393	struct clk clk;
021abf69 MY	394	int err;
12e431b2	395
3db886a5	396	/* try Processor Local Bus device first */
db9f8f6a	397	addr = dev_read_addr(dev);
fcc0a877	398	#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
3db886a5 BM	399	if (addr == FDT_ADDR_T_NONE) {
	400	/* then try pci device */
	401	struct fdt_pci_addr pci_addr;
	402	u32 bar;
	403	int ret;
	404
	405	/* we prefer to use a memory-mapped register */
e160f7d4	406	ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev),
3db886a5 BM	407	FDT_PCI_SPACE_MEM32, "reg",
	408	&pci_addr);
	409	if (ret) {
	410	/* try if there is any i/o-mapped register */
	411	ret = fdtdec_get_pci_addr(gd->fdt_blob,
e160f7d4	412	dev_of_offset(dev),
3db886a5 BM	413	FDT_PCI_SPACE_IO,
	414	"reg", &pci_addr);
	415	if (ret)
	416	return ret;
	417	}
	418
fcc0a877	419	ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
3db886a5 BM	420	if (ret)
	421	return ret;
	422
	423	addr = bar;
	424	}
	425	#endif
	426
12e431b2 SG	427	if (addr == FDT_ADDR_T_NONE)
	428	return -EINVAL;
	429
df8ec55d	430	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
167efe01	431	plat->base = addr;
df8ec55d PB	432	#else
	433	plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
	434	#endif
	435
3d40479f PT	436	plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
3d40479f PT	437	plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
50fce1d5 PB	438
	439	err = clk_get_by_index(dev, 0, &clk);
	440	if (!err) {
	441	err = clk_get_rate(&clk);
	442	if (!IS_ERR_VALUE(err))
	443	plat->clock = err;
ab895d6a	444	} else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
50fce1d5 PB	445	debug("ns16550 failed to get clock\n");
	446	return err;
	447	}
	448
	449	if (!plat->clock)
3d40479f PT	450	plat->clock = dev_read_u32_default(dev, "clock-frequency",
3d40479f PT	451	CONFIG_SYS_NS16550_CLK);
8e62d32e TC	452	if (!plat->clock) {
	453	debug("ns16550 clock not defined\n");
	454	return -EINVAL;
	455	}
12e431b2	456
17fa0326	457	plat->fcr = UART_FCR_DEFVAL;
0b060eef MV	458	if (port_type == PORT_JZ4780)
0b060eef MV	459	plat->fcr \|= UART_FCR_UME;
65f83802	460
12e431b2 SG	461	return 0;
12e431b2 SG	462	}
11c1a878	463	#endif
12e431b2 SG	464
	465	const struct dm_serial_ops ns16550_serial_ops = {
	466	.putc = ns16550_serial_putc,
	467	.pending = ns16550_serial_pending,
	468	.getc = ns16550_serial_getc,
	469	.setbrg = ns16550_serial_setbrg,
	470	};
8e62d32e	471
6f8c351e	472	#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
cc4228f9 TC	473	/*
	474	* Please consider existing compatible strings before adding a new
	475	* one to keep this table compact. Or you may add a generic "ns16550"
	476	* compatible string to your dts.
	477	*/
8e62d32e	478	static const struct udevice_id ns16550_serial_ids[] = {
79fd9281 MV	479	{ .compatible = "ns16550", .data = PORT_NS16550 },
79fd9281 MV	480	{ .compatible = "ns16550a", .data = PORT_NS16550 },
0b060eef	481	{ .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 },
79fd9281 MV	482	{ .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 },
	483	{ .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
	484	{ .compatible = "ti,omap2-uart", .data = PORT_NS16550 },
	485	{ .compatible = "ti,omap3-uart", .data = PORT_NS16550 },
	486	{ .compatible = "ti,omap4-uart", .data = PORT_NS16550 },
	487	{ .compatible = "ti,am3352-uart", .data = PORT_NS16550 },
	488	{ .compatible = "ti,am4372-uart", .data = PORT_NS16550 },
	489	{ .compatible = "ti,dra742-uart", .data = PORT_NS16550 },
8e62d32e TC	490	{}
8e62d32e TC	491	};
6f8c351e	492	#endif /* OF_CONTROL && !OF_PLATDATA */
8e62d32e	493
b7e29834	494	#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
6f8c351e AG	495
	496	/* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
	497	#if !defined(CONFIG_TPL_BUILD) \|\| defined(CONFIG_TPL_DM_SERIAL)
8e62d32e TC	498	U_BOOT_DRIVER(ns16550_serial) = {
	499	.name = "ns16550_serial",
	500	.id = UCLASS_SERIAL,
6f8c351e	501	#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
8e62d32e TC	502	.of_match = ns16550_serial_ids,
	503	.ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
	504	.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
	505	#endif
	506	.priv_auto_alloc_size = sizeof(struct NS16550),
	507	.probe = ns16550_serial_probe,
	508	.ops = &ns16550_serial_ops,
b7e5a643	509	.flags = DM_FLAG_PRE_RELOC,
8e62d32e	510	};
b7e29834	511	#endif
6f8c351e AG	512	#endif /* SERIAL_PRESENT */
6f8c351e AG	513
12e431b2	514	#endif /* CONFIG_DM_SERIAL */