[people/ms/u-boot.git] / drivers / serial / serial_xuartlite.c

/*
 * (C) Copyright 2008 - 2015 Michal Simek <monstr@monstr.eu>
 * Clean driver and add xilinx constant from header file
 *
 * (C) Copyright 2004 Atmark Techno, Inc.
 * Yasushi SHOJI <yashi@atmark-techno.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <config.h>
#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <linux/compiler.h>
#include <serial.h>

DECLARE_GLOBAL_DATA_PTR;

#define SR_TX_FIFO_FULL		BIT(3) /* transmit FIFO full */
#define SR_TX_FIFO_EMPTY	BIT(2) /* transmit FIFO empty */
#define SR_RX_FIFO_VALID_DATA	BIT(0) /* data in receive FIFO */
#define SR_RX_FIFO_FULL		BIT(1) /* receive FIFO full */

#define ULITE_CONTROL_RST_TX	0x01
#define ULITE_CONTROL_RST_RX	0x02

struct uartlite {
	unsigned int rx_fifo;
	unsigned int tx_fifo;
	unsigned int status;
	unsigned int control;
};

struct uartlite_platdata {
	struct uartlite *regs;
};

static int uartlite_serial_putc(struct udevice *dev, const char ch)
{
	struct uartlite_platdata *plat = dev_get_platdata(dev);
	struct uartlite *regs = plat->regs;

	if (in_be32(&regs->status) & SR_TX_FIFO_FULL)
		return -EAGAIN;

	out_be32(&regs->tx_fifo, ch & 0xff);

	return 0;
}

static int uartlite_serial_getc(struct udevice *dev)
{
	struct uartlite_platdata *plat = dev_get_platdata(dev);
	struct uartlite *regs = plat->regs;

	if (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
		return -EAGAIN;

	return in_be32(&regs->rx_fifo) & 0xff;
}

static int uartlite_serial_pending(struct udevice *dev, bool input)
{
	struct uartlite_platdata *plat = dev_get_platdata(dev);
	struct uartlite *regs = plat->regs;

	if (input)
		return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;

	return !(in_be32(&regs->status) & SR_TX_FIFO_EMPTY);
}

static int uartlite_serial_probe(struct udevice *dev)
{
	struct uartlite_platdata *plat = dev_get_platdata(dev);
	struct uartlite *regs = plat->regs;

	out_be32(&regs->control, 0);
	out_be32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
	in_be32(&regs->control);

	return 0;
}

static int uartlite_serial_ofdata_to_platdata(struct udevice *dev)
{
	struct uartlite_platdata *plat = dev_get_platdata(dev);

	plat->regs = (struct uartlite *)dev_get_addr(dev);

	return 0;
}

static const struct dm_serial_ops uartlite_serial_ops = {
	.putc = uartlite_serial_putc,
	.pending = uartlite_serial_pending,
	.getc = uartlite_serial_getc,
};

static const struct udevice_id uartlite_serial_ids[] = {
	{ .compatible = "xlnx,opb-uartlite-1.00.b", },
	{ .compatible = "xlnx,xps-uartlite-1.00.a" },
	{ }
};

U_BOOT_DRIVER(serial_uartlite) = {
	.name	= "serial_uartlite",
	.id	= UCLASS_SERIAL,
	.of_match = uartlite_serial_ids,
	.ofdata_to_platdata = uartlite_serial_ofdata_to_platdata,
	.platdata_auto_alloc_size = sizeof(struct uartlite_platdata),
	.probe = uartlite_serial_probe,
	.ops	= &uartlite_serial_ops,
	.flags = DM_FLAG_PRE_RELOC,
};

#ifdef CONFIG_DEBUG_UART_UARTLITE

#include <debug_uart.h>

static inline void _debug_uart_init(void)
{
	struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE;

	out_be32(&regs->control, 0);
	out_be32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
	in_be32(&regs->control);
}

static inline void _debug_uart_putc(int ch)
{
	struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE;

	while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
		;

	out_be32(&regs->tx_fifo, ch & 0xff);
}

DEBUG_UART_FUNCS
#endif
Commit	Line	Data
507bbe3e	1	/*
93768393	2	* (C) Copyright 2008 - 2015 Michal Simek <monstr@monstr.eu>
53ea981c	3	* Clean driver and add xilinx constant from header file
507bbe3e	4	*
53ea981c	5	* (C) Copyright 2004 Atmark Techno, Inc.
507bbe3e WD	6	* Yasushi SHOJI <yashi@atmark-techno.com>
507bbe3e WD	7	*
1a459660	8	* SPDX-License-Identifier: GPL-2.0+
507bbe3e WD	9	*/
	10
	11	#include <config.h>
49a23e4a	12	#include <common.h>
93768393	13	#include <dm.h>
53ea981c	14	#include <asm/io.h>
49a23e4a MS	15	#include <linux/compiler.h>
49a23e4a MS	16	#include <serial.h>
507bbe3e	17
93768393 MS	18	DECLARE_GLOBAL_DATA_PTR;
	19
	20	#define SR_TX_FIFO_FULL BIT(3) /* transmit FIFO full */
	21	#define SR_TX_FIFO_EMPTY BIT(2) /* transmit FIFO empty */
	22	#define SR_RX_FIFO_VALID_DATA BIT(0) /* data in receive FIFO */
	23	#define SR_RX_FIFO_FULL BIT(1) /* receive FIFO full */
507bbe3e	24
8c3bd6b5 MS	25	#define ULITE_CONTROL_RST_TX 0x01
	26	#define ULITE_CONTROL_RST_RX 0x02
	27
49a23e4a MS	28	struct uartlite {
	29	unsigned int rx_fifo;
	30	unsigned int tx_fifo;
	31	unsigned int status;
8c3bd6b5	32	unsigned int control;
49a23e4a MS	33	};
49a23e4a MS	34
93768393 MS	35	struct uartlite_platdata {
93768393 MS	36	struct uartlite *regs;
49a23e4a MS	37	};
49a23e4a MS	38
93768393	39	static int uartlite_serial_putc(struct udevice *dev, const char ch)
49a23e4a	40	{
93768393 MS	41	struct uartlite_platdata *plat = dev_get_platdata(dev);
93768393 MS	42	struct uartlite *regs = plat->regs;
49a23e4a	43
93768393 MS	44	if (in_be32(&regs->status) & SR_TX_FIFO_FULL)
93768393 MS	45	return -EAGAIN;
49a23e4a	46
93768393	47	out_be32(&regs->tx_fifo, ch & 0xff);
49a23e4a	48
93768393	49	return 0;
49a23e4a MS	50	}
49a23e4a MS	51
93768393	52	static int uartlite_serial_getc(struct udevice *dev)
49a23e4a	53	{
93768393 MS	54	struct uartlite_platdata *plat = dev_get_platdata(dev);
	55	struct uartlite *regs = plat->regs;
	56
	57	if (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
	58	return -EAGAIN;
49a23e4a	59
49a23e4a MS	60	return in_be32(&regs->rx_fifo) & 0xff;
	61	}
	62
93768393	63	static int uartlite_serial_pending(struct udevice *dev, bool input)
49a23e4a	64	{
93768393 MS	65	struct uartlite_platdata *plat = dev_get_platdata(dev);
93768393 MS	66	struct uartlite *regs = plat->regs;
507bbe3e	67
93768393 MS	68	if (input)
	69	return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
	70
	71	return !(in_be32(&regs->status) & SR_TX_FIFO_EMPTY);
49a23e4a MS	72	}
49a23e4a MS	73
93768393	74	static int uartlite_serial_probe(struct udevice *dev)
25239e12	75	{
93768393 MS	76	struct uartlite_platdata *plat = dev_get_platdata(dev);
93768393 MS	77	struct uartlite *regs = plat->regs;
8c3bd6b5	78
93768393 MS	79	out_be32(&regs->control, 0);
	80	out_be32(&regs->control, ULITE_CONTROL_RST_RX \| ULITE_CONTROL_RST_TX);
	81	in_be32(&regs->control);
25239e12	82
93768393	83	return 0;
90bad891	84	}
49a23e4a	85
93768393	86	static int uartlite_serial_ofdata_to_platdata(struct udevice *dev)
49a23e4a	87	{
93768393	88	struct uartlite_platdata *plat = dev_get_platdata(dev);
87d69229	89
93768393 MS	90	plat->regs = (struct uartlite *)dev_get_addr(dev);
	91
	92	return 0;
87d69229	93	}
93768393 MS	94
	95	static const struct dm_serial_ops uartlite_serial_ops = {
	96	.putc = uartlite_serial_putc,
	97	.pending = uartlite_serial_pending,
	98	.getc = uartlite_serial_getc,
	99	};
	100
	101	static const struct udevice_id uartlite_serial_ids[] = {
	102	{ .compatible = "xlnx,opb-uartlite-1.00.b", },
	103	{ .compatible = "xlnx,xps-uartlite-1.00.a" },
	104	{ }
	105	};
	106
	107	U_BOOT_DRIVER(serial_uartlite) = {
	108	.name = "serial_uartlite",
	109	.id = UCLASS_SERIAL,
	110	.of_match = uartlite_serial_ids,
	111	.ofdata_to_platdata = uartlite_serial_ofdata_to_platdata,
	112	.platdata_auto_alloc_size = sizeof(struct uartlite_platdata),
	113	.probe = uartlite_serial_probe,
	114	.ops = &uartlite_serial_ops,
	115	.flags = DM_FLAG_PRE_RELOC,
	116	};
4166ba3b MS	117
	118	#ifdef CONFIG_DEBUG_UART_UARTLITE
	119
	120	#include <debug_uart.h>
	121
	122	static inline void _debug_uart_init(void)
	123	{
	124	struct uartlite regs = (struct uartlite )CONFIG_DEBUG_UART_BASE;
	125
	126	out_be32(&regs->control, 0);
	127	out_be32(&regs->control, ULITE_CONTROL_RST_RX \| ULITE_CONTROL_RST_TX);
	128	in_be32(&regs->control);
	129	}
	130
	131	static inline void _debug_uart_putc(int ch)
	132	{
	133	struct uartlite regs = (struct uartlite )CONFIG_DEBUG_UART_BASE;
	134
	135	while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
	136	;
	137
	138	out_be32(&regs->tx_fifo, ch & 0xff);
	139	}
	140
	141	DEBUG_UART_FUNCS
	142	#endif