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[people/ms/u-boot.git] / drivers / spi / mpc8xxx_spi.c
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1/*
2 * Copyright (c) 2006 Ben Warren, Qstreams Networks Inc.
a47a12be 3 * With help from the common/soft_spi and arch/powerpc/cpu/mpc8260 drivers
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4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
8931ab17 25
d255bb0e 26#include <malloc.h>
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27#include <spi.h>
28#include <asm/mpc8xxx_spi.h>
29
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30#define SPI_EV_NE (0x80000000 >> 22) /* Receiver Not Empty */
31#define SPI_EV_NF (0x80000000 >> 23) /* Transmitter Not Full */
04a9e118 32
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33#define SPI_MODE_LOOP (0x80000000 >> 1) /* Loopback mode */
34#define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */
35#define SPI_MODE_MS (0x80000000 >> 6) /* Always master */
36#define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */
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37
38#define SPI_TIMEOUT 1000
39
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40struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
41 unsigned int max_hz, unsigned int mode)
42{
43 struct spi_slave *slave;
44
45 if (!spi_cs_is_valid(bus, cs))
46 return NULL;
47
48 slave = malloc(sizeof(struct spi_slave));
49 if (!slave)
50 return NULL;
51
52 slave->bus = bus;
53 slave->cs = cs;
54
55 /*
56 * TODO: Some of the code in spi_init() should probably move
57 * here, or into spi_claim_bus() below.
58 */
59
60 return slave;
61}
62
63void spi_free_slave(struct spi_slave *slave)
64{
65 free(slave);
66}
67
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68void spi_init(void)
69{
6d0f6bcf 70 volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
04a9e118 71
2956acd5 72 /*
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73 * SPI pins on the MPC83xx are not muxed, so all we do is initialize
74 * some registers
2956acd5 75 */
04a9e118 76 spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN;
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77 spi->mode = (spi->mode & 0xfff0ffff) | (1 << 16); /* Use SYSCLK / 8
78 (16.67MHz typ.) */
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79 spi->event = 0xffffffff; /* Clear all SPI events */
80 spi->mask = 0x00000000; /* Mask all SPI interrupts */
81 spi->com = 0; /* LST bit doesn't do anything, so disregard */
82}
83
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84int spi_claim_bus(struct spi_slave *slave)
85{
86 return 0;
87}
88
89void spi_release_bus(struct spi_slave *slave)
90{
91
92}
93
94int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
95 void *din, unsigned long flags)
04a9e118 96{
6d0f6bcf 97 volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
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98 unsigned int tmpdout, tmpdin, event;
99 int numBlks = bitlen / 32 + (bitlen % 32 ? 1 : 0);
100 int tm, isRead = 0;
101 unsigned char charSize = 32;
102
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103 debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
104 slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
04a9e118 105
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106 if (flags & SPI_XFER_BEGIN)
107 spi_cs_activate(slave);
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108
109 spi->event = 0xffffffff; /* Clear all SPI events */
110
111 /* handle data in 32-bit chunks */
112 while (numBlks--) {
113 tmpdout = 0;
114 charSize = (bitlen >= 32 ? 32 : bitlen);
115
116 /* Shift data so it's msb-justified */
117 tmpdout = *(u32 *) dout >> (32 - charSize);
118
119 /* The LEN field of the SPMODE register is set as follows:
120 *
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121 * Bit length setting
122 * len <= 4 3
123 * 4 < len <= 16 len - 1
124 * len > 16 0
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125 */
126
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127 if (bitlen <= 16) {
128 if (bitlen <= 4)
129 spi->mode = (spi->mode & 0xff0fffff) |
130 (3 << 20);
131 else
132 spi->mode = (spi->mode & 0xff0fffff) |
133 ((bitlen - 1) << 20);
134 } else {
135 spi->mode = (spi->mode & 0xff0fffff);
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136 /* Set up the next iteration if sending > 32 bits */
137 bitlen -= 32;
138 dout += 4;
139 }
140
141 spi->tx = tmpdout; /* Write the data out */
142 debug("*** spi_xfer: ... %08x written\n", tmpdout);
143
2956acd5 144 /*
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145 * Wait for SPI transmit to get out
146 * or time out (1 second = 1000 ms)
147 * The NE event must be read and cleared first
2956acd5 148 */
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149 for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) {
150 event = spi->event;
151 if (event & SPI_EV_NE) {
152 tmpdin = spi->rx;
153 spi->event |= SPI_EV_NE;
154 isRead = 1;
155
156 *(u32 *) din = (tmpdin << (32 - charSize));
157 if (charSize == 32) {
158 /* Advance output buffer by 32 bits */
159 din += 4;
160 }
161 }
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162 /*
163 * Only bail when we've had both NE and NF events.
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164 * This will cause timeouts on RO devices, so maybe
165 * in the future put an arbitrary delay after writing
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166 * the device. Arbitrary delays suck, though...
167 */
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168 if (isRead && (event & SPI_EV_NF))
169 break;
170 }
171 if (tm >= SPI_TIMEOUT)
172 puts("*** spi_xfer: Time out during SPI transfer");
173
174 debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin);
175 }
176
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177 if (flags & SPI_XFER_END)
178 spi_cs_deactivate(slave);
2956acd5 179
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180 return 0;
181}