[people/ms/u-boot.git] / drivers / usb / gadget / at91_udc.h

/*
 * Copyright (C) 2004 by Thomas Rathbone, HP Labs
 * Copyright (C) 2005 by Ivan Kokshaysky
 * Copyright (C) 2006 by SAN People
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef AT91_UDC_H
#define AT91_UDC_H

/*
 * USB Device Port (UDP) registers.
 * Based on AT91RM9200 datasheet revision E.
 */

#define AT91_UDP_FRM_NUM	0x00		/* Frame Number Register */
#define     AT91_UDP_NUM	(0x7ff <<  0)	/* Frame Number */
#define     AT91_UDP_FRM_ERR	(1     << 16)	/* Frame Error */
#define     AT91_UDP_FRM_OK	(1     << 17)	/* Frame OK */

#define AT91_UDP_GLB_STAT	0x04		/* Global State Register */
#define     AT91_UDP_FADDEN	(1 <<  0)	/* Function Address Enable */
#define     AT91_UDP_CONFG	(1 <<  1)	/* Configured */
#define     AT91_UDP_ESR	(1 <<  2)	/* Enable Send Resume */
#define     AT91_UDP_RSMINPR	(1 <<  3)	/* Resume has been sent */
#define     AT91_UDP_RMWUPE	(1 <<  4)	/* Remote Wake Up Enable */

#define AT91_UDP_FADDR		0x08		/* Function Address Register */
#define     AT91_UDP_FADD	(0x7f << 0)	/* Function Address Value */
#define     AT91_UDP_FEN	(1    << 8)	/* Function Enable */

#define AT91_UDP_IER		0x10		/* Interrupt Enable Register */
#define AT91_UDP_IDR		0x14		/* Interrupt Disable Register */
#define AT91_UDP_IMR		0x18		/* Interrupt Mask Register */

#define AT91_UDP_ISR		0x1c		/* Interrupt Status Register */
#define     AT91_UDP_EP(n)	(1 << (n))	/* Endpoint Interrupt Status */
#define     AT91_UDP_RXSUSP	(1 <<  8) 	/* USB Suspend Interrupt Status */
#define     AT91_UDP_RXRSM	(1 <<  9)	/* USB Resume Interrupt Status */
#define     AT91_UDP_EXTRSM	(1 << 10)	/* External Resume Interrupt Status [AT91RM9200 only] */
#define     AT91_UDP_SOFINT	(1 << 11)	/* Start of Frame Interrupt Status */
#define     AT91_UDP_ENDBUSRES	(1 << 12)	/* End of Bus Reset Interrupt Status */
#define     AT91_UDP_WAKEUP	(1 << 13)	/* USB Wakeup Interrupt Status [AT91RM9200 only] */

#define AT91_UDP_ICR		0x20		/* Interrupt Clear Register */
#define AT91_UDP_RST_EP		0x28		/* Reset Endpoint Register */

#define AT91_UDP_CSR(n)		(0x30+((n)*4))	/* Endpoint Control/Status Registers 0-7 */
#define     AT91_UDP_TXCOMP	(1 <<  0)	/* Generates IN packet with data previously written in DPR */
#define     AT91_UDP_RX_DATA_BK0 (1 <<  1)	/* Receive Data Bank 0 */
#define     AT91_UDP_RXSETUP	(1 <<  2)	/* Send STALL to the host */
#define     AT91_UDP_STALLSENT	(1 <<  3)	/* Stall Sent / Isochronous error (Isochronous endpoints) */
#define     AT91_UDP_TXPKTRDY	(1 <<  4)	/* Transmit Packet Ready */
#define     AT91_UDP_FORCESTALL	(1 <<  5)	/* Force Stall */
#define     AT91_UDP_RX_DATA_BK1 (1 <<  6)	/* Receive Data Bank 1 */
#define     AT91_UDP_DIR	(1 <<  7)	/* Transfer Direction */
#define     AT91_UDP_EPTYPE	(7 <<  8)	/* Endpoint Type */
#define		AT91_UDP_EPTYPE_CTRL		(0 <<  8)
#define		AT91_UDP_EPTYPE_ISO_OUT		(1 <<  8)
#define		AT91_UDP_EPTYPE_BULK_OUT	(2 <<  8)
#define		AT91_UDP_EPTYPE_INT_OUT		(3 <<  8)
#define		AT91_UDP_EPTYPE_ISO_IN		(5 <<  8)
#define		AT91_UDP_EPTYPE_BULK_IN		(6 <<  8)
#define		AT91_UDP_EPTYPE_INT_IN		(7 <<  8)
#define     AT91_UDP_DTGLE	(1 << 11)	/* Data Toggle */
#define     AT91_UDP_EPEDS	(1 << 15)	/* Endpoint Enable/Disable */
#define     AT91_UDP_RXBYTECNT	(0x7ff << 16)	/* Number of bytes in FIFO */

#define AT91_UDP_FDR(n)		(0x50+((n)*4))	/* Endpoint FIFO Data Registers 0-7 */

#define AT91_UDP_TXVC		0x74		/* Transceiver Control Register */
#define     AT91_UDP_TXVC_TXVDIS (1 << 8)	/* Transceiver Disable */
#define     AT91_UDP_TXVC_PUON   (1 << 9)	/* PullUp On [AT91SAM9260 only] */

/*-------------------------------------------------------------------------*/

/*
 * controller driver data structures
 */

#define	NUM_ENDPOINTS	6

/*
 * hardware won't disable bus reset, or resume while the controller
 * is suspended ... watching suspend helps keep the logic symmetric.
 */
#define	MINIMUS_INTERRUPTUS \
	(AT91_UDP_ENDBUSRES | AT91_UDP_RXRSM | AT91_UDP_RXSUSP)

struct at91_ep {
	struct usb_ep			ep;
	struct list_head		queue;
	struct at91_udc			*udc;
	void __iomem			*creg;

	unsigned			maxpacket:16;
	u8				int_mask;
	unsigned			is_pingpong:1;

	unsigned			stopped:1;
	unsigned			is_in:1;
	unsigned			is_iso:1;
	unsigned			fifo_bank:1;
};

struct at91_udc_caps {
	int (*init)(struct at91_udc *udc);
	void (*pullup)(struct at91_udc *udc, int is_on);
};

/*
 * driver is non-SMP, and just blocks IRQs whenever it needs
 * access protection for chip registers or driver state
 */
struct at91_udc {
	struct usb_gadget		gadget;
	struct at91_ep			ep[NUM_ENDPOINTS];
	struct usb_gadget_driver	*driver;
	const struct at91_udc_caps	*caps;
	unsigned			vbus:1;
	unsigned			enabled:1;
	unsigned			clocked:1;
	unsigned			suspended:1;
	unsigned			req_pending:1;
	unsigned			wait_for_addr_ack:1;
	unsigned			wait_for_config_ack:1;
	unsigned			selfpowered:1;
	unsigned			active_suspend:1;
	u8				addr;
	struct at91_udc_data		board;
	void __iomem			*udp_baseaddr;
	int				udp_irq;
	spinlock_t			lock;
	struct at91_matrix		*matrix;
};

static inline struct at91_udc *to_udc(struct usb_gadget *g)
{
	return container_of(g, struct at91_udc, gadget);
}

struct at91_request {
	struct usb_request		req;
	struct list_head		queue;
};

/*-------------------------------------------------------------------------*/

#ifdef VERBOSE_DEBUG
#    define VDBG		DBG
#else
#    define VDBG(stuff...)	do{}while(0)
#endif

#ifdef PACKET_TRACE
#    define PACKET		VDBG
#else
#    define PACKET(stuff...)	do{}while(0)
#endif

#define ERR(stuff...)		debug("udc: " stuff)
#define WARNING(stuff...)	debug("udc: " stuff)
#define INFO(stuff...)		debug("udc: " stuff)
#define DBG(stuff...)		debug("udc: " stuff)

#endif
Commit	Line	Data
8ea1fbf7 HS	1	/*
	2	* Copyright (C) 2004 by Thomas Rathbone, HP Labs
	3	* Copyright (C) 2005 by Ivan Kokshaysky
	4	* Copyright (C) 2006 by SAN People
	5	*
5b8031cc	6	* SPDX-License-Identifier: GPL-2.0+
8ea1fbf7 HS	7	*/
	8
	9	#ifndef AT91_UDC_H
	10	#define AT91_UDC_H
	11
	12	/*
	13	* USB Device Port (UDP) registers.
	14	* Based on AT91RM9200 datasheet revision E.
	15	*/
	16
	17	#define AT91_UDP_FRM_NUM 0x00 /* Frame Number Register */
	18	#define AT91_UDP_NUM (0x7ff << 0) /* Frame Number */
	19	#define AT91_UDP_FRM_ERR (1 << 16) /* Frame Error */
	20	#define AT91_UDP_FRM_OK (1 << 17) /* Frame OK */
	21
	22	#define AT91_UDP_GLB_STAT 0x04 /* Global State Register */
	23	#define AT91_UDP_FADDEN (1 << 0) /* Function Address Enable */
	24	#define AT91_UDP_CONFG (1 << 1) /* Configured */
	25	#define AT91_UDP_ESR (1 << 2) /* Enable Send Resume */
	26	#define AT91_UDP_RSMINPR (1 << 3) /* Resume has been sent */
	27	#define AT91_UDP_RMWUPE (1 << 4) /* Remote Wake Up Enable */
	28
	29	#define AT91_UDP_FADDR 0x08 /* Function Address Register */
	30	#define AT91_UDP_FADD (0x7f << 0) /* Function Address Value */
	31	#define AT91_UDP_FEN (1 << 8) /* Function Enable */
	32
	33	#define AT91_UDP_IER 0x10 /* Interrupt Enable Register */
	34	#define AT91_UDP_IDR 0x14 /* Interrupt Disable Register */
	35	#define AT91_UDP_IMR 0x18 /* Interrupt Mask Register */
	36
	37	#define AT91_UDP_ISR 0x1c /* Interrupt Status Register */
	38	#define AT91_UDP_EP(n) (1 << (n)) /* Endpoint Interrupt Status */
	39	#define AT91_UDP_RXSUSP (1 << 8) /* USB Suspend Interrupt Status */
	40	#define AT91_UDP_RXRSM (1 << 9) /* USB Resume Interrupt Status */
	41	#define AT91_UDP_EXTRSM (1 << 10) /* External Resume Interrupt Status [AT91RM9200 only] */
	42	#define AT91_UDP_SOFINT (1 << 11) /* Start of Frame Interrupt Status */
	43	#define AT91_UDP_ENDBUSRES (1 << 12) /* End of Bus Reset Interrupt Status */
	44	#define AT91_UDP_WAKEUP (1 << 13) /* USB Wakeup Interrupt Status [AT91RM9200 only] */
	45
	46	#define AT91_UDP_ICR 0x20 /* Interrupt Clear Register */
	47	#define AT91_UDP_RST_EP 0x28 /* Reset Endpoint Register */
	48
	49	#define AT91_UDP_CSR(n) (0x30+((n)4)) / Endpoint Control/Status Registers 0-7 */
	50	#define AT91_UDP_TXCOMP (1 << 0) /* Generates IN packet with data previously written in DPR */
	51	#define AT91_UDP_RX_DATA_BK0 (1 << 1) /* Receive Data Bank 0 */
	52	#define AT91_UDP_RXSETUP (1 << 2) /* Send STALL to the host */
	53	#define AT91_UDP_STALLSENT (1 << 3) /* Stall Sent / Isochronous error (Isochronous endpoints) */
	54	#define AT91_UDP_TXPKTRDY (1 << 4) /* Transmit Packet Ready */
	55	#define AT91_UDP_FORCESTALL (1 << 5) /* Force Stall */
	56	#define AT91_UDP_RX_DATA_BK1 (1 << 6) /* Receive Data Bank 1 */
	57	#define AT91_UDP_DIR (1 << 7) /* Transfer Direction */
	58	#define AT91_UDP_EPTYPE (7 << 8) /* Endpoint Type */
	59	#define AT91_UDP_EPTYPE_CTRL (0 << 8)
	60	#define AT91_UDP_EPTYPE_ISO_OUT (1 << 8)
	61	#define AT91_UDP_EPTYPE_BULK_OUT (2 << 8)
	62	#define AT91_UDP_EPTYPE_INT_OUT (3 << 8)
	63	#define AT91_UDP_EPTYPE_ISO_IN (5 << 8)
	64	#define AT91_UDP_EPTYPE_BULK_IN (6 << 8)
	65	#define AT91_UDP_EPTYPE_INT_IN (7 << 8)
	66	#define AT91_UDP_DTGLE (1 << 11) /* Data Toggle */
	67	#define AT91_UDP_EPEDS (1 << 15) /* Endpoint Enable/Disable */
	68	#define AT91_UDP_RXBYTECNT (0x7ff << 16) /* Number of bytes in FIFO */
	69
	70	#define AT91_UDP_FDR(n) (0x50+((n)4)) / Endpoint FIFO Data Registers 0-7 */
71
72	#define AT91_UDP_TXVC 0x74 /* Transceiver Control Register */
73	#define AT91_UDP_TXVC_TXVDIS (1 << 8) /* Transceiver Disable */
74	#define AT91_UDP_TXVC_PUON (1 << 9) /* PullUp On [AT91SAM9260 only] */
75
76	/-------------------------------------------------------------------------/
77
78	/*
79	* controller driver data structures
80	*/
81
82	#define NUM_ENDPOINTS 6
83
84	/*
85	* hardware won't disable bus reset, or resume while the controller
86	* is suspended ... watching suspend helps keep the logic symmetric.
87	*/
88	#define MINIMUS_INTERRUPTUS \
89	(AT91_UDP_ENDBUSRES \| AT91_UDP_RXRSM \| AT91_UDP_RXSUSP)
90
91	struct at91_ep {
92	struct usb_ep ep;
93	struct list_head queue;
94	struct at91_udc *udc;
95	void __iomem *creg;
96
97	unsigned maxpacket:16;
98	u8 int_mask;
99	unsigned is_pingpong:1;
100
101	unsigned stopped:1;
102	unsigned is_in:1;
103	unsigned is_iso:1;
104	unsigned fifo_bank:1;
105	};
106
107	struct at91_udc_caps {
108	int (init)(struct at91_udc udc);
109	void (pullup)(struct at91_udc udc, int is_on);
110	};
111
112	/*
113	* driver is non-SMP, and just blocks IRQs whenever it needs
114	* access protection for chip registers or driver state
115	*/
116	struct at91_udc {
117	struct usb_gadget gadget;
118	struct at91_ep ep[NUM_ENDPOINTS];
119	struct usb_gadget_driver *driver;
120	const struct at91_udc_caps *caps;
121	unsigned vbus:1;
122	unsigned enabled:1;
123	unsigned clocked:1;
124	unsigned suspended:1;
125	unsigned req_pending:1;
126	unsigned wait_for_addr_ack:1;
127	unsigned wait_for_config_ack:1;
62019767	128	unsigned selfpowered:1;
8ea1fbf7 HS	129	unsigned active_suspend:1;
	130	u8 addr;
	131	struct at91_udc_data board;
8ea1fbf7 HS	132	void __iomem *udp_baseaddr;
	133	int udp_irq;
	134	spinlock_t lock;
62019767	135	struct at91_matrix *matrix;
8ea1fbf7 HS	136	};
	137
	138	static inline struct at91_udc to_udc(struct usb_gadget g)
	139	{
	140	return container_of(g, struct at91_udc, gadget);
	141	}
	142
	143	struct at91_request {
	144	struct usb_request req;
	145	struct list_head queue;
	146	};
	147
	148	/-------------------------------------------------------------------------/
	149
	150	#ifdef VERBOSE_DEBUG
	151	# define VDBG DBG
	152	#else
	153	# define VDBG(stuff...) do{}while(0)
	154	#endif
	155
	156	#ifdef PACKET_TRACE
	157	# define PACKET VDBG
	158	#else
	159	# define PACKET(stuff...) do{}while(0)
	160	#endif
	161
62019767 HS	162	#define ERR(stuff...) debug("udc: " stuff)
	163	#define WARNING(stuff...) debug("udc: " stuff)
	164	#define INFO(stuff...) debug("udc: " stuff)
	165	#define DBG(stuff...) debug("udc: " stuff)
8ea1fbf7 HS	166
	167	#endif
	168