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1/*
2 * Copyright (C) 2006 by Bryan O'Donoghue, CodeHermit
386eda02 3 * bodonoghue@CodeHermit.ie
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4 *
5 * References
2731b9a8 6 * DasUBoot/drivers/usb/gadget/omap1510_udc.c, for design and implementation
7817cb20 7 * ideas.
16c8d5e7 8 *
1a459660 9 * SPDX-License-Identifier: GPL-2.0+
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10 */
11
12/*
13 * Notes :
386eda02 14 * 1. #define __SIMULATE_ERROR__ to inject a CRC error into every 2nd TX
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15 * packet to force the USB re-transmit protocol.
16 *
17 * 2. #define __DEBUG_UDC__ to switch on debug tracing to serial console
386eda02
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18 * be careful that tracing doesn't create Hiesen-bugs with respect to
19 * response timeouts to control requests.
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20 *
21 * 3. This driver should be able to support any higher level driver that
22 * that wants to do either of the two standard UDC implementations
23 * Control-Bulk-Interrupt or Bulk-IN/Bulk-Out standards. Hence
24 * gserial and cdc_acm should work with this code.
25 *
26 * 4. NAK events never actually get raised at all, the documentation
27 * is just wrong !
28 *
29 * 5. For some reason, cbd_datlen is *always* +2 the value it should be.
30 * this means that having an RX cbd of 16 bytes is not possible, since
386eda02 31 * the same size is reported for 14 bytes received as 16 bytes received
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32 * until we can find out why this happens, RX cbds must be limited to 8
33 * bytes. TODO: check errata for this behaviour.
34 *
35 * 6. Right now this code doesn't support properly powering up with the USB
386eda02
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36 * cable attached to the USB host my development board the Adder87x doesn't
37 * have a pull-up fitted to allow this, so it is necessary to power the
38 * board and *then* attached the USB cable to the host. However somebody
39 * with a different design in their board may be able to keep the cable
40 * constantly connected and simply enable/disable a pull-up re
41 * figure 31.1 in MPC885RM.pdf instead of having to power up the board and
42 * then attach the cable !
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43 *
44 */
45#include <common.h>
46#include <config.h>
16c8d5e7 47#include <commproc.h>
2731b9a8
JCPV
48#include <usbdevice.h>
49#include <usb/mpc8xx_udc.h>
50
51#include "ep0.h"
16c8d5e7 52
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53DECLARE_GLOBAL_DATA_PTR;
54
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55#define ERR(fmt, args...)\
56 serial_printf("ERROR : [%s] %s:%d: "fmt,\
57 __FILE__,__FUNCTION__,__LINE__, ##args)
58#ifdef __DEBUG_UDC__
386eda02 59#define DBG(fmt,args...)\
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60 serial_printf("[%s] %s:%d: "fmt,\
61 __FILE__,__FUNCTION__,__LINE__, ##args)
62#else
386eda02 63#define DBG(fmt,args...)
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64#endif
65
66/* Static Data */
67#ifdef __SIMULATE_ERROR__
386eda02 68static char err_poison_test = 0;
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69#endif
70static struct mpc8xx_ep ep_ref[MAX_ENDPOINTS];
71static u32 address_base = STATE_NOT_READY;
72static mpc8xx_udc_state_t udc_state = 0;
73static struct usb_device_instance *udc_device = 0;
386eda02
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74static volatile usb_epb_t *endpoints[MAX_ENDPOINTS];
75static volatile cbd_t *tx_cbd[TX_RING_SIZE];
76static volatile cbd_t *rx_cbd[RX_RING_SIZE];
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77static volatile immap_t *immr = 0;
78static volatile cpm8xx_t *cp = 0;
79static volatile usb_pram_t *usb_paramp = 0;
80static volatile usb_t *usbp = 0;
81static int rx_ct = 0;
82static int tx_ct = 0;
83
84/* Static Function Declarations */
85static void mpc8xx_udc_state_transition_up (usb_device_state_t initial,
386eda02 86 usb_device_state_t final);
16c8d5e7 87static void mpc8xx_udc_state_transition_down (usb_device_state_t initial,
386eda02 88 usb_device_state_t final);
16c8d5e7 89static void mpc8xx_udc_stall (unsigned int ep);
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90static void mpc8xx_udc_flush_tx_fifo (int epid);
91static void mpc8xx_udc_flush_rx_fifo (void);
16c8d5e7 92static void mpc8xx_udc_clear_rxbd (volatile cbd_t * rx_cbdp);
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93static void mpc8xx_udc_init_tx (struct usb_endpoint_instance *epi,
94 struct urb *tx_urb);
95static void mpc8xx_udc_dump_request (struct usb_device_request *request);
96static void mpc8xx_udc_clock_init (volatile immap_t * immr,
97 volatile cpm8xx_t * cp);
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98static int mpc8xx_udc_ep_tx (struct usb_endpoint_instance *epi);
99static int mpc8xx_udc_epn_rx (unsigned int epid, volatile cbd_t * rx_cbdp);
386eda02 100static void mpc8xx_udc_ep0_rx (volatile cbd_t * rx_cbdp);
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101static void mpc8xx_udc_cbd_init (void);
102static void mpc8xx_udc_endpoint_init (void);
103static void mpc8xx_udc_cbd_attach (int ep, uchar tx_size, uchar rx_size);
104static u32 mpc8xx_udc_alloc (u32 data_size, u32 alignment);
105static int mpc8xx_udc_ep0_rx_setup (volatile cbd_t * rx_cbdp);
106static void mpc8xx_udc_set_nak (unsigned int ep);
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107static short mpc8xx_udc_handle_txerr (void);
108static void mpc8xx_udc_advance_rx (volatile cbd_t ** rx_cbdp, int epid);
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109
110/******************************************************************************
386eda02 111 Global Linkage
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112 *****************************************************************************/
113
114/* udc_init
115 *
116 * Do initial bus gluing
117 */
386eda02 118int udc_init (void)
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119{
120 /* Init various pointers */
6d0f6bcf 121 immr = (immap_t *) CONFIG_SYS_IMMR;
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122 cp = (cpm8xx_t *) & (immr->im_cpm);
123 usb_paramp = (usb_pram_t *) & (cp->cp_dparam[PROFF_USB]);
124 usbp = (usb_t *) & (cp->cp_scc[0]);
125
126 memset (ep_ref, 0x00, (sizeof (struct mpc8xx_ep) * MAX_ENDPOINTS));
16c8d5e7 127
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128 udc_device = 0;
129 udc_state = STATE_NOT_READY;
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130
131 usbp->usmod = 0x00;
132 usbp->uscom = 0;
133
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134 /* Set USB Frame #0, Respond at Address & Get a clock source */
135 usbp->usaddr = 0x00;
136 mpc8xx_udc_clock_init (immr, cp);
386eda02 137
16c8d5e7 138 /* PA15, PA14 as perhiperal USBRXD and USBOE */
386eda02
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139 immr->im_ioport.iop_padir &= ~0x0003;
140 immr->im_ioport.iop_papar |= 0x0003;
141
16c8d5e7 142 /* PC11/PC10 as peripheral USBRXP USBRXN */
386eda02
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143 immr->im_ioport.iop_pcso |= 0x0030;
144
16c8d5e7 145 /* PC7/PC6 as perhiperal USBTXP and USBTXN */
386eda02
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146 immr->im_ioport.iop_pcdir |= 0x0300;
147 immr->im_ioport.iop_pcpar |= 0x0300;
148
16c8d5e7 149 /* Set the base address */
386eda02 150 address_base = (u32) (cp->cp_dpmem + CPM_USB_BASE);
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151
152 /* Initialise endpoints and circular buffers */
386eda02
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153 mpc8xx_udc_endpoint_init ();
154 mpc8xx_udc_cbd_init ();
155
16c8d5e7 156 /* Assign allocated Dual Port Endpoint descriptors */
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157 usb_paramp->ep0ptr = (u32) endpoints[0];
158 usb_paramp->ep1ptr = (u32) endpoints[1];
159 usb_paramp->ep2ptr = (u32) endpoints[2];
160 usb_paramp->ep3ptr = (u32) endpoints[3];
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161 usb_paramp->frame_n = 0;
162
386eda02
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163 DBG ("ep0ptr=0x%08x ep1ptr=0x%08x ep2ptr=0x%08x ep3ptr=0x%08x\n",
164 usb_paramp->ep0ptr, usb_paramp->ep1ptr, usb_paramp->ep2ptr,
165 usb_paramp->ep3ptr);
166
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167 return 0;
168}
169
170/* udc_irq
171 *
172 * Poll for whatever events may have occured
173 */
386eda02 174void udc_irq (void)
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175{
176 int epid = 0;
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177 volatile cbd_t *rx_cbdp = 0;
178 volatile cbd_t *rx_cbdp_base = 0;
16c8d5e7 179
386eda02 180 if (udc_state != STATE_READY) {
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181 return;
182 }
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183
184 if (usbp->usber & USB_E_BSY) {
16c8d5e7 185 /* This shouldn't happen. If it does then it's a bug ! */
386eda02
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186 usbp->usber |= USB_E_BSY;
187 mpc8xx_udc_flush_rx_fifo ();
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188 }
189
16c8d5e7 190 /* Scan all RX/Bidirectional Endpoints for RX data. */
386eda02
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191 for (epid = 0; epid < MAX_ENDPOINTS; epid++) {
192 if (!ep_ref[epid].prx) {
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193 continue;
194 }
16c8d5e7 195 rx_cbdp = rx_cbdp_base = ep_ref[epid].prx;
386eda02
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196
197 do {
198 if (!(rx_cbdp->cbd_sc & RX_BD_E)) {
199
200 if (rx_cbdp->cbd_sc & 0x1F) {
16c8d5e7 201 /* Corrupt data discard it.
386eda02 202 * Controller has NAK'd this packet.
16c8d5e7 203 */
386eda02 204 mpc8xx_udc_clear_rxbd (rx_cbdp);
16c8d5e7 205
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206 } else {
207 if (!epid) {
208 mpc8xx_udc_ep0_rx (rx_cbdp);
16c8d5e7 209
386eda02 210 } else {
16c8d5e7 211 /* Process data */
386eda02
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212 mpc8xx_udc_set_nak (epid);
213 mpc8xx_udc_epn_rx (epid, rx_cbdp);
214 mpc8xx_udc_clear_rxbd (rx_cbdp);
215 }
16c8d5e7 216 }
386eda02 217
16c8d5e7 218 /* Advance RX CBD pointer */
386eda02 219 mpc8xx_udc_advance_rx (&rx_cbdp, epid);
16c8d5e7 220 ep_ref[epid].prx = rx_cbdp;
386eda02 221 } else {
16c8d5e7 222 /* Advance RX CBD pointer */
386eda02 223 mpc8xx_udc_advance_rx (&rx_cbdp, epid);
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224 }
225
386eda02 226 } while (rx_cbdp != rx_cbdp_base);
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227 }
228
229 /* Handle TX events as appropiate, the correct place to do this is
230 * in a tx routine. Perhaps TX on epn was pre-empted by ep0
231 */
232
386eda02
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233 if (usbp->usber & USB_E_TXB) {
234 usbp->usber |= USB_E_TXB;
16c8d5e7 235 }
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236
237 if (usbp->usber & (USB_TX_ERRMASK)) {
238 mpc8xx_udc_handle_txerr ();
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239 }
240
241 /* Switch to the default state, respond at the default address */
386eda02
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242 if (usbp->usber & USB_E_RESET) {
243 usbp->usber |= USB_E_RESET;
244 usbp->usaddr = 0x00;
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245 udc_device->device_state = STATE_DEFAULT;
246 }
247
386eda02
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248 /* if(usbp->usber&USB_E_IDLE){
249 We could suspend here !
250 usbp->usber|=USB_E_IDLE;
251 DBG("idle state change\n");
252 }
253 if(usbp->usbs){
254 We could resume here when IDLE is deasserted !
255 Not worth doing, so long as we are self powered though.
256 }
257 */
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258
259 return;
260}
261
16c8d5e7
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262/* udc_endpoint_write
263 *
264 * Write some data to an endpoint
265 */
386eda02 266int udc_endpoint_write (struct usb_endpoint_instance *epi)
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267{
268 int ep = 0;
269 short epid = 1, unnak = 0, ret = 0;
270
386eda02
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271 if (udc_state != STATE_READY) {
272 ERR ("invalid udc_state != STATE_READY!\n");
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273 return -1;
274 }
275
386eda02 276 if (!udc_device || !epi) {
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277 return -1;
278 }
386eda02
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279
280 if (udc_device->device_state != STATE_CONFIGURED) {
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281 return -1;
282 }
283
284 ep = epi->endpoint_address & 0x03;
386eda02 285 if (ep >= MAX_ENDPOINTS) {
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286 return -1;
287 }
386eda02 288
16c8d5e7 289 /* Set NAK for all RX endpoints during TX */
386eda02 290 for (epid = 1; epid < MAX_ENDPOINTS; epid++) {
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291
292 /* Don't set NAK on DATA IN/CONTROL endpoints */
386eda02 293 if (ep_ref[epid].sc & USB_DIR_IN) {
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294 continue;
295 }
296
386eda02
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297 if (!(usbp->usep[epid] & (USEP_THS_NAK | USEP_RHS_NAK))) {
298 unnak |= 1 << epid;
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299 }
300
386eda02 301 mpc8xx_udc_set_nak (epid);
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302 }
303
386eda02
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304 mpc8xx_udc_init_tx (&udc_device->bus->endpoint_array[ep],
305 epi->tx_urb);
306 ret = mpc8xx_udc_ep_tx (&udc_device->bus->endpoint_array[ep]);
307
16c8d5e7 308 /* Remove temporary NAK */
386eda02
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309 for (epid = 1; epid < MAX_ENDPOINTS; epid++) {
310 if (unnak & (1 << epid)) {
311 udc_unset_nak (epid);
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312 }
313 }
386eda02 314
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315 return ret;
316}
317
318/* mpc8xx_udc_assign_urb
319 *
320 * Associate a given urb to an endpoint TX or RX transmit/receive buffers
321 */
386eda02 322static int mpc8xx_udc_assign_urb (int ep, char direction)
16c8d5e7
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323{
324 struct usb_endpoint_instance *epi = 0;
386eda02
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325
326 if (ep >= MAX_ENDPOINTS) {
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327 goto err;
328 }
329 epi = &udc_device->bus->endpoint_array[ep];
386eda02 330 if (!epi) {
16c8d5e7
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331 goto err;
332 }
333
386eda02
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334 if (!ep_ref[ep].urb) {
335 ep_ref[ep].urb = usbd_alloc_urb (udc_device, udc_device->bus->endpoint_array);
336 if (!ep_ref[ep].urb) {
16c8d5e7
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337 goto err;
338 }
386eda02 339 } else {
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340 ep_ref[ep].urb->actual_length = 0;
341 }
342
386eda02
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343 switch (direction) {
344 case USB_DIR_IN:
345 epi->tx_urb = ep_ref[ep].urb;
346 break;
347 case USB_DIR_OUT:
348 epi->rcv_urb = ep_ref[ep].urb;
349 break;
350 default:
351 goto err;
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352 }
353 return 0;
354
386eda02 355 err:
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356 udc_state = STATE_ERROR;
357 return -1;
358}
359
360/* udc_setup_ep
361 *
362 * Associate U-Boot software endpoints to mpc8xx endpoint parameter ram
363 * Isochronous endpoints aren't yet supported!
364 */
386eda02
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365void udc_setup_ep (struct usb_device_instance *device, unsigned int ep,
366 struct usb_endpoint_instance *epi)
16c8d5e7
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367{
368 uchar direction = 0;
369 int ep_attrib = 0;
370
386eda02 371 if (epi && (ep < MAX_ENDPOINTS)) {
16c8d5e7 372
386eda02
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373 if (ep == 0) {
374 if (epi->rcv_attributes != USB_ENDPOINT_XFER_CONTROL
375 || epi->tx_attributes !=
376 USB_ENDPOINT_XFER_CONTROL) {
377
378 /* ep0 must be a control endpoint */
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379 udc_state = STATE_ERROR;
380 return;
381
382 }
386eda02
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383 if (!(ep_ref[ep].sc & EP_ATTACHED)) {
384 mpc8xx_udc_cbd_attach (ep, epi->tx_packetSize,
385 epi->rcv_packetSize);
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386 }
387 usbp->usep[ep] = 0x0000;
388 return;
389 }
386eda02
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390
391 if ((epi->endpoint_address & USB_ENDPOINT_DIR_MASK)
392 == USB_DIR_IN) {
16c8d5e7
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393
394 direction = 1;
395 ep_attrib = epi->tx_attributes;
396 epi->rcv_packetSize = 0;
386eda02 397 ep_ref[ep].sc |= USB_DIR_IN;
16c8d5e7 398 } else {
386eda02 399
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400 direction = 0;
401 ep_attrib = epi->rcv_attributes;
386eda02 402 epi->tx_packetSize = 0;
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403 ep_ref[ep].sc &= ~USB_DIR_IN;
404 }
405
386eda02
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406 if (mpc8xx_udc_assign_urb (ep, epi->endpoint_address
407 & USB_ENDPOINT_DIR_MASK)) {
16c8d5e7
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408 return;
409 }
410
386eda02
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411 switch (ep_attrib) {
412 case USB_ENDPOINT_XFER_CONTROL:
413 if (!(ep_ref[ep].sc & EP_ATTACHED)) {
414 mpc8xx_udc_cbd_attach (ep,
415 epi->tx_packetSize,
416 epi->rcv_packetSize);
417 }
418 usbp->usep[ep] = ep << 12;
419 epi->rcv_urb = epi->tx_urb = ep_ref[ep].urb;
420
421 break;
422 case USB_ENDPOINT_XFER_BULK:
423 case USB_ENDPOINT_XFER_INT:
424 if (!(ep_ref[ep].sc & EP_ATTACHED)) {
425 if (direction) {
16c8d5e7 426 mpc8xx_udc_cbd_attach (ep,
386eda02
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427 epi->tx_packetSize,
428 0);
429 } else {
430 mpc8xx_udc_cbd_attach (ep,
431 0,
432 epi->rcv_packetSize);
16c8d5e7 433 }
386eda02
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434 }
435 usbp->usep[ep] = (ep << 12) | ((ep_attrib) << 8);
16c8d5e7 436
386eda02
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437 break;
438 case USB_ENDPOINT_XFER_ISOC:
439 default:
440 serial_printf ("Error endpoint attrib %d>3\n", ep_attrib);
441 udc_state = STATE_ERROR;
442 break;
16c8d5e7
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443 }
444 }
445
446}
447
448/* udc_connect
449 *
450 * Move state, switch on the USB
451 */
386eda02 452void udc_connect (void)
16c8d5e7 453{
386eda02 454 /* Enable pull-up resistor on D+
16c8d5e7
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455 * TODO: fit a pull-up resistor to drive SE0 for > 2.5us
456 */
386eda02
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457
458 if (udc_state != STATE_ERROR) {
16c8d5e7 459 udc_state = STATE_READY;
386eda02 460 usbp->usmod |= USMOD_EN;
16c8d5e7 461 }
386eda02 462}
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463
464/* udc_disconnect
465 *
466 * Disconnect is not used but, is included for completeness
467 */
386eda02 468void udc_disconnect (void)
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469{
470 /* Disable pull-up resistor on D-
471 * TODO: fix a pullup resistor to control this
472 */
473
386eda02 474 if (udc_state != STATE_ERROR) {
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475 udc_state = STATE_NOT_READY;
476 }
386eda02 477 usbp->usmod &= ~USMOD_EN;
16c8d5e7
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478}
479
480/* udc_enable
386eda02 481 *
16c8d5e7
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482 * Grab an EP0 URB, register interest in a subset of USB events
483 */
386eda02 484void udc_enable (struct usb_device_instance *device)
16c8d5e7 485{
386eda02 486 if (udc_state == STATE_ERROR) {
16c8d5e7
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487 return;
488 }
489
490 udc_device = device;
386eda02
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491
492 if (!ep_ref[0].urb) {
493 ep_ref[0].urb = usbd_alloc_urb (device, device->bus->endpoint_array);
16c8d5e7
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494 }
495
496 /* Register interest in all events except SOF, enable transceiver */
386eda02
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497 usbp->usber = 0x03FF;
498 usbp->usbmr = 0x02F7;
16c8d5e7
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499
500 return;
501}
502
503/* udc_disable
504 *
505 * disable the currently hooked device
506 */
386eda02 507void udc_disable (void)
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508{
509 int i = 0;
510
386eda02
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511 if (udc_state == STATE_ERROR) {
512 DBG ("Won't disable UDC. udc_state==STATE_ERROR !\n");
16c8d5e7
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513 return;
514 }
515
516 udc_device = 0;
517
386eda02
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518 for (; i < MAX_ENDPOINTS; i++) {
519 if (ep_ref[i].urb) {
520 usbd_dealloc_urb (ep_ref[i].urb);
16c8d5e7
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521 ep_ref[i].urb = 0;
522 }
523 }
386eda02
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524
525 usbp->usbmr = 0x00;
526 usbp->usmod = ~USMOD_EN;
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527 udc_state = STATE_NOT_READY;
528}
529
530/* udc_startup_events
531 *
532 * Enable the specified device
533 */
386eda02 534void udc_startup_events (struct usb_device_instance *device)
16c8d5e7 535{
386eda02
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536 udc_enable (device);
537 if (udc_state == STATE_READY) {
16c8d5e7
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538 usbd_device_event_irq (device, DEVICE_CREATE, 0);
539 }
540}
541
542/* udc_set_nak
386eda02 543 *
16c8d5e7
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544 * Allow upper layers to signal lower layers should not accept more RX data
545 *
546 */
386eda02 547void udc_set_nak (int epid)
16c8d5e7 548{
386eda02
WD
549 if (epid) {
550 mpc8xx_udc_set_nak (epid);
16c8d5e7
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551 }
552}
553
386eda02
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554/* udc_unset_nak
555 *
16c8d5e7
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556 * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint.
557 * Switch off NAKing on this endpoint to accept more data output from host.
558 *
559 */
560void udc_unset_nak (int epid)
561{
386eda02 562 if (epid > MAX_ENDPOINTS) {
16c8d5e7
WD
563 return;
564 }
565
386eda02
WD
566 if (usbp->usep[epid] & (USEP_THS_NAK | USEP_RHS_NAK)) {
567 usbp->usep[epid] &= ~(USEP_THS_NAK | USEP_RHS_NAK);
16c8d5e7
WD
568 __asm__ ("eieio");
569 }
570}
571
572/******************************************************************************
386eda02 573 Static Linkage
16c8d5e7
WD
574******************************************************************************/
575
576/* udc_state_transition_up
577 * udc_state_transition_down
578 *
579 * Helper functions to implement device state changes. The device states and
580 * the events that transition between them are:
581 *
582 * STATE_ATTACHED
583 * || /\
584 * \/ ||
585 * DEVICE_HUB_CONFIGURED DEVICE_HUB_RESET
586 * || /\
587 * \/ ||
588 * STATE_POWERED
589 * || /\
590 * \/ ||
591 * DEVICE_RESET DEVICE_POWER_INTERRUPTION
592 * || /\
593 * \/ ||
594 * STATE_DEFAULT
595 * || /\
596 * \/ ||
597 * DEVICE_ADDRESS_ASSIGNED DEVICE_RESET
598 * || /\
599 * \/ ||
600 * STATE_ADDRESSED
601 * || /\
602 * \/ ||
603 * DEVICE_CONFIGURED DEVICE_DE_CONFIGURED
604 * || /\
605 * \/ ||
606 * STATE_CONFIGURED
607 *
608 * udc_state_transition_up transitions up (in the direction from STATE_ATTACHED
609 * to STATE_CONFIGURED) from the specified initial state to the specified final
610 * state, passing through each intermediate state on the way. If the initial
611 * state is at or above (i.e. nearer to STATE_CONFIGURED) the final state, then
612 * no state transitions will take place.
613 *
614 * udc_state_transition_down transitions down (in the direction from
615 * STATE_CONFIGURED to STATE_ATTACHED) from the specified initial state to the
616 * specified final state, passing through each intermediate state on the way.
617 * If the initial state is at or below (i.e. nearer to STATE_ATTACHED) the final
618 * state, then no state transitions will take place.
619 *
620 */
386eda02 621
16c8d5e7 622static void mpc8xx_udc_state_transition_up (usb_device_state_t initial,
386eda02
WD
623 usb_device_state_t final)
624{
16c8d5e7
WD
625 if (initial < final) {
626 switch (initial) {
627 case STATE_ATTACHED:
628 usbd_device_event_irq (udc_device,
629 DEVICE_HUB_CONFIGURED, 0);
630 if (final == STATE_POWERED)
631 break;
632 case STATE_POWERED:
633 usbd_device_event_irq (udc_device, DEVICE_RESET, 0);
634 if (final == STATE_DEFAULT)
635 break;
636 case STATE_DEFAULT:
637 usbd_device_event_irq (udc_device,
638 DEVICE_ADDRESS_ASSIGNED, 0);
639 if (final == STATE_ADDRESSED)
640 break;
641 case STATE_ADDRESSED:
642 usbd_device_event_irq (udc_device, DEVICE_CONFIGURED,
643 0);
644 case STATE_CONFIGURED:
645 break;
646 default:
647 break;
648 }
649 }
650}
651
652static void mpc8xx_udc_state_transition_down (usb_device_state_t initial,
386eda02 653 usb_device_state_t final)
16c8d5e7
WD
654{
655 if (initial > final) {
656 switch (initial) {
657 case STATE_CONFIGURED:
386eda02
WD
658 usbd_device_event_irq (udc_device,
659 DEVICE_DE_CONFIGURED, 0);
16c8d5e7
WD
660 if (final == STATE_ADDRESSED)
661 break;
662 case STATE_ADDRESSED:
663 usbd_device_event_irq (udc_device, DEVICE_RESET, 0);
664 if (final == STATE_DEFAULT)
665 break;
666 case STATE_DEFAULT:
386eda02
WD
667 usbd_device_event_irq (udc_device,
668 DEVICE_POWER_INTERRUPTION, 0);
16c8d5e7
WD
669 if (final == STATE_POWERED)
670 break;
671 case STATE_POWERED:
672 usbd_device_event_irq (udc_device, DEVICE_HUB_RESET,
386eda02 673 0);
16c8d5e7
WD
674 case STATE_ATTACHED:
675 break;
676 default:
677 break;
678 }
679 }
680}
681
682/* mpc8xx_udc_stall
683 *
684 * Force returning of STALL tokens on the given endpoint. Protocol or function
685 * STALL conditions are permissable here
686 */
687static void mpc8xx_udc_stall (unsigned int ep)
688{
689 usbp->usep[ep] |= STALL_BITMASK;
690}
691
692/* mpc8xx_udc_set_nak
693 *
694 * Force returning of NAK responses for the given endpoint as a kind of very
695 * simple flow control
386eda02 696 */
16c8d5e7
WD
697static void mpc8xx_udc_set_nak (unsigned int ep)
698{
699 usbp->usep[ep] |= NAK_BITMASK;
700 __asm__ ("eieio");
701}
702
703/* mpc8xx_udc_handle_txerr
704 *
705 * Handle errors relevant to TX. Return a status code to allow calling
706 * indicative of what if anything happened
707 */
386eda02 708static short mpc8xx_udc_handle_txerr ()
16c8d5e7
WD
709{
710 short ep = 0, ret = 0;
386eda02
WD
711
712 for (; ep < TX_RING_SIZE; ep++) {
713 if (usbp->usber & (0x10 << ep)) {
714
16c8d5e7 715 /* Timeout or underrun */
386eda02 716 if (tx_cbd[ep]->cbd_sc & 0x06) {
16c8d5e7 717 ret = 1;
386eda02 718 mpc8xx_udc_flush_tx_fifo (ep);
16c8d5e7 719
386eda02
WD
720 } else {
721 if (usbp->usep[ep] & STALL_BITMASK) {
722 if (!ep) {
723 usbp->usep[ep] &= ~STALL_BITMASK;
16c8d5e7 724 }
386eda02 725 } /* else NAK */
16c8d5e7 726 }
386eda02 727 usbp->usber |= (0x10 << ep);
16c8d5e7
WD
728 }
729 }
730 return ret;
731}
732
733/* mpc8xx_udc_advance_rx
734 *
735 * Advance cbd rx
736 */
386eda02 737static void mpc8xx_udc_advance_rx (volatile cbd_t ** rx_cbdp, int epid)
16c8d5e7 738{
386eda02 739 if ((*rx_cbdp)->cbd_sc & RX_BD_W) {
6d0f6bcf 740 *rx_cbdp = (volatile cbd_t *) (endpoints[epid]->rbase + CONFIG_SYS_IMMR);
386eda02
WD
741
742 } else {
16c8d5e7
WD
743 (*rx_cbdp)++;
744 }
745}
746
747
748/* mpc8xx_udc_flush_tx_fifo
749 *
750 * Flush a given TX fifo. Assumes one tx cbd per endpoint
751 */
386eda02
WD
752static void mpc8xx_udc_flush_tx_fifo (int epid)
753{
754 volatile cbd_t *tx_cbdp = 0;
16c8d5e7 755
386eda02 756 if (epid > MAX_ENDPOINTS) {
16c8d5e7
WD
757 return;
758 }
759
760 /* TX stop */
386eda02 761 immr->im_cpm.cp_cpcr = ((epid << 2) | 0x1D01);
16c8d5e7 762 __asm__ ("eieio");
386eda02
WD
763 while (immr->im_cpm.cp_cpcr & 0x01);
764
16c8d5e7 765 usbp->uscom = 0x40 | 0;
386eda02 766
16c8d5e7 767 /* reset ring */
6d0f6bcf 768 tx_cbdp = (cbd_t *) (endpoints[epid]->tbptr + CONFIG_SYS_IMMR);
16c8d5e7
WD
769 tx_cbdp->cbd_sc = (TX_BD_I | TX_BD_W);
770
386eda02 771
16c8d5e7 772 endpoints[epid]->tptr = endpoints[epid]->tbase;
386eda02
WD
773 endpoints[epid]->tstate = 0x00;
774 endpoints[epid]->tbcnt = 0x00;
16c8d5e7
WD
775
776 /* TX start */
386eda02 777 immr->im_cpm.cp_cpcr = ((epid << 2) | 0x2D01);
16c8d5e7 778 __asm__ ("eieio");
386eda02 779 while (immr->im_cpm.cp_cpcr & 0x01);
16c8d5e7
WD
780
781 return;
782}
783
784/* mpc8xx_udc_flush_rx_fifo
785 *
786 * For the sake of completeness of the namespace, it seems like
787 * a good-design-decision (tm) to include mpc8xx_udc_flush_rx_fifo();
788 * If RX_BD_E is true => a driver bug either here or in an upper layer
789 * not polling frequently enough. If RX_BD_E is true we have told the host
790 * we have accepted data but, the CPM found it had no-where to put that data
791 * which needless to say would be a bad thing.
792 */
386eda02 793static void mpc8xx_udc_flush_rx_fifo ()
16c8d5e7
WD
794{
795 int i = 0;
386eda02
WD
796
797 for (i = 0; i < RX_RING_SIZE; i++) {
798 if (!(rx_cbd[i]->cbd_sc & RX_BD_E)) {
799 ERR ("buf %p used rx data len = 0x%x sc=0x%x!\n",
800 rx_cbd[i], rx_cbd[i]->cbd_datlen,
801 rx_cbd[i]->cbd_sc);
16c8d5e7
WD
802
803 }
804 }
386eda02 805 ERR ("BUG : Input over-run\n");
16c8d5e7
WD
806}
807
808/* mpc8xx_udc_clear_rxbd
386eda02 809 *
16c8d5e7
WD
810 * Release control of RX CBD to CP.
811 */
386eda02 812static void mpc8xx_udc_clear_rxbd (volatile cbd_t * rx_cbdp)
16c8d5e7
WD
813{
814 rx_cbdp->cbd_datlen = 0x0000;
386eda02 815 rx_cbdp->cbd_sc = ((rx_cbdp->cbd_sc & RX_BD_W) | (RX_BD_E | RX_BD_I));
16c8d5e7
WD
816 __asm__ ("eieio");
817}
818
819/* mpc8xx_udc_tx_irq
820 *
821 * Parse for tx timeout, control RX or USB reset/busy conditions
822 * Return -1 on timeout, -2 on fatal error, else return zero
823 */
386eda02 824static int mpc8xx_udc_tx_irq (int ep)
16c8d5e7
WD
825{
826 int i = 0;
827
386eda02
WD
828 if (usbp->usber & (USB_TX_ERRMASK)) {
829 if (mpc8xx_udc_handle_txerr ()) {
16c8d5e7
WD
830 /* Timeout, controlling function must retry send */
831 return -1;
832 }
833 }
834
386eda02 835 if (usbp->usber & (USB_E_RESET | USB_E_BSY)) {
16c8d5e7
WD
836 /* Fatal, abandon TX transaction */
837 return -2;
838 }
386eda02
WD
839
840 if (usbp->usber & USB_E_RXB) {
841 for (i = 0; i < RX_RING_SIZE; i++) {
842 if (!(rx_cbd[i]->cbd_sc & RX_BD_E)) {
843 if ((rx_cbd[i] == ep_ref[0].prx) || ep) {
844 return -2;
16c8d5e7
WD
845 }
846 }
847 }
848 }
849
850 return 0;
851}
852
853/* mpc8xx_udc_ep_tx
854 *
855 * Transmit in a re-entrant fashion outbound USB packets.
856 * Implement retry/timeout mechanism described in USB specification
857 * Toggle DATA0/DATA1 pids as necessary
858 * Introduces non-standard tx_retry. The USB standard has no scope for slave
859 * devices to give up TX, however tx_retry stops us getting stuck in an endless
860 * TX loop.
861 */
386eda02 862static int mpc8xx_udc_ep_tx (struct usb_endpoint_instance *epi)
16c8d5e7
WD
863{
864 struct urb *urb = epi->tx_urb;
386eda02 865 volatile cbd_t *tx_cbdp = 0;
16c8d5e7
WD
866 unsigned int ep = 0, pkt_len = 0, x = 0, tx_retry = 0;
867 int ret = 0;
386eda02
WD
868
869 if (!epi || (epi->endpoint_address & 0x03) >= MAX_ENDPOINTS || !urb) {
16c8d5e7
WD
870 return -1;
871 }
872
873 ep = epi->endpoint_address & 0x03;
6d0f6bcf 874 tx_cbdp = (cbd_t *) (endpoints[ep]->tbptr + CONFIG_SYS_IMMR);
386eda02
WD
875
876 if (tx_cbdp->cbd_sc & TX_BD_R || usbp->usber & USB_E_TXB) {
877 mpc8xx_udc_flush_tx_fifo (ep);
16c8d5e7
WD
878 usbp->usber |= USB_E_TXB;
879 };
880
386eda02
WD
881 while (tx_retry++ < 100) {
882 ret = mpc8xx_udc_tx_irq (ep);
883 if (ret == -1) {
16c8d5e7 884 /* ignore timeout here */
386eda02 885 } else if (ret == -2) {
16c8d5e7 886 /* Abandon TX */
386eda02 887 mpc8xx_udc_flush_tx_fifo (ep);
16c8d5e7 888 return -1;
386eda02
WD
889 }
890
6d0f6bcf 891 tx_cbdp = (cbd_t *) (endpoints[ep]->tbptr + CONFIG_SYS_IMMR);
386eda02
WD
892 while (tx_cbdp->cbd_sc & TX_BD_R) {
893 };
894 tx_cbdp->cbd_sc = (tx_cbdp->cbd_sc & TX_BD_W);
16c8d5e7 895
16c8d5e7
WD
896 pkt_len = urb->actual_length - epi->sent;
897
386eda02
WD
898 if (pkt_len > epi->tx_packetSize || pkt_len > EP_MAX_PKT) {
899 pkt_len = MIN (epi->tx_packetSize, EP_MAX_PKT);
16c8d5e7
WD
900 }
901
386eda02
WD
902 for (x = 0; x < pkt_len; x++) {
903 *((unsigned char *) (tx_cbdp->cbd_bufaddr + x)) =
16c8d5e7
WD
904 urb->buffer[epi->sent + x];
905 }
906 tx_cbdp->cbd_datlen = pkt_len;
386eda02 907 tx_cbdp->cbd_sc |= (CBD_TX_BITMASK | ep_ref[ep].pid);
16c8d5e7
WD
908 __asm__ ("eieio");
909
386eda02
WD
910#ifdef __SIMULATE_ERROR__
911 if (++err_poison_test == 2) {
912 err_poison_test = 0;
913 tx_cbdp->cbd_sc &= ~TX_BD_TC;
914 }
915#endif
16c8d5e7 916
386eda02 917 usbp->uscom = (USCOM_STR | ep);
16c8d5e7 918
386eda02
WD
919 while (!(usbp->usber & USB_E_TXB)) {
920 ret = mpc8xx_udc_tx_irq (ep);
921 if (ret == -1) {
16c8d5e7
WD
922 /* TX timeout */
923 break;
386eda02
WD
924 } else if (ret == -2) {
925 if (usbp->usber & USB_E_TXB) {
926 usbp->usber |= USB_E_TXB;
16c8d5e7 927 }
386eda02 928 mpc8xx_udc_flush_tx_fifo (ep);
16c8d5e7
WD
929 return -1;
930 }
931 };
932
386eda02
WD
933 if (usbp->usber & USB_E_TXB) {
934 usbp->usber |= USB_E_TXB;
16c8d5e7
WD
935 }
936
937 /* ACK must be present <= 18bit times from TX */
386eda02 938 if (ret == -1) {
16c8d5e7
WD
939 continue;
940 }
386eda02 941
16c8d5e7
WD
942 /* TX ACK : USB 2.0 8.7.2, Toggle PID, Advance TX */
943 epi->sent += pkt_len;
386eda02
WD
944 epi->last = MIN (urb->actual_length - epi->sent, epi->tx_packetSize);
945 TOGGLE_TX_PID (ep_ref[ep].pid);
946
947 if (epi->sent >= epi->tx_urb->actual_length) {
16c8d5e7 948
16c8d5e7
WD
949 epi->tx_urb->actual_length = 0;
950 epi->sent = 0;
386eda02
WD
951
952 if (ep_ref[ep].sc & EP_SEND_ZLP) {
16c8d5e7 953 ep_ref[ep].sc &= ~EP_SEND_ZLP;
386eda02 954 } else {
16c8d5e7
WD
955 return 0;
956 }
957 }
958 }
386eda02
WD
959
960 ERR ("TX fail, endpoint 0x%x tx bytes 0x%x/0x%x\n", ep, epi->sent,
961 epi->tx_urb->actual_length);
16c8d5e7
WD
962
963 return -1;
964}
965
966/* mpc8xx_udc_dump_request
967 *
968 * Dump a control request to console
969 */
386eda02 970static void mpc8xx_udc_dump_request (struct usb_device_request *request)
16c8d5e7 971{
386eda02
WD
972 DBG ("bmRequestType:%02x bRequest:%02x wValue:%04x "
973 "wIndex:%04x wLength:%04x ?\n",
974 request->bmRequestType,
975 request->bRequest,
976 request->wValue, request->wIndex, request->wLength);
16c8d5e7
WD
977
978 return;
979}
980
386eda02
WD
981/* mpc8xx_udc_ep0_rx_setup
982 *
16c8d5e7
WD
983 * Decode received ep0 SETUP packet. return non-zero on error
984 */
985static int mpc8xx_udc_ep0_rx_setup (volatile cbd_t * rx_cbdp)
986{
987 unsigned int x = 0;
386eda02
WD
988 struct urb *purb = ep_ref[0].urb;
989 struct usb_endpoint_instance *epi =
16c8d5e7
WD
990 &udc_device->bus->endpoint_array[0];
991
386eda02
WD
992 for (; x < rx_cbdp->cbd_datlen; x++) {
993 *(((unsigned char *) &ep_ref[0].urb->device_request) + x) =
994 *((unsigned char *) (rx_cbdp->cbd_bufaddr + x));
16c8d5e7 995 }
16c8d5e7 996
386eda02
WD
997 mpc8xx_udc_clear_rxbd (rx_cbdp);
998
999 if (ep0_recv_setup (purb)) {
1000 mpc8xx_udc_dump_request (&purb->device_request);
16c8d5e7
WD
1001 return -1;
1002 }
1003
386eda02 1004 if ((purb->device_request.bmRequestType & USB_REQ_DIRECTION_MASK)
16c8d5e7
WD
1005 == USB_REQ_HOST2DEVICE) {
1006
386eda02
WD
1007 switch (purb->device_request.bRequest) {
1008 case USB_REQ_SET_ADDRESS:
1009 /* Send the Status OUT ZLP */
1010 ep_ref[0].pid = TX_BD_PID_DATA1;
1011 purb->actual_length = 0;
1012 mpc8xx_udc_init_tx (epi, purb);
1013 mpc8xx_udc_ep_tx (epi);
1014
1015 /* Move to the addressed state */
1016 usbp->usaddr = udc_device->address;
1017 mpc8xx_udc_state_transition_up (udc_device->device_state,
1018 STATE_ADDRESSED);
1019 return 0;
1020
1021 case USB_REQ_SET_CONFIGURATION:
1022 if (!purb->device_request.wValue) {
1023 /* Respond at default address */
1024 usbp->usaddr = 0x00;
1025 mpc8xx_udc_state_transition_down (udc_device->device_state,
1026 STATE_ADDRESSED);
1027 } else {
1028 /* TODO: Support multiple configurations */
1029 mpc8xx_udc_state_transition_up (udc_device->device_state,
1030 STATE_CONFIGURED);
1031 for (x = 1; x < MAX_ENDPOINTS; x++) {
1032 if ((udc_device->bus->endpoint_array[x].endpoint_address & USB_ENDPOINT_DIR_MASK)
1033 == USB_DIR_IN) {
1034 ep_ref[x].pid = TX_BD_PID_DATA0;
1035 } else {
1036 ep_ref[x].pid = RX_BD_PID_DATA0;
16c8d5e7 1037 }
386eda02
WD
1038 /* Set configuration must unstall endpoints */
1039 usbp->usep[x] &= ~STALL_BITMASK;
16c8d5e7 1040 }
386eda02
WD
1041 }
1042 break;
1043 default:
1044 /* CDC/Vendor specific */
1045 break;
16c8d5e7
WD
1046 }
1047
1048 /* Send ZLP as ACK in Status OUT phase */
1049 ep_ref[0].pid = TX_BD_PID_DATA1;
1050 purb->actual_length = 0;
386eda02
WD
1051 mpc8xx_udc_init_tx (epi, purb);
1052 mpc8xx_udc_ep_tx (epi);
16c8d5e7 1053
386eda02
WD
1054 } else {
1055
1056 if (purb->actual_length) {
16c8d5e7 1057 ep_ref[0].pid = TX_BD_PID_DATA1;
386eda02 1058 mpc8xx_udc_init_tx (epi, purb);
16c8d5e7 1059
386eda02 1060 if (!(purb->actual_length % EP0_MAX_PACKET_SIZE)) {
16c8d5e7
WD
1061 ep_ref[0].sc |= EP_SEND_ZLP;
1062 }
1063
386eda02
WD
1064 if (purb->device_request.wValue ==
1065 USB_DESCRIPTOR_TYPE_DEVICE) {
1066 if (le16_to_cpu (purb->device_request.wLength)
1067 > purb->actual_length) {
16c8d5e7
WD
1068 /* Send EP0_MAX_PACKET_SIZE bytes
1069 * unless correct size requested.
1070 */
386eda02
WD
1071 if (purb->actual_length > epi->tx_packetSize) {
1072 purb->actual_length = epi->tx_packetSize;
16c8d5e7 1073 }
16c8d5e7
WD
1074 }
1075 }
386eda02 1076 mpc8xx_udc_ep_tx (epi);
16c8d5e7 1077
386eda02 1078 } else {
16c8d5e7 1079 /* Corrupt SETUP packet? */
386eda02 1080 ERR ("Zero length data or SETUP with DATA-IN phase ?\n");
16c8d5e7
WD
1081 return 1;
1082 }
1083 }
1084 return 0;
1085}
1086
1087/* mpc8xx_udc_init_tx
1088 *
1089 * Setup some basic parameters for a TX transaction
1090 */
386eda02
WD
1091static void mpc8xx_udc_init_tx (struct usb_endpoint_instance *epi,
1092 struct urb *tx_urb)
16c8d5e7
WD
1093{
1094 epi->sent = 0;
1095 epi->last = 0;
1096 epi->tx_urb = tx_urb;
1097}
1098
1099/* mpc8xx_udc_ep0_rx
1100 *
1101 * Receive ep0/control USB data. Parse and possibly send a response.
1102 */
386eda02 1103static void mpc8xx_udc_ep0_rx (volatile cbd_t * rx_cbdp)
16c8d5e7 1104{
386eda02
WD
1105 if (rx_cbdp->cbd_sc & RX_BD_PID_SETUP) {
1106
16c8d5e7 1107 /* Unconditionally accept SETUP packets */
386eda02
WD
1108 if (mpc8xx_udc_ep0_rx_setup (rx_cbdp)) {
1109 mpc8xx_udc_stall (0);
16c8d5e7 1110 }
386eda02 1111
16c8d5e7 1112 } else {
386eda02
WD
1113
1114 mpc8xx_udc_clear_rxbd (rx_cbdp);
1115
1116 if ((rx_cbdp->cbd_datlen - 2)) {
16c8d5e7 1117 /* SETUP with a DATA phase
386eda02
WD
1118 * outside of SETUP packet.
1119 * Reply with STALL.
1120 */
16c8d5e7
WD
1121 mpc8xx_udc_stall (0);
1122 }
1123 }
1124}
1125
1126/* mpc8xx_udc_epn_rx
1127 *
1128 * Receive some data from cbd into USB system urb data abstraction
386eda02 1129 * Upper layers should NAK if there is insufficient RX data space
16c8d5e7
WD
1130 */
1131static int mpc8xx_udc_epn_rx (unsigned int epid, volatile cbd_t * rx_cbdp)
1132{
1133 struct usb_endpoint_instance *epi = 0;
1134 struct urb *urb = 0;
1135 unsigned int x = 0;
1136
386eda02 1137 if (epid >= MAX_ENDPOINTS || !rx_cbdp->cbd_datlen) {
16c8d5e7
WD
1138 return 0;
1139 }
386eda02
WD
1140
1141 /* USB 2.0 PDF section 8.6.4
16c8d5e7
WD
1142 * Discard data with invalid PID it is a resend.
1143 */
386eda02 1144 if (ep_ref[epid].pid != (rx_cbdp->cbd_sc & 0xC0)) {
16c8d5e7
WD
1145 return 1;
1146 }
386eda02
WD
1147 TOGGLE_RX_PID (ep_ref[epid].pid);
1148
16c8d5e7
WD
1149 epi = &udc_device->bus->endpoint_array[epid];
1150 urb = epi->rcv_urb;
1151
386eda02
WD
1152 for (; x < (rx_cbdp->cbd_datlen - 2); x++) {
1153 *((unsigned char *) (urb->buffer + urb->actual_length + x)) =
1154 *((unsigned char *) (rx_cbdp->cbd_bufaddr + x));
16c8d5e7
WD
1155 }
1156
386eda02 1157 if (x) {
16c8d5e7 1158 usbd_rcv_complete (epi, x, 0);
386eda02
WD
1159 if (ep_ref[epid].urb->status == RECV_ERROR) {
1160 DBG ("RX error unset NAK\n");
1161 udc_unset_nak (epid);
16c8d5e7 1162 }
386eda02 1163 }
16c8d5e7
WD
1164 return x;
1165}
1166
1167/* mpc8xx_udc_clock_init
1168 *
386eda02 1169 * Obtain a clock reference for Full Speed Signaling
16c8d5e7 1170 */
386eda02
WD
1171static void mpc8xx_udc_clock_init (volatile immap_t * immr,
1172 volatile cpm8xx_t * cp)
16c8d5e7
WD
1173{
1174
6d0f6bcf 1175#if defined(CONFIG_SYS_USB_EXTC_CLK)
16c8d5e7
WD
1176
1177 /* This has been tested with a 48MHz crystal on CLK6 */
6d0f6bcf 1178 switch (CONFIG_SYS_USB_EXTC_CLK) {
386eda02
WD
1179 case 1:
1180 immr->im_ioport.iop_papar |= 0x0100;
1181 immr->im_ioport.iop_padir &= ~0x0100;
1182 cp->cp_sicr |= 0x24;
1183 break;
1184 case 2:
1185 immr->im_ioport.iop_papar |= 0x0200;
1186 immr->im_ioport.iop_padir &= ~0x0200;
1187 cp->cp_sicr |= 0x2D;
1188 break;
1189 case 3:
1190 immr->im_ioport.iop_papar |= 0x0400;
1191 immr->im_ioport.iop_padir &= ~0x0400;
1192 cp->cp_sicr |= 0x36;
1193 break;
1194 case 4:
1195 immr->im_ioport.iop_papar |= 0x0800;
1196 immr->im_ioport.iop_padir &= ~0x0800;
1197 cp->cp_sicr |= 0x3F;
1198 break;
1199 default:
1200 udc_state = STATE_ERROR;
1201 break;
16c8d5e7
WD
1202 }
1203
6d0f6bcf 1204#elif defined(CONFIG_SYS_USB_BRGCLK)
16c8d5e7 1205
386eda02 1206 /* This has been tested with brgclk == 50MHz */
16c8d5e7
WD
1207 int divisor = 0;
1208
386eda02
WD
1209 if (gd->cpu_clk < 48000000L) {
1210 ERR ("brgclk is too slow for full-speed USB!\n");
16c8d5e7
WD
1211 udc_state = STATE_ERROR;
1212 return;
1213 }
1214
8ed44d91 1215 /* Assume the brgclk is 'good enough', we want !(gd->cpu_clk%48MHz)
16c8d5e7 1216 * but, can /probably/ live with close-ish alternative rates.
386eda02
WD
1217 */
1218 divisor = (gd->cpu_clk / 48000000L) - 1;
16c8d5e7 1219 cp->cp_sicr &= ~0x0000003F;
386eda02 1220
6d0f6bcf 1221 switch (CONFIG_SYS_USB_BRGCLK) {
386eda02
WD
1222 case 1:
1223 cp->cp_brgc1 |= (divisor | CPM_BRG_EN);
1224 cp->cp_sicr &= ~0x2F;
1225 break;
1226 case 2:
1227 cp->cp_brgc2 |= (divisor | CPM_BRG_EN);
1228 cp->cp_sicr |= 0x00000009;
1229 break;
1230 case 3:
1231 cp->cp_brgc3 |= (divisor | CPM_BRG_EN);
1232 cp->cp_sicr |= 0x00000012;
1233 break;
1234 case 4:
1235 cp->cp_brgc4 = (divisor | CPM_BRG_EN);
1236 cp->cp_sicr |= 0x0000001B;
1237 break;
1238 default:
1239 udc_state = STATE_ERROR;
1240 break;
16c8d5e7
WD
1241 }
1242
1243#else
6d0f6bcf 1244#error "CONFIG_SYS_USB_EXTC_CLK or CONFIG_SYS_USB_BRGCLK must be defined"
16c8d5e7
WD
1245#endif
1246
1247}
1248
1249/* mpc8xx_udc_cbd_attach
1250 *
1251 * attach a cbd to and endpoint
1252 */
1253static void mpc8xx_udc_cbd_attach (int ep, uchar tx_size, uchar rx_size)
1254{
386eda02
WD
1255
1256 if (!tx_cbd[ep] || !rx_cbd[ep] || ep >= MAX_ENDPOINTS) {
16c8d5e7
WD
1257 udc_state = STATE_ERROR;
1258 return;
1259 }
1260
386eda02
WD
1261 if (tx_size > USB_MAX_PKT || rx_size > USB_MAX_PKT ||
1262 (!tx_size && !rx_size)) {
16c8d5e7
WD
1263 udc_state = STATE_ERROR;
1264 return;
1265 }
1266
1267 /* Attach CBD to appropiate Parameter RAM Endpoint data structure */
386eda02
WD
1268 if (rx_size) {
1269 endpoints[ep]->rbase = (u32) rx_cbd[rx_ct];
1270 endpoints[ep]->rbptr = (u32) rx_cbd[rx_ct];
16c8d5e7
WD
1271 rx_ct++;
1272
386eda02
WD
1273 if (!ep) {
1274
1275 endpoints[ep]->rbptr = (u32) rx_cbd[rx_ct];
16c8d5e7
WD
1276 rx_cbd[rx_ct]->cbd_sc |= RX_BD_W;
1277 rx_ct++;
1278
386eda02 1279 } else {
16c8d5e7 1280 rx_ct += 2;
386eda02 1281 endpoints[ep]->rbptr = (u32) rx_cbd[rx_ct];
16c8d5e7
WD
1282 rx_cbd[rx_ct]->cbd_sc |= RX_BD_W;
1283 rx_ct++;
1284 }
1285
1286 /* Where we expect to RX data on this endpoint */
386eda02
WD
1287 ep_ref[ep].prx = rx_cbd[rx_ct - 1];
1288 } else {
16c8d5e7
WD
1289
1290 ep_ref[ep].prx = 0;
1291 endpoints[ep]->rbase = 0;
1292 endpoints[ep]->rbptr = 0;
1293 }
1294
386eda02
WD
1295 if (tx_size) {
1296 endpoints[ep]->tbase = (u32) tx_cbd[tx_ct];
1297 endpoints[ep]->tbptr = (u32) tx_cbd[tx_ct];
16c8d5e7 1298 tx_ct++;
386eda02 1299 } else {
16c8d5e7
WD
1300 endpoints[ep]->tbase = 0;
1301 endpoints[ep]->tbptr = 0;
1302 }
1303
1304 endpoints[ep]->tstate = 0;
1305 endpoints[ep]->tbcnt = 0;
1306 endpoints[ep]->mrblr = EP_MAX_PKT;
386eda02 1307 endpoints[ep]->rfcr = 0x18;
16c8d5e7
WD
1308 endpoints[ep]->tfcr = 0x18;
1309 ep_ref[ep].sc |= EP_ATTACHED;
1310
386eda02
WD
1311 DBG ("ep %d rbase 0x%08x rbptr 0x%08x tbase 0x%08x tbptr 0x%08x prx = %p\n",
1312 ep, endpoints[ep]->rbase, endpoints[ep]->rbptr,
1313 endpoints[ep]->tbase, endpoints[ep]->tbptr,
1314 ep_ref[ep].prx);
16c8d5e7
WD
1315
1316 return;
1317}
1318
1319/* mpc8xx_udc_cbd_init
1320 *
1321 * Allocate space for a cbd and allocate TX/RX data space
1322 */
1323static void mpc8xx_udc_cbd_init (void)
1324{
1325 int i = 0;
1326
386eda02
WD
1327 for (; i < TX_RING_SIZE; i++) {
1328 tx_cbd[i] = (cbd_t *)
1329 mpc8xx_udc_alloc (sizeof (cbd_t), sizeof (int));
1330 }
1331
1332 for (i = 0; i < RX_RING_SIZE; i++) {
1333 rx_cbd[i] = (cbd_t *)
1334 mpc8xx_udc_alloc (sizeof (cbd_t), sizeof (int));
16c8d5e7
WD
1335 }
1336
386eda02
WD
1337 for (i = 0; i < TX_RING_SIZE; i++) {
1338 tx_cbd[i]->cbd_bufaddr =
1339 mpc8xx_udc_alloc (EP_MAX_PKT, sizeof (int));
16c8d5e7 1340
386eda02 1341 tx_cbd[i]->cbd_sc = (TX_BD_I | TX_BD_W);
16c8d5e7
WD
1342 tx_cbd[i]->cbd_datlen = 0x0000;
1343 }
1344
1345
386eda02
WD
1346 for (i = 0; i < RX_RING_SIZE; i++) {
1347 rx_cbd[i]->cbd_bufaddr =
1348 mpc8xx_udc_alloc (EP_MAX_PKT, sizeof (int));
16c8d5e7
WD
1349 rx_cbd[i]->cbd_sc = (RX_BD_I | RX_BD_E);
1350 rx_cbd[i]->cbd_datlen = 0x0000;
1351
1352 }
1353
1354 return;
1355}
1356
1357/* mpc8xx_udc_endpoint_init
1358 *
1359 * Attach an endpoint to some dpram
1360 */
1361static void mpc8xx_udc_endpoint_init (void)
1362{
1363 int i = 0;
1364
386eda02
WD
1365 for (; i < MAX_ENDPOINTS; i++) {
1366 endpoints[i] = (usb_epb_t *)
1367 mpc8xx_udc_alloc (sizeof (usb_epb_t), 32);
16c8d5e7
WD
1368 }
1369}
1370
1371/* mpc8xx_udc_alloc
1372 *
386eda02 1373 * Grab the address of some dpram
16c8d5e7
WD
1374 */
1375static u32 mpc8xx_udc_alloc (u32 data_size, u32 alignment)
1376{
1377 u32 retaddr = address_base;
386eda02
WD
1378
1379 while (retaddr % alignment) {
16c8d5e7 1380 retaddr++;
386eda02
WD
1381 }
1382 address_base += data_size;
1383
16c8d5e7
WD
1384 return retaddr;
1385}