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USB OHCI support for at91sam9g45 SoC
[people/ms/u-boot.git] / drivers / usb / host / ohci-at91.c
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1/*
2 * (C) Copyright 2006
567fb852 3 * DENX Software Engineering <mk@denx.de>
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4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25
6d0f6bcf 26#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
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27
28#include <asm/arch/hardware.h>
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29#include <asm/arch/io.h>
30#include <asm/arch/at91_pmc.h>
dc39ae95 31#include <asm/arch/clk.h>
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32
33int usb_cpu_init(void)
34{
0701f730 35 at91_pmc_t *pmc = (at91_pmc_t *)AT91_PMC_BASE;
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36
37#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
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38 defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
39 defined(CONFIG_AT91SAM9261)
3e0cda07 40 /* Enable PLLB */
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41 writel(get_pllb_init(), &pmc->pllbr);
42 while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
3e0cda07 43 ;
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44#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
45 /* Enable UPLL */
46 writel(readl(&pmc->uckr) | AT91_PMC_UPLLEN | AT91_PMC_BIASEN,
47 &pmc->uckr);
48 while ((readl(&pmc->sr) & AT91_PMC_LOCKU) != AT91_PMC_LOCKU)
49 ;
50
51 /* Select PLLA as input clock of OHCI */
52 writel(AT91_PMC_USBS_USB_UPLL | AT91_PMC_USBDIV_10, &pmc->usb);
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53#endif
54
fefb6c10 55 /* Enable USB host clock. */
0701f730 56 writel(1 << AT91_ID_UHP, &pmc->pcer);
d99a8ff6 57#ifdef CONFIG_AT91SAM9261
0701f730 58 writel(AT91_PMC_UHP | AT91_PMC_HCK0, &pmc->scer);
d99a8ff6 59#else
0701f730 60 writel(AT91_PMC_UHP, &pmc->scer);
d99a8ff6 61#endif
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62
63 return 0;
64}
65
66int usb_cpu_stop(void)
67{
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68 at91_pmc_t *pmc = (at91_pmc_t *)AT91_PMC_BASE;
69
fefb6c10 70 /* Disable USB host clock. */
0701f730 71 writel(1 << AT91_ID_UHP, &pmc->pcdr);
d99a8ff6 72#ifdef CONFIG_AT91SAM9261
0701f730 73 writel(AT91_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr);
d99a8ff6 74#else
0701f730 75 writel(AT91_PMC_UHP, &pmc->scdr);
d99a8ff6 76#endif
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77
78#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
df486b1f 79 defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
3e0cda07 80 /* Disable PLLB */
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81 writel(0, &pmc->pllbr);
82 while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0)
3e0cda07 83 ;
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84#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
85 /* Disable UPLL */
86 writel(readl(&pmc->uckr) & (~AT91_PMC_UPLLEN), &pmc->uckr);
87 while ((readl(&pmc->sr) & AT91_PMC_LOCKU) == AT91_PMC_LOCKU)
88 ;
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89#endif
90
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91 return 0;
92}
93
94int usb_cpu_init_fail(void)
95{
96 return usb_cpu_stop();
97}
98
6d0f6bcf 99#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */