[people/ms/u-boot.git] / drivers / usb / phy / twl4030.c

/*
 * Copyright (c) 2009 Wind River Systems, Inc.
 * Tom Rix <Tom.Rix@windriver.com>
 *
 * This is file is based on
 * repository git.gitorious.org/u-boot-omap3/mainline.git,
 * branch omap3-dev-usb, file drivers/usb/gadget/twl4030_usb.c
 *
 * This is the unique part of its copyright :
 *
 * ------------------------------------------------------------------------
 *
 *  * (C) Copyright 2009 Atin Malaviya (atin.malaviya@gmail.com)
 *
 * Based on: twl4030_usb.c in linux 2.6 (drivers/i2c/chips/twl4030_usb.c)
 * Copyright (C) 2004-2007 Texas Instruments
 * Copyright (C) 2008 Nokia Corporation
 * Contact: Felipe Balbi <felipe.balbi@nokia.com>
 *
 * Author: Atin Malaviya (atin.malaviya@gmail.com)
 *
 * ------------------------------------------------------------------------
 *
 * SPDX-License-Identifier:	GPL-2.0+ 
 */

#include <twl4030.h>

/* Defines for bits in registers */
#define OPMODE_MASK		(3 << 3)
#define XCVRSELECT_MASK		(3 << 0)
#define CARKITMODE		(1 << 2)
#define OTG_ENAB		(1 << 5)
#define PHYPWD			(1 << 0)
#define CLOCKGATING_EN		(1 << 2)
#define CLK32K_EN		(1 << 1)
#define REQ_PHY_DPLL_CLK	(1 << 0)
#define PHY_DPLL_CLK		(1 << 0)

static int twl4030_usb_write(u8 address, u8 data)
{
	int ret;

	ret = twl4030_i2c_write_u8(TWL4030_CHIP_USB, address, data);
	if (ret != 0)
		printf("TWL4030:USB:Write[0x%x] Error %d\n", address, ret);

	return ret;
}

static int twl4030_usb_read(u8 address)
{
	u8 data;
	int ret;

	ret = twl4030_i2c_read_u8(TWL4030_CHIP_USB, address, &data);
	if (ret == 0)
		ret = data;
	else
		printf("TWL4030:USB:Read[0x%x] Error %d\n", address, ret);

	return ret;
}

static void twl4030_usb_ldo_init(void)
{
	/* Enable writing to power configuration registers */
	twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
			     TWL4030_PM_MASTER_PROTECT_KEY, 0xC0);
	twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
			     TWL4030_PM_MASTER_PROTECT_KEY, 0x0C);

	/* put VUSB3V1 LDO in active state */
	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
			     TWL4030_PM_RECEIVER_VUSB_DEDICATED2, 0x00);

	/* input to VUSB3V1 LDO is from VBAT, not VBUS */
	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
			     TWL4030_PM_RECEIVER_VUSB_DEDICATED1, 0x14);

	/* turn on 3.1V regulator */
	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
			     TWL4030_PM_RECEIVER_VUSB3V1_DEV_GRP, 0x20);
	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
			     TWL4030_PM_RECEIVER_VUSB3V1_TYPE, 0x00);

	/* turn on 1.5V regulator */
	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
			     TWL4030_PM_RECEIVER_VUSB1V5_DEV_GRP, 0x20);
	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
			     TWL4030_PM_RECEIVER_VUSB1V5_TYPE, 0x00);

	/* turn on 1.8V regulator */
	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
			     TWL4030_PM_RECEIVER_VUSB1V8_DEV_GRP, 0x20);
	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
			     TWL4030_PM_RECEIVER_VUSB1V8_TYPE, 0x00);

	/* disable access to power configuration registers */
	twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
			     TWL4030_PM_MASTER_PROTECT_KEY, 0x00);
}

static void twl4030_phy_power(void)
{
	u8 pwr, clk;

	/* Power the PHY */
	pwr = twl4030_usb_read(TWL4030_USB_PHY_PWR_CTRL);
	pwr &= ~PHYPWD;
	twl4030_usb_write(TWL4030_USB_PHY_PWR_CTRL, pwr);
	/* Enable clocks */
	clk = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL);
	clk |= CLOCKGATING_EN | CLK32K_EN;
	twl4030_usb_write(TWL4030_USB_PHY_CLK_CTRL, clk);
}

/*
 * Initiaze the ULPI interface
 * ULPI : Universal Transceiver Macrocell Low Pin Interface
 * An interface between the USB link controller like musb and the
 * the PHY or transceiver that drives the actual bus.
 */
int twl4030_usb_ulpi_init(void)
{
	long timeout = 1000 * 1000; /* 1 sec */;
	u8 clk, sts, pwr;

	/* twl4030 ldo init */
	twl4030_usb_ldo_init();

	/* Enable the twl4030 phy */
	twl4030_phy_power();

	/* Enable DPLL to access PHY registers over I2C */
	clk = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL);
	clk |= REQ_PHY_DPLL_CLK;
	twl4030_usb_write(TWL4030_USB_PHY_CLK_CTRL, clk);

	/* Check if the PHY DPLL is locked */
	sts = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL_STS);
	while (!(sts & PHY_DPLL_CLK) && 0 < timeout) {
		udelay(10);
		sts = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL_STS);
		timeout -= 10;
	}

	/* Final check */
	sts = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL_STS);
	if (!(sts & PHY_DPLL_CLK)) {
		printf("Error:TWL4030:USB Timeout setting PHY DPLL clock\n");
		return -1;
	}

	/*
	 * There are two circuit blocks attached to the PHY,
	 * Carkit and USB OTG.  Disable Carkit and enable USB OTG
	 */
	twl4030_usb_write(TWL4030_USB_IFC_CTRL_CLR, CARKITMODE);
	pwr = twl4030_usb_read(TWL4030_USB_POWER_CTRL);
	pwr |= OTG_ENAB;
	twl4030_usb_write(TWL4030_USB_POWER_CTRL_SET, pwr);

	/* Clear the opmode bits to ensure normal encode */
	twl4030_usb_write(TWL4030_USB_FUNC_CTRL_CLR, OPMODE_MASK);

	/* Clear the xcvrselect bits to enable the high speed transeiver */
	twl4030_usb_write(TWL4030_USB_FUNC_CTRL_CLR, XCVRSELECT_MASK);

	/* Let ULPI control the DPLL clock */
	clk = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL);
	clk &= ~REQ_PHY_DPLL_CLK;
	twl4030_usb_write(TWL4030_USB_PHY_CLK_CTRL, clk);

	return 0;
}
Commit	Line	Data
bffbb2a8 TR	1	/*
	2	* Copyright (c) 2009 Wind River Systems, Inc.
	3	* Tom Rix <Tom.Rix@windriver.com>
	4	*
	5	* This is file is based on
	6	* repository git.gitorious.org/u-boot-omap3/mainline.git,
	7	* branch omap3-dev-usb, file drivers/usb/gadget/twl4030_usb.c
	8	*
	9	* This is the unique part of its copyright :
	10	*
	11	* ------------------------------------------------------------------------
	12	*
	13	* * (C) Copyright 2009 Atin Malaviya (atin.malaviya@gmail.com)
	14	*
	15	* Based on: twl4030_usb.c in linux 2.6 (drivers/i2c/chips/twl4030_usb.c)
	16	* Copyright (C) 2004-2007 Texas Instruments
	17	* Copyright (C) 2008 Nokia Corporation
	18	* Contact: Felipe Balbi <felipe.balbi@nokia.com>
	19	*
	20	* Author: Atin Malaviya (atin.malaviya@gmail.com)
	21	*
	22	* ------------------------------------------------------------------------
	23	*
1a459660	24	* SPDX-License-Identifier: GPL-2.0+
bffbb2a8 TR	25	*/
	26
	27	#include <twl4030.h>
	28
	29	/* Defines for bits in registers */
	30	#define OPMODE_MASK (3 << 3)
	31	#define XCVRSELECT_MASK (3 << 0)
	32	#define CARKITMODE (1 << 2)
	33	#define OTG_ENAB (1 << 5)
	34	#define PHYPWD (1 << 0)
	35	#define CLOCKGATING_EN (1 << 2)
	36	#define CLK32K_EN (1 << 1)
	37	#define REQ_PHY_DPLL_CLK (1 << 0)
	38	#define PHY_DPLL_CLK (1 << 0)
	39
	40	static int twl4030_usb_write(u8 address, u8 data)
	41	{
	42	int ret;
	43
0208aaf6	44	ret = twl4030_i2c_write_u8(TWL4030_CHIP_USB, address, data);
bffbb2a8 TR	45	if (ret != 0)
	46	printf("TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
	47
	48	return ret;
	49	}
	50
	51	static int twl4030_usb_read(u8 address)
	52	{
	53	u8 data;
	54	int ret;
	55
b29c2f0c	56	ret = twl4030_i2c_read_u8(TWL4030_CHIP_USB, address, &data);
bffbb2a8 TR	57	if (ret == 0)
	58	ret = data;
	59	else
	60	printf("TWL4030:USB:Read[0x%x] Error %d\n", address, ret);
	61
	62	return ret;
	63	}
	64
	65	static void twl4030_usb_ldo_init(void)
	66	{
	67	/* Enable writing to power configuration registers */
0208aaf6 NM	68	twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
	69	TWL4030_PM_MASTER_PROTECT_KEY, 0xC0);
	70	twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
	71	TWL4030_PM_MASTER_PROTECT_KEY, 0x0C);
bffbb2a8 TR	72
bffbb2a8 TR	73	/* put VUSB3V1 LDO in active state */
0208aaf6 NM	74	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
0208aaf6 NM	75	TWL4030_PM_RECEIVER_VUSB_DEDICATED2, 0x00);
bffbb2a8 TR	76
bffbb2a8 TR	77	/* input to VUSB3V1 LDO is from VBAT, not VBUS */
0208aaf6 NM	78	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
0208aaf6 NM	79	TWL4030_PM_RECEIVER_VUSB_DEDICATED1, 0x14);
bffbb2a8 TR	80
bffbb2a8 TR	81	/* turn on 3.1V regulator */
0208aaf6 NM	82	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
	83	TWL4030_PM_RECEIVER_VUSB3V1_DEV_GRP, 0x20);
	84	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
	85	TWL4030_PM_RECEIVER_VUSB3V1_TYPE, 0x00);
bffbb2a8 TR	86
bffbb2a8 TR	87	/* turn on 1.5V regulator */
0208aaf6 NM	88	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
	89	TWL4030_PM_RECEIVER_VUSB1V5_DEV_GRP, 0x20);
	90	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
	91	TWL4030_PM_RECEIVER_VUSB1V5_TYPE, 0x00);
bffbb2a8 TR	92
bffbb2a8 TR	93	/* turn on 1.8V regulator */
0208aaf6 NM	94	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
	95	TWL4030_PM_RECEIVER_VUSB1V8_DEV_GRP, 0x20);
	96	twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
	97	TWL4030_PM_RECEIVER_VUSB1V8_TYPE, 0x00);
bffbb2a8 TR	98
bffbb2a8 TR	99	/* disable access to power configuration registers */
0208aaf6 NM	100	twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
0208aaf6 NM	101	TWL4030_PM_MASTER_PROTECT_KEY, 0x00);
bffbb2a8 TR	102	}
	103
	104	static void twl4030_phy_power(void)
	105	{
	106	u8 pwr, clk;
	107
	108	/* Power the PHY */
	109	pwr = twl4030_usb_read(TWL4030_USB_PHY_PWR_CTRL);
	110	pwr &= ~PHYPWD;
	111	twl4030_usb_write(TWL4030_USB_PHY_PWR_CTRL, pwr);
	112	/* Enable clocks */
	113	clk = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL);
	114	clk \|= CLOCKGATING_EN \| CLK32K_EN;
	115	twl4030_usb_write(TWL4030_USB_PHY_CLK_CTRL, clk);
	116	}
	117
	118	/*
	119	* Initiaze the ULPI interface
	120	* ULPI : Universal Transceiver Macrocell Low Pin Interface
	121	* An interface between the USB link controller like musb and the
	122	* the PHY or transceiver that drives the actual bus.
	123	*/
	124	int twl4030_usb_ulpi_init(void)
	125	{
	126	long timeout = 1000 * 1000; /* 1 sec */;
	127	u8 clk, sts, pwr;
	128
	129	/* twl4030 ldo init */
	130	twl4030_usb_ldo_init();
	131
	132	/* Enable the twl4030 phy */
	133	twl4030_phy_power();
	134
	135	/* Enable DPLL to access PHY registers over I2C */
	136	clk = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL);
	137	clk \|= REQ_PHY_DPLL_CLK;
	138	twl4030_usb_write(TWL4030_USB_PHY_CLK_CTRL, clk);
	139
	140	/* Check if the PHY DPLL is locked */
	141	sts = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL_STS);
	142	while (!(sts & PHY_DPLL_CLK) && 0 < timeout) {
	143	udelay(10);
	144	sts = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL_STS);
	145	timeout -= 10;
	146	}
	147
	148	/* Final check */
	149	sts = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL_STS);
	150	if (!(sts & PHY_DPLL_CLK)) {
	151	printf("Error:TWL4030:USB Timeout setting PHY DPLL clock\n");
	152	return -1;
	153	}
	154
	155	/*
	156	* There are two circuit blocks attached to the PHY,
	157	* Carkit and USB OTG. Disable Carkit and enable USB OTG
	158	*/
	159	twl4030_usb_write(TWL4030_USB_IFC_CTRL_CLR, CARKITMODE);
	160	pwr = twl4030_usb_read(TWL4030_USB_POWER_CTRL);
	161	pwr \|= OTG_ENAB;
	162	twl4030_usb_write(TWL4030_USB_POWER_CTRL_SET, pwr);
	163
	164	/* Clear the opmode bits to ensure normal encode */
	165	twl4030_usb_write(TWL4030_USB_FUNC_CTRL_CLR, OPMODE_MASK);
166
167	/* Clear the xcvrselect bits to enable the high speed transeiver */
168	twl4030_usb_write(TWL4030_USB_FUNC_CTRL_CLR, XCVRSELECT_MASK);
169
170	/* Let ULPI control the DPLL clock */
171	clk = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL);
172	clk &= ~REQ_PHY_DPLL_CLK;
173	twl4030_usb_write(TWL4030_USB_PHY_CLK_CTRL, clk);
174
175	return 0;
176	}