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USB event poll support
[people/ms/u-boot.git] / drivers / usb_ohci.c
CommitLineData
3e326ece
MK		 1/*
2 * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200.
3 *
4 * (C) Copyright 2003
5 * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
6 *
7 * Note: Much of this code has been derived from Linux 2.4
8 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
9 * (C) Copyright 2000-2002 David Brownell
10 *
11 * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
12 * ebenard@eukrea.com - based on s3c24x0's driver
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
ddf83a2f 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3e326ece
MK		 25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
32 */
33/*
34 * IMPORTANT NOTES
35 * 1 - you MUST define LITTLEENDIAN in the configuration file for the
36 * board or this driver will NOT work!
37 * 2 - this driver is intended for use with USB Mass Storage Devices
38 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
39 * 3 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
40 * to activate workaround for bug #41 or this driver will NOT work!
41 */
42
43#include <common.h>
44/* #include <pci.h> no PCI on the S3C24X0 */
45
7b59b3c7 46#ifdef CONFIG_USB_OHCI_NEW
3e326ece 47
53e336e9 48/* mk: are these really required? */
ddf83a2f
MK		 49#if defined(CONFIG_S3C2400)
50# include <s3c2400.h>
51#elif defined(CONFIG_S3C2410)
52# include <s3c2410.h>
53#elif defined(CONFIG_ARM920T)
54# include <asm/arch/hardware.h>
55#elif defined(CONFIG_CPU_MONAHANS)
56# include <asm/arch/pxa-regs.h>
53e336e9
MK		 57#elif defined(CONFIG_MPC5200)
58# include <mpc5xxx.h>
ddf83a2f 59#endif
3e326ece
MK		 60
61#include <malloc.h>
62#include <usb.h>
63#include "usb_ohci.h"
64
ddf83a2f
MK		 65#if defined(CONFIG_ARM920T) || \
66 defined(CONFIG_S3C2400) || \
ae3b770e
MK		 67 defined(CONFIG_S3C2410) || \
68 defined(CONFIG_440EP) || \
69 defined(CONFIG_MPC5200)
24e37645
MK		 70# define OHCI_USE_NPS /* force NoPowerSwitching mode */
71#endif
72
3e326ece 73#undef OHCI_VERBOSE_DEBUG /* not always helpful */
ae3b770e
MK		 74#undef DEBUG
75#undef SHOW_INFO
76#undef OHCI_FILL_TRACE
3e326ece
MK		 77
78/* For initializing controller (mask in an HCFS mode too) */
79#define OHCI_CONTROL_INIT \
80 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
81
82#define readl(a) (*((vu_long *)(a)))
83#define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
84
85#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
86
87#undef DEBUG
88#ifdef DEBUG
89#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
90#else
91#define dbg(format, arg...) do {} while(0)
92#endif /* DEBUG */
93#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
94#undef SHOW_INFO
95#ifdef SHOW_INFO
96#define info(format, arg...) printf("INFO: " format "\n", ## arg)
97#else
98#define info(format, arg...) do {} while(0)
99#endif
100
ae3b770e
MK		 101#if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
102# define m16_swap(x) (x)
103# define m32_swap(x) (x)
104#else
105# define m16_swap(x) swap_16(x)
106# define m32_swap(x) swap_32(x)
107#endif
3e326ece
MK		 108
109/* global ohci_t */
110static ohci_t gohci;
111/* this must be aligned to a 256 byte boundary */
112struct ohci_hcca ghcca[1];
113/* a pointer to the aligned storage */
114struct ohci_hcca *phcca;
115/* this allocates EDs for all possible endpoints */
116struct ohci_device ohci_dev;
117/* urb_priv */
118urb_priv_t urb_priv;
119/* RHSC flag */
120int got_rhsc;
121/* device which was disconnected */
122struct usb_device *devgone;
123
ddf83a2f
MK		 124/* flag guarding URB transation */
125int urb_finished = 0;
ddf83a2f
MK		 126
127
3e326ece
MK		 128/*-------------------------------------------------------------------------*/
129
130/* AMD-756 (D2 rev) reports corrupt register contents in some cases.
131 * The erratum (#4) description is incorrect. AMD's workaround waits
132 * till some bits (mostly reserved) are clear; ok for all revs.
133 */
134#define OHCI_QUIRK_AMD756 0xabcd
135#define read_roothub(hc, register, mask) ({ \
136 u32 temp = readl (&hc->regs->roothub.register); \
137 if (hc->flags & OHCI_QUIRK_AMD756) \
138 while (temp & mask) \
139 temp = readl (&hc->regs->roothub.register); \
140 temp; })
141
142static u32 roothub_a (struct ohci *hc)
143 { return read_roothub (hc, a, 0xfc0fe000); }
144static inline u32 roothub_b (struct ohci *hc)
145 { return readl (&hc->regs->roothub.b); }
146static inline u32 roothub_status (struct ohci *hc)
147 { return readl (&hc->regs->roothub.status); }
148static u32 roothub_portstatus (struct ohci *hc, int i)
149 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
150
151
152/* forward declaration */
153static int hc_interrupt (void);
154static void
155td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
156 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
157
158/*-------------------------------------------------------------------------*
159 * URB support functions
160 *-------------------------------------------------------------------------*/
161
162/* free HCD-private data associated with this URB */
163
164static void urb_free_priv (urb_priv_t * urb)
165{
166 int i;
167 int last;
168 struct td * td;
169
170 last = urb->length - 1;
171 if (last >= 0) {
172 for (i = 0; i <= last; i++) {
173 td = urb->td[i];
174 if (td) {
175 td->usb_dev = NULL;
176 urb->td[i] = NULL;
177 }
178 }
179 }
180}
181
182/*-------------------------------------------------------------------------*/
183
184#ifdef DEBUG
185static int sohci_get_current_frame_number (struct usb_device * dev);
186
187/* debug| print the main components of an URB
188 * small: 0) header + data packets 1) just header */
189
190static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
191 int transfer_len, struct devrequest * setup, char * str, int small)
192{
193 urb_priv_t * purb = &urb_priv;
194
195 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
196 str,
197 sohci_get_current_frame_number (dev),
198 usb_pipedevice (pipe),
199 usb_pipeendpoint (pipe),
200 usb_pipeout (pipe)? 'O': 'I',
201 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
202 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
203 purb->actual_length,
204 transfer_len, dev->status);
205#ifdef OHCI_VERBOSE_DEBUG
206 if (!small) {
207 int i, len;
208
209 if (usb_pipecontrol (pipe)) {
210 printf (__FILE__ ": cmd(8):");
211 for (i = 0; i < 8 ; i++)
212 printf (" %02x", ((__u8 *) setup) [i]);
213 printf ("\n");
214 }
215 if (transfer_len > 0 && buffer) {
216 printf (__FILE__ ": data(%d/%d):",
217 purb->actual_length,
218 transfer_len);
219 len = usb_pipeout (pipe)?
220 transfer_len: purb->actual_length;
221 for (i = 0; i < 16 && i < len; i++)
222 printf (" %02x", ((__u8 *) buffer) [i]);
223 printf ("%s\n", i < len? "...": "");
224 }
225 }
226#endif
227}
228
229/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
230void ep_print_int_eds (ohci_t *ohci, char * str) {
231 int i, j;
232 __u32 * ed_p;
233 for (i= 0; i < 32; i++) {
234 j = 5;
235 ed_p = &(ohci->hcca->int_table [i]);
236 if (*ed_p == 0)
237 continue;
238 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
239 while (*ed_p != 0 && j--) {
240 ed_t *ed = (ed_t *)m32_swap(ed_p);
241 printf (" ed: %4x;", ed->hwINFO);
242 ed_p = &ed->hwNextED;
243 }
244 printf ("\n");
245 }
246}
247
248static void ohci_dump_intr_mask (char *label, __u32 mask)
249{
250 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
251 label,
252 mask,
253 (mask & OHCI_INTR_MIE) ? " MIE" : "",
254 (mask & OHCI_INTR_OC) ? " OC" : "",
255 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
256 (mask & OHCI_INTR_FNO) ? " FNO" : "",
257 (mask & OHCI_INTR_UE) ? " UE" : "",
258 (mask & OHCI_INTR_RD) ? " RD" : "",
259 (mask & OHCI_INTR_SF) ? " SF" : "",
260 (mask & OHCI_INTR_WDH) ? " WDH" : "",
261 (mask & OHCI_INTR_SO) ? " SO" : ""
262 );
263}
264
265static void maybe_print_eds (char *label, __u32 value)
266{
267 ed_t *edp = (ed_t *)value;
268
269 if (value) {
270 dbg ("%s %08x", label, value);
271 dbg ("%08x", edp->hwINFO);
272 dbg ("%08x", edp->hwTailP);
273 dbg ("%08x", edp->hwHeadP);
274 dbg ("%08x", edp->hwNextED);
275 }
276}
277
278static char * hcfs2string (int state)
279{
280 switch (state) {
281 case OHCI_USB_RESET: return "reset";
282 case OHCI_USB_RESUME: return "resume";
283 case OHCI_USB_OPER: return "operational";
284 case OHCI_USB_SUSPEND: return "suspend";
285 }
286 return "?";
287}
288
289/* dump control and status registers */
290static void ohci_dump_status (ohci_t *controller)
291{
292 struct ohci_regs *regs = controller->regs;
293 __u32 temp;
294
295 temp = readl (&regs->revision) & 0xff;
296 if (temp != 0x10)
297 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
298
299 temp = readl (&regs->control);
300 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
301 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
302 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
303 (temp & OHCI_CTRL_IR) ? " IR" : "",
304 hcfs2string (temp & OHCI_CTRL_HCFS),
305 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
306 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
307 (temp & OHCI_CTRL_IE) ? " IE" : "",
308 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
309 temp & OHCI_CTRL_CBSR
310 );
311
312 temp = readl (&regs->cmdstatus);
313 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
314 (temp & OHCI_SOC) >> 16,
315 (temp & OHCI_OCR) ? " OCR" : "",
316 (temp & OHCI_BLF) ? " BLF" : "",
317 (temp & OHCI_CLF) ? " CLF" : "",
318 (temp & OHCI_HCR) ? " HCR" : ""
319 );
320
321 ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
322 ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
323
324 maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
325
326 maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
327 maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
328
329 maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
330 maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
331
332 maybe_print_eds ("donehead", readl (&regs->donehead));
333}
334
335static void ohci_dump_roothub (ohci_t *controller, int verbose)
336{
337 __u32 temp, ndp, i;
338
339 temp = roothub_a (controller);
340 ndp = (temp & RH_A_NDP);
341#ifdef CONFIG_AT91C_PQFP_UHPBUG
342 ndp = (ndp == 2) ? 1:0;
3e326ece
MK		 343#endif
344 if (verbose) {
345 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
346 ((temp & RH_A_POTPGT) >> 24) & 0xff,
347 (temp & RH_A_NOCP) ? " NOCP" : "",
348 (temp & RH_A_OCPM) ? " OCPM" : "",
349 (temp & RH_A_DT) ? " DT" : "",
350 (temp & RH_A_NPS) ? " NPS" : "",
351 (temp & RH_A_PSM) ? " PSM" : "",
352 ndp
353 );
354 temp = roothub_b (controller);
355 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
356 temp,
357 (temp & RH_B_PPCM) >> 16,
358 (temp & RH_B_DR)
359 );
360 temp = roothub_status (controller);
361 dbg ("roothub.status: %08x%s%s%s%s%s%s",
362 temp,
363 (temp & RH_HS_CRWE) ? " CRWE" : "",
364 (temp & RH_HS_OCIC) ? " OCIC" : "",
365 (temp & RH_HS_LPSC) ? " LPSC" : "",
366 (temp & RH_HS_DRWE) ? " DRWE" : "",
367 (temp & RH_HS_OCI) ? " OCI" : "",
368 (temp & RH_HS_LPS) ? " LPS" : ""
369 );
370 }
371
372 for (i = 0; i < ndp; i++) {
373 temp = roothub_portstatus (controller, i);
374 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
375 i,
376 temp,
377 (temp & RH_PS_PRSC) ? " PRSC" : "",
378 (temp & RH_PS_OCIC) ? " OCIC" : "",
379 (temp & RH_PS_PSSC) ? " PSSC" : "",
380 (temp & RH_PS_PESC) ? " PESC" : "",
381 (temp & RH_PS_CSC) ? " CSC" : "",
382
383 (temp & RH_PS_LSDA) ? " LSDA" : "",
384 (temp & RH_PS_PPS) ? " PPS" : "",
385 (temp & RH_PS_PRS) ? " PRS" : "",
386 (temp & RH_PS_POCI) ? " POCI" : "",
387 (temp & RH_PS_PSS) ? " PSS" : "",
388
389 (temp & RH_PS_PES) ? " PES" : "",
390 (temp & RH_PS_CCS) ? " CCS" : ""
391 );
392 }
393}
394
395static void ohci_dump (ohci_t *controller, int verbose)
396{
397 dbg ("OHCI controller usb-%s state", controller->slot_name);
398
399 /* dumps some of the state we know about */
400 ohci_dump_status (controller);
401 if (verbose)
402 ep_print_int_eds (controller, "hcca");
403 dbg ("hcca frame #%04x", controller->hcca->frame_no);
404 ohci_dump_roothub (controller, 1);
405}
406
407
408#endif /* DEBUG */
409
410/*-------------------------------------------------------------------------*
411 * Interface functions (URB)
412 *-------------------------------------------------------------------------*/
413
414/* get a transfer request */
415
416int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
417 int transfer_len, struct devrequest *setup, int interval)
418{
419 ohci_t *ohci;
420 ed_t * ed;
421 urb_priv_t *purb_priv;
422 int i, size = 0;
423
424 ohci = &gohci;
425
426 /* when controller's hung, permit only roothub cleanup attempts
427 * such as powering down ports */
428 if (ohci->disabled) {
429 err("sohci_submit_job: EPIPE");
430 return -1;
431 }
ae79f606 432
ddf83a2f
MK		 433 /* if we have an unfinished URB from previous transaction let's
434 * fail and scream as quickly as possible so as not to corrupt
435 * further communication */
436 if (!urb_finished) {
437 err("sohci_submit_job: URB NOT FINISHED");
438 return -1;
439 }
440 /* we're about to begin a new transaction here so mark the URB unfinished */
441 urb_finished = 0;
3e326ece
MK		 442
443 /* every endpoint has a ed, locate and fill it */
444 if (!(ed = ep_add_ed (dev, pipe))) {
445 err("sohci_submit_job: ENOMEM");
446 return -1;
447 }
448
449 /* for the private part of the URB we need the number of TDs (size) */
450 switch (usb_pipetype (pipe)) {
451 case PIPE_BULK: /* one TD for every 4096 Byte */
452 size = (transfer_len - 1) / 4096 + 1;
453 break;
454 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
455 size = (transfer_len == 0)? 2:
456 (transfer_len - 1) / 4096 + 3;
457 break;
458 }
459
460 if (size >= (N_URB_TD - 1)) {
461 err("need %d TDs, only have %d", size, N_URB_TD);
462 return -1;
463 }
464 purb_priv = &urb_priv;
465 purb_priv->pipe = pipe;
466
467 /* fill the private part of the URB */
468 purb_priv->length = size;
469 purb_priv->ed = ed;
470 purb_priv->actual_length = 0;
471
472 /* allocate the TDs */
473 /* note that td[0] was allocated in ep_add_ed */
474 for (i = 0; i < size; i++) {
475 purb_priv->td[i] = td_alloc (dev);
476 if (!purb_priv->td[i]) {
477 purb_priv->length = i;
478 urb_free_priv (purb_priv);
479 err("sohci_submit_job: ENOMEM");
480 return -1;
481 }
482 }
483
484 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
485 urb_free_priv (purb_priv);
486 err("sohci_submit_job: EINVAL");
487 return -1;
488 }
489
490 /* link the ed into a chain if is not already */
491 if (ed->state != ED_OPER)
492 ep_link (ohci, ed);
493
494 /* fill the TDs and link it to the ed */
495 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
496
497 return 0;
498}
499
500/*-------------------------------------------------------------------------*/
501
502#ifdef DEBUG
503/* tell us the current USB frame number */
504
505static int sohci_get_current_frame_number (struct usb_device *usb_dev)
506{
507 ohci_t *ohci = &gohci;
508
509 return m16_swap (ohci->hcca->frame_no);
510}
511#endif
512
513/*-------------------------------------------------------------------------*
514 * ED handling functions
515 *-------------------------------------------------------------------------*/
516
517/* link an ed into one of the HC chains */
518
519static int ep_link (ohci_t *ohci, ed_t *edi)
520{
521 volatile ed_t *ed = edi;
522
523 ed->state = ED_OPER;
524
525 switch (ed->type) {
526 case PIPE_CONTROL:
527 ed->hwNextED = 0;
528 if (ohci->ed_controltail == NULL) {
529 writel (ed, &ohci->regs->ed_controlhead);
530 } else {
ae3b770e 531 ohci->ed_controltail->hwNextED = m32_swap ((unsigned long)ed);
3e326ece
MK		 532 }
533 ed->ed_prev = ohci->ed_controltail;
534 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
535 !ohci->ed_rm_list[1] && !ohci->sleeping) {
536 ohci->hc_control |= OHCI_CTRL_CLE;
537 writel (ohci->hc_control, &ohci->regs->control);
538 }
539 ohci->ed_controltail = edi;
540 break;
541
542 case PIPE_BULK:
543 ed->hwNextED = 0;
544 if (ohci->ed_bulktail == NULL) {
545 writel (ed, &ohci->regs->ed_bulkhead);
546 } else {
ae3b770e 547 ohci->ed_bulktail->hwNextED = m32_swap ((unsigned long)ed);
3e326ece
MK		 548 }
549 ed->ed_prev = ohci->ed_bulktail;
550 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
551 !ohci->ed_rm_list[1] && !ohci->sleeping) {
552 ohci->hc_control |= OHCI_CTRL_BLE;
553 writel (ohci->hc_control, &ohci->regs->control);
554 }
555 ohci->ed_bulktail = edi;
556 break;
557 }
558 return 0;
559}
560
561/*-------------------------------------------------------------------------*/
562
563/* unlink an ed from one of the HC chains.
564 * just the link to the ed is unlinked.
565 * the link from the ed still points to another operational ed or 0
566 * so the HC can eventually finish the processing of the unlinked ed */
567
53e336e9 568static int ep_unlink (ohci_t *ohci, ed_t *edi)
3e326ece 569{
53e336e9
MK		 570 volatile ed_t *ed = edi;
571
3e326ece
MK		 572 ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
573
574 switch (ed->type) {
575 case PIPE_CONTROL:
576 if (ed->ed_prev == NULL) {
577 if (!ed->hwNextED) {
578 ohci->hc_control &= ~OHCI_CTRL_CLE;
579 writel (ohci->hc_control, &ohci->regs->control);
580 }
581 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
582 } else {
583 ed->ed_prev->hwNextED = ed->hwNextED;
584 }
585 if (ohci->ed_controltail == ed) {
586 ohci->ed_controltail = ed->ed_prev;
587 } else {
588 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
589 }
590 break;
591
592 case PIPE_BULK:
593 if (ed->ed_prev == NULL) {
594 if (!ed->hwNextED) {
595 ohci->hc_control &= ~OHCI_CTRL_BLE;
596 writel (ohci->hc_control, &ohci->regs->control);
597 }
598 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
599 } else {
600 ed->ed_prev->hwNextED = ed->hwNextED;
601 }
602 if (ohci->ed_bulktail == ed) {
603 ohci->ed_bulktail = ed->ed_prev;
604 } else {
605 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
606 }
607 break;
608 }
609 ed->state = ED_UNLINK;
610 return 0;
611}
612
613
614/*-------------------------------------------------------------------------*/
615
ddf83a2f
MK		 616/* add/reinit an endpoint; this should be done once at the
617 * usb_set_configuration command, but the USB stack is a little bit
618 * stateless so we do it at every transaction if the state of the ed
619 * is ED_NEW then a dummy td is added and the state is changed to
620 * ED_UNLINK in all other cases the state is left unchanged the ed
621 * info fields are setted anyway even though most of them should not
622 * change
623 */
3e326ece
MK		 624static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
625{
626 td_t *td;
627 ed_t *ed_ret;
628 volatile ed_t *ed;
629
630 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
631 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
632
633 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
634 err("ep_add_ed: pending delete");
635 /* pending delete request */
636 return NULL;
637 }
638
639 if (ed->state == ED_NEW) {
640 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
641 /* dummy td; end of td list for ed */
642 td = td_alloc (usb_dev);
ae3b770e 643 ed->hwTailP = m32_swap ((unsigned long)td);
3e326ece
MK		 644 ed->hwHeadP = ed->hwTailP;
645 ed->state = ED_UNLINK;
646 ed->type = usb_pipetype (pipe);
647 ohci_dev.ed_cnt++;
648 }
649
650 ed->hwINFO = m32_swap (usb_pipedevice (pipe)
651 | usb_pipeendpoint (pipe) << 7
652 | (usb_pipeisoc (pipe)? 0x8000: 0)
653 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
654 | usb_pipeslow (pipe) << 13
655 | usb_maxpacket (usb_dev, pipe) << 16);
656
657 return ed_ret;
658}
659
660/*-------------------------------------------------------------------------*
661 * TD handling functions
662 *-------------------------------------------------------------------------*/
663
664/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
665
666static void td_fill (ohci_t *ohci, unsigned int info,
667 void *data, int len,
668 struct usb_device *dev, int index, urb_priv_t *urb_priv)
669{
670 volatile td_t *td, *td_pt;
671#ifdef OHCI_FILL_TRACE
672 int i;
673#endif
674
675 if (index > urb_priv->length) {
676 err("index > length");
677 return;
678 }
679 /* use this td as the next dummy */
680 td_pt = urb_priv->td [index];
681 td_pt->hwNextTD = 0;
682
683 /* fill the old dummy TD */
684 td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
685
686 td->ed = urb_priv->ed;
687 td->next_dl_td = NULL;
688 td->index = index;
689 td->data = (__u32)data;
690#ifdef OHCI_FILL_TRACE
691 if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
692 for (i = 0; i < len; i++)
693 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
694 printf("\n");
695 }
696#endif
697 if (!len)
698 data = 0;
699
700 td->hwINFO = m32_swap (info);
ae3b770e 701 td->hwCBP = m32_swap ((unsigned long)data);
3e326ece 702 if (data)
ae3b770e 703 td->hwBE = m32_swap ((unsigned long)(data + len - 1));
3e326ece
MK		 704 else
705 td->hwBE = 0;
ae3b770e 706 td->hwNextTD = m32_swap ((unsigned long)td_pt);
3e326ece
MK		 707
708 /* append to queue */
709 td->ed->hwTailP = td->hwNextTD;
710}
711
712/*-------------------------------------------------------------------------*/
713
714/* prepare all TDs of a transfer */
715
716static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
717 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
718{
719 ohci_t *ohci = &gohci;
720 int data_len = transfer_len;
721 void *data;
722 int cnt = 0;
723 __u32 info = 0;
724 unsigned int toggle = 0;
725
726 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
727 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
728 toggle = TD_T_TOGGLE;
729 } else {
730 toggle = TD_T_DATA0;
731 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
732 }
733 urb->td_cnt = 0;
734 if (data_len)
735 data = buffer;
736 else
737 data = 0;
738
739 switch (usb_pipetype (pipe)) {
740 case PIPE_BULK:
741 info = usb_pipeout (pipe)?
742 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
743 while(data_len > 4096) {
744 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
745 data += 4096; data_len -= 4096; cnt++;
746 }
747 info = usb_pipeout (pipe)?
748 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
749 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
750 cnt++;
751
752 if (!ohci->sleeping)
753 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
754 break;
755
756 case PIPE_CONTROL:
757 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
758 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
759 if (data_len > 0) {
760 info = usb_pipeout (pipe)?
761 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
762 /* NOTE: mishandles transfers >8K, some >4K */
763 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
764 }
765 info = usb_pipeout (pipe)?
766 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
767 td_fill (ohci, info, data, 0, dev, cnt++, urb);
768 if (!ohci->sleeping)
769 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
770 break;
771 }
772 if (urb->length != cnt)
773 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
774}
775
776/*-------------------------------------------------------------------------*
777 * Done List handling functions
778 *-------------------------------------------------------------------------*/
779
780
781/* calculate the transfer length and update the urb */
782
783static void dl_transfer_length(td_t * td)
784{
785 __u32 tdINFO, tdBE, tdCBP;
786 urb_priv_t *lurb_priv = &urb_priv;
787
788 tdINFO = m32_swap (td->hwINFO);
789 tdBE = m32_swap (td->hwBE);
790 tdCBP = m32_swap (td->hwCBP);
791
792
793 if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
794 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
795 if (tdBE != 0) {
796 if (td->hwCBP == 0)
797 lurb_priv->actual_length += tdBE - td->data + 1;
798 else
799 lurb_priv->actual_length += tdCBP - td->data;
800 }
801 }
802}
803
804/*-------------------------------------------------------------------------*/
805
806/* replies to the request have to be on a FIFO basis so
807 * we reverse the reversed done-list */
808
809static td_t * dl_reverse_done_list (ohci_t *ohci)
810{
811 __u32 td_list_hc;
812 td_t *td_rev = NULL;
813 td_t *td_list = NULL;
814 urb_priv_t *lurb_priv = NULL;
815
816 td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
817 ohci->hcca->done_head = 0;
818
819 while (td_list_hc) {
820 td_list = (td_t *)td_list_hc;
821
822 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
823 lurb_priv = &urb_priv;
824 dbg(" USB-error/status: %x : %p",
825 TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
826 if (td_list->ed->hwHeadP & m32_swap (0x1)) {
827 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
828 td_list->ed->hwHeadP =
829 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
830 (td_list->ed->hwHeadP & m32_swap (0x2));
831 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
832 } else
833 td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
834 }
53e336e9
MK		 835#ifdef CONFIG_MPC5200
836 td_list->hwNextTD = 0;
837#endif
3e326ece
MK		 838 }
839
840 td_list->next_dl_td = td_rev;
841 td_rev = td_list;
842 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
843 }
844 return td_list;
845}
846
847/*-------------------------------------------------------------------------*/
848
849/* td done list */
850static int dl_done_list (ohci_t *ohci, td_t *td_list)
851{
852 td_t *td_list_next = NULL;
853 ed_t *ed;
854 int cc = 0;
855 int stat = 0;
856 /* urb_t *urb; */
857 urb_priv_t *lurb_priv;
858 __u32 tdINFO, edHeadP, edTailP;
859
860 while (td_list) {
861 td_list_next = td_list->next_dl_td;
862
863 lurb_priv = &urb_priv;
864 tdINFO = m32_swap (td_list->hwINFO);
865
866 ed = td_list->ed;
867
868 dl_transfer_length(td_list);
869
870 /* error code of transfer */
871 cc = TD_CC_GET (tdINFO);
872 if (cc != 0) {
873 dbg("ConditionCode %#x", cc);
874 stat = cc_to_error[cc];
875 }
ae79f606 876
ddf83a2f
MK		 877 /* see if this done list makes for all TD's of current URB,
878 * and mark the URB finished if so */
879 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
ae3b770e
MK		 880#if 1
881 if ((ed->state & (ED_OPER | ED_UNLINK)) &&
882 (lurb_priv->state != URB_DEL))
883#else
ddf83a2f
MK		 884 if ((ed->state & (ED_OPER | ED_UNLINK)))
885 urb_finished = 1;
886 else
887 dbg("dl_done_list: strange.., ED state %x, ed->state\n");
888 } else
889 dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
890 lurb_priv->length);
891#endif
3e326ece
MK		 892 if (ed->state != ED_NEW) {
893 edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
894 edTailP = m32_swap (ed->hwTailP);
895
896 /* unlink eds if they are not busy */
897 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
898 ep_unlink (ohci, ed);
899 }
900
901 td_list = td_list_next;
902 }
903 return stat;
904}
905
906/*-------------------------------------------------------------------------*
907 * Virtual Root Hub
908 *-------------------------------------------------------------------------*/
909
910/* Device descriptor */
911static __u8 root_hub_dev_des[] =
912{
913 0x12, /* __u8 bLength; */
914 0x01, /* __u8 bDescriptorType; Device */
915 0x10, /* __u16 bcdUSB; v1.1 */
916 0x01,
917 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
918 0x00, /* __u8 bDeviceSubClass; */
919 0x00, /* __u8 bDeviceProtocol; */
920 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
921 0x00, /* __u16 idVendor; */
922 0x00,
923 0x00, /* __u16 idProduct; */
924 0x00,
925 0x00, /* __u16 bcdDevice; */
926 0x00,
927 0x00, /* __u8 iManufacturer; */
928 0x01, /* __u8 iProduct; */
929 0x00, /* __u8 iSerialNumber; */
930 0x01 /* __u8 bNumConfigurations; */
931};
932
933
934/* Configuration descriptor */
935static __u8 root_hub_config_des[] =
936{
937 0x09, /* __u8 bLength; */
938 0x02, /* __u8 bDescriptorType; Configuration */
939 0x19, /* __u16 wTotalLength; */
940 0x00,
941 0x01, /* __u8 bNumInterfaces; */
942 0x01, /* __u8 bConfigurationValue; */
943 0x00, /* __u8 iConfiguration; */
944 0x40, /* __u8 bmAttributes;
945 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
946 0x00, /* __u8 MaxPower; */
947
948 /* interface */
949 0x09, /* __u8 if_bLength; */
950 0x04, /* __u8 if_bDescriptorType; Interface */
951 0x00, /* __u8 if_bInterfaceNumber; */
952 0x00, /* __u8 if_bAlternateSetting; */
953 0x01, /* __u8 if_bNumEndpoints; */
954 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
955 0x00, /* __u8 if_bInterfaceSubClass; */
956 0x00, /* __u8 if_bInterfaceProtocol; */
957 0x00, /* __u8 if_iInterface; */
958
959 /* endpoint */
960 0x07, /* __u8 ep_bLength; */
961 0x05, /* __u8 ep_bDescriptorType; Endpoint */
962 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
963 0x03, /* __u8 ep_bmAttributes; Interrupt */
964 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
965 0x00,
966 0xff /* __u8 ep_bInterval; 255 ms */
967};
968
969static unsigned char root_hub_str_index0[] =
970{
971 0x04, /* __u8 bLength; */
972 0x03, /* __u8 bDescriptorType; String-descriptor */
973 0x09, /* __u8 lang ID */
974 0x04, /* __u8 lang ID */
975};
976
977static unsigned char root_hub_str_index1[] =
978{
979 28, /* __u8 bLength; */
980 0x03, /* __u8 bDescriptorType; String-descriptor */
981 'O', /* __u8 Unicode */
982 0, /* __u8 Unicode */
983 'H', /* __u8 Unicode */
984 0, /* __u8 Unicode */
985 'C', /* __u8 Unicode */
986 0, /* __u8 Unicode */
987 'I', /* __u8 Unicode */
988 0, /* __u8 Unicode */
989 ' ', /* __u8 Unicode */
990 0, /* __u8 Unicode */
991 'R', /* __u8 Unicode */
992 0, /* __u8 Unicode */
993 'o', /* __u8 Unicode */
994 0, /* __u8 Unicode */
995 'o', /* __u8 Unicode */
996 0, /* __u8 Unicode */
997 't', /* __u8 Unicode */
998 0, /* __u8 Unicode */
999 ' ', /* __u8 Unicode */
1000 0, /* __u8 Unicode */
1001 'H', /* __u8 Unicode */
1002 0, /* __u8 Unicode */
1003 'u', /* __u8 Unicode */
1004 0, /* __u8 Unicode */
1005 'b', /* __u8 Unicode */
1006 0, /* __u8 Unicode */
1007};
1008
1009/* Hub class-specific descriptor is constructed dynamically */
1010
1011
1012/*-------------------------------------------------------------------------*/
1013
1014#define OK(x) len = (x); break
1015#ifdef DEBUG
1016#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
1017#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
1018#else
1019#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
1020#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
1021#endif
1022#define RD_RH_STAT roothub_status(&gohci)
1023#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
1024
1025/* request to virtual root hub */
1026
1027int rh_check_port_status(ohci_t *controller)
1028{
1029 __u32 temp, ndp, i;
1030 int res;
1031
1032 res = -1;
1033 temp = roothub_a (controller);
1034 ndp = (temp & RH_A_NDP);
1035#ifdef CONFIG_AT91C_PQFP_UHPBUG
1036 ndp = (ndp == 2) ? 1:0;
1037#endif
1038 for (i = 0; i < ndp; i++) {
1039 temp = roothub_portstatus (controller, i);
1040 /* check for a device disconnect */
1041 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1042 (RH_PS_PESC | RH_PS_CSC)) &&
1043 ((temp & RH_PS_CCS) == 0)) {
1044 res = i;
1045 break;
1046 }
1047 }
1048 return res;
1049}
1050
1051static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1052 void *buffer, int transfer_len, struct devrequest *cmd)
1053{
1054 void * data = buffer;
1055 int leni = transfer_len;
1056 int len = 0;
1057 int stat = 0;
1058 __u32 datab[4];
1059 __u8 *data_buf = (__u8 *)datab;
1060 __u16 bmRType_bReq;
1061 __u16 wValue;
1062 __u16 wIndex;
1063 __u16 wLength;
1064
1065#ifdef DEBUG
1066urb_priv.actual_length = 0;
1067pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1068#else
1069 wait_ms(1);
1070#endif
1071 if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1072 info("Root-Hub submit IRQ: NOT implemented");
1073 return 0;
1074 }
1075
1076 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
ae3b770e
MK		 1077#if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
1078 wValue = __swap_16(cmd->value);
1079 wIndex = __swap_16(cmd->index);
1080 wLength = __swap_16(cmd->length);
1081#else
3e326ece
MK		 1082 wValue = m16_swap (cmd->value);
1083 wIndex = m16_swap (cmd->index);
1084 wLength = m16_swap (cmd->length);
ae3b770e 1085#endif /* CONFIG_440EP || CONFIG_MPC5200 */
3e326ece
MK		 1086
1087 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1088 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1089
1090 switch (bmRType_bReq) {
1091 /* Request Destination:
1092 without flags: Device,
1093 RH_INTERFACE: interface,
1094 RH_ENDPOINT: endpoint,
1095 RH_CLASS means HUB here,
1096 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1097 */
1098
ae3b770e
MK		 1099#if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
1100 case RH_GET_STATUS:
1101 *(__u16 *) data_buf = __swap_16(1); OK (2);
1102 case RH_GET_STATUS | RH_INTERFACE:
1103 *(__u16 *) data_buf = __swap_16(0); OK (2);
1104 case RH_GET_STATUS | RH_ENDPOINT:
1105 *(__u16 *) data_buf = __swap_16(0); OK (2);
1106 case RH_GET_STATUS | RH_CLASS:
1107 *(__u32 *) data_buf = __swap_32(
1108 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1109 OK (4);
1110 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1111 *(__u32 *) data_buf = __swap_32(RD_RH_PORTSTAT); OK (4);
1112#else
3e326ece
MK		 1113 case RH_GET_STATUS:
1114 *(__u16 *) data_buf = m16_swap (1); OK (2);
1115 case RH_GET_STATUS | RH_INTERFACE:
1116 *(__u16 *) data_buf = m16_swap (0); OK (2);
1117 case RH_GET_STATUS | RH_ENDPOINT:
1118 *(__u16 *) data_buf = m16_swap (0); OK (2);
1119 case RH_GET_STATUS | RH_CLASS:
1120 *(__u32 *) data_buf = m32_swap (
1121 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1122 OK (4);
1123 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1124 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
ae3b770e 1125#endif /* CONFIG_440EP || CONFIG_MPC5200 */
3e326ece
MK		 1126
1127 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1128 switch (wValue) {
1129 case (RH_ENDPOINT_STALL): OK (0);
1130 }
1131 break;
1132
1133 case RH_CLEAR_FEATURE | RH_CLASS:
1134 switch (wValue) {
1135 case RH_C_HUB_LOCAL_POWER:
1136 OK(0);
1137 case (RH_C_HUB_OVER_CURRENT):
1138 WR_RH_STAT(RH_HS_OCIC); OK (0);
1139 }
1140 break;
1141
1142 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1143 switch (wValue) {
1144 case (RH_PORT_ENABLE):
1145 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1146 case (RH_PORT_SUSPEND):
1147 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1148 case (RH_PORT_POWER):
1149 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1150 case (RH_C_PORT_CONNECTION):
1151 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1152 case (RH_C_PORT_ENABLE):
1153 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1154 case (RH_C_PORT_SUSPEND):
1155 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1156 case (RH_C_PORT_OVER_CURRENT):
1157 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1158 case (RH_C_PORT_RESET):
1159 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1160 }
1161 break;
1162
1163 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1164 switch (wValue) {
1165 case (RH_PORT_SUSPEND):
1166 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1167 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1168 if (RD_RH_PORTSTAT & RH_PS_CCS)
1169 WR_RH_PORTSTAT (RH_PS_PRS);
1170 OK (0);
1171 case (RH_PORT_POWER):
d98c0885
RG		 1172 WR_RH_PORTSTAT (RH_PS_PPS );
1173 wait_ms(100);
1174 OK (0);
3e326ece
MK		 1175 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1176 if (RD_RH_PORTSTAT & RH_PS_CCS)
1177 WR_RH_PORTSTAT (RH_PS_PES );
1178 OK (0);
1179 }
1180 break;
1181
1182 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1183
1184 case RH_GET_DESCRIPTOR:
1185 switch ((wValue & 0xff00) >> 8) {
1186 case (0x01): /* device descriptor */
1187 len = min_t(unsigned int,
1188 leni,
1189 min_t(unsigned int,
1190 sizeof (root_hub_dev_des),
1191 wLength));
1192 data_buf = root_hub_dev_des; OK(len);
1193 case (0x02): /* configuration descriptor */
1194 len = min_t(unsigned int,
1195 leni,
1196 min_t(unsigned int,
1197 sizeof (root_hub_config_des),
1198 wLength));
1199 data_buf = root_hub_config_des; OK(len);
1200 case (0x03): /* string descriptors */
1201 if(wValue==0x0300) {
1202 len = min_t(unsigned int,
1203 leni,
1204 min_t(unsigned int,
1205 sizeof (root_hub_str_index0),
1206 wLength));
1207 data_buf = root_hub_str_index0;
1208 OK(len);
1209 }
1210 if(wValue==0x0301) {
1211 len = min_t(unsigned int,
1212 leni,
1213 min_t(unsigned int,
1214 sizeof (root_hub_str_index1),
1215 wLength));
1216 data_buf = root_hub_str_index1;
1217 OK(len);
1218 }
1219 default:
1220 stat = USB_ST_STALLED;
1221 }
1222 break;
1223
1224 case RH_GET_DESCRIPTOR | RH_CLASS:
1225 {
1226 __u32 temp = roothub_a (&gohci);
1227
1228 data_buf [0] = 9; /* min length; */
1229 data_buf [1] = 0x29;
1230 data_buf [2] = temp & RH_A_NDP;
1231#ifdef CONFIG_AT91C_PQFP_UHPBUG
1232 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1233#endif
3e326ece
MK		 1234 data_buf [3] = 0;
1235 if (temp & RH_A_PSM) /* per-port power switching? */
1236 data_buf [3] |= 0x1;
1237 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1238 data_buf [3] |= 0x10;
3e326ece
MK		 1239 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1240 data_buf [3] |= 0x8;
3e326ece
MK		 1241
1242 /* corresponds to data_buf[4-7] */
1243 datab [1] = 0;
1244 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1245 temp = roothub_b (&gohci);
1246 data_buf [7] = temp & RH_B_DR;
1247 if (data_buf [2] < 7) {
1248 data_buf [8] = 0xff;
1249 } else {
1250 data_buf [0] += 2;
1251 data_buf [8] = (temp & RH_B_DR) >> 8;
1252 data_buf [10] = data_buf [9] = 0xff;
1253 }
1254
1255 len = min_t(unsigned int, leni,
ddf83a2f 1256 min_t(unsigned int, data_buf [0], wLength));
3e326ece
MK		 1257 OK (len);
1258 }
1259
1260 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1261
1262 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1263
1264 default:
1265 dbg ("unsupported root hub command");
1266 stat = USB_ST_STALLED;
1267 }
1268
1269#ifdef DEBUG
1270 ohci_dump_roothub (&gohci, 1);
1271#else
1272 wait_ms(1);
1273#endif
1274
1275 len = min_t(int, len, leni);
1276 if (data != data_buf)
1277 memcpy (data, data_buf, len);
1278 dev->act_len = len;
1279 dev->status = stat;
1280
1281#ifdef DEBUG
1282 if (transfer_len)
1283 urb_priv.actual_length = transfer_len;
1284 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1285#else
1286 wait_ms(1);
1287#endif
1288
1289 return stat;
1290}
1291
1292/*-------------------------------------------------------------------------*/
1293
1294/* common code for handling submit messages - used for all but root hub */
1295/* accesses. */
1296int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1297 int transfer_len, struct devrequest *setup, int interval)
1298{
1299 int stat = 0;
1300 int maxsize = usb_maxpacket(dev, pipe);
1301 int timeout;
1302
1303 /* device pulled? Shortcut the action. */
1304 if (devgone == dev) {
1305 dev->status = USB_ST_CRC_ERR;
1306 return 0;
1307 }
1308
1309#ifdef DEBUG
1310 urb_priv.actual_length = 0;
1311 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1312#else
1313 wait_ms(1);
1314#endif
1315 if (!maxsize) {
1316 err("submit_common_message: pipesize for pipe %lx is zero",
1317 pipe);
1318 return -1;
1319 }
1320
1321 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1322 err("sohci_submit_job failed");
1323 return -1;
1324 }
1325
ae3b770e 1326#if 0
3e326ece
MK		 1327 wait_ms(10);
1328 /* ohci_dump_status(&gohci); */
ae3b770e 1329#endif
3e326ece
MK		 1330
1331 /* allow more time for a BULK device to react - some are slow */
1332#define BULK_TO 5000 /* timeout in milliseconds */
1333 if (usb_pipetype (pipe) == PIPE_BULK)
1334 timeout = BULK_TO;
1335 else
1336 timeout = 100;
1337
1338 /* wait for it to complete */
1339 for (;;) {
1340 /* check whether the controller is done */
1341 stat = hc_interrupt();
1342 if (stat < 0) {
1343 stat = USB_ST_CRC_ERR;
1344 break;
1345 }
ddf83a2f 1346
ddf83a2f
MK		 1347 /* NOTE: since we are not interrupt driven in U-Boot and always
1348 * handle only one URB at a time, we cannot assume the
1349 * transaction finished on the first successful return from
1350 * hc_interrupt().. unless the flag for current URB is set,
1351 * meaning that all TD's to/from device got actually
1352 * transferred and processed. If the current URB is not
1353 * finished we need to re-iterate this loop so as
1354 * hc_interrupt() gets called again as there needs to be some
1355 * more TD's to process still */
1356 if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
3e326ece
MK		 1357 /* 0xff is returned for an SF-interrupt */
1358 break;
1359 }
ddf83a2f 1360
3e326ece
MK		 1361 if (--timeout) {
1362 wait_ms(1);
1363 } else {
1364 err("CTL:TIMEOUT ");
ddf83a2f 1365 dbg("submit_common_msg: TO status %x\n", stat);
ae3b770e 1366 stat = USB_ST_CRC_ERR;
ddf83a2f 1367 urb_finished = 1;
3e326ece
MK		 1368 stat = USB_ST_CRC_ERR;
1369 break;
1370 }
1371 }
3e326ece
MK		 1372
1373 dev->status = stat;
1374 dev->act_len = transfer_len;
1375
1376#ifdef DEBUG
1377 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1378#else
1379 wait_ms(1);
1380#endif
1381
1382 /* free TDs in urb_priv */
1383 urb_free_priv (&urb_priv);
1384 return 0;
1385}
1386
1387/* submit routines called from usb.c */
1388int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1389 int transfer_len)
1390{
1391 info("submit_bulk_msg");
1392 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1393}
1394
1395int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1396 int transfer_len, struct devrequest *setup)
1397{
1398 int maxsize = usb_maxpacket(dev, pipe);
1399
1400 info("submit_control_msg");
1401#ifdef DEBUG
1402 urb_priv.actual_length = 0;
1403 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1404#else
1405 wait_ms(1);
1406#endif
1407 if (!maxsize) {
1408 err("submit_control_message: pipesize for pipe %lx is zero",
1409 pipe);
1410 return -1;
1411 }
1412 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1413 gohci.rh.dev = dev;
1414 /* root hub - redirect */
1415 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1416 setup);
1417 }
1418
1419 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1420}
1421
1422int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1423 int transfer_len, int interval)
1424{
1425 info("submit_int_msg");
1426 return -1;
1427}
1428
1429/*-------------------------------------------------------------------------*
1430 * HC functions
1431 *-------------------------------------------------------------------------*/
1432
1433/* reset the HC and BUS */
1434
1435static int hc_reset (ohci_t *ohci)
1436{
1437 int timeout = 30;
1438 int smm_timeout = 50; /* 0,5 sec */
1439
1440 dbg("%s\n", __FUNCTION__);
1441
1442 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1443 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1444 info("USB HC TakeOver from SMM");
1445 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1446 wait_ms (10);
1447 if (--smm_timeout == 0) {
1448 err("USB HC TakeOver failed!");
1449 return -1;
1450 }
1451 }
1452 }
1453
1454 /* Disable HC interrupts */
1455 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1456
1457 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1458 ohci->slot_name,
1459 readl(&ohci->regs->control));
1460
1461 /* Reset USB (needed by some controllers) */
53e336e9
MK		 1462 ohci->hc_control = 0;
1463 writel (ohci->hc_control, &ohci->regs->control);
3e326ece
MK		 1464
1465 /* HC Reset requires max 10 us delay */
1466 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1467 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1468 if (--timeout == 0) {
1469 err("USB HC reset timed out!");
1470 return -1;
1471 }
1472 udelay (1);
1473 }
1474 return 0;
1475}
1476
1477/*-------------------------------------------------------------------------*/
1478
1479/* Start an OHCI controller, set the BUS operational
1480 * enable interrupts
1481 * connect the virtual root hub */
1482
1483static int hc_start (ohci_t * ohci)
1484{
1485 __u32 mask;
1486 unsigned int fminterval;
1487
1488 ohci->disabled = 1;
1489
1490 /* Tell the controller where the control and bulk lists are
1491 * The lists are empty now. */
1492
1493 writel (0, &ohci->regs->ed_controlhead);
1494 writel (0, &ohci->regs->ed_bulkhead);
1495
1496 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1497
1498 fminterval = 0x2edf;
1499 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1500 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1501 writel (fminterval, &ohci->regs->fminterval);
1502 writel (0x628, &ohci->regs->lsthresh);
1503
1504 /* start controller operations */
1505 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1506 ohci->disabled = 0;
1507 writel (ohci->hc_control, &ohci->regs->control);
1508
1509 /* disable all interrupts */
1510 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1511 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1512 OHCI_INTR_OC | OHCI_INTR_MIE);
1513 writel (mask, &ohci->regs->intrdisable);
1514 /* clear all interrupts */
1515 mask &= ~OHCI_INTR_MIE;
1516 writel (mask, &ohci->regs->intrstatus);
1517 /* Choose the interrupts we care about now - but w/o MIE */
1518 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1519 writel (mask, &ohci->regs->intrenable);
1520
1521#ifdef OHCI_USE_NPS
1522 /* required for AMD-756 and some Mac platforms */
1523 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1524 &ohci->regs->roothub.a);
1525 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1526#endif /* OHCI_USE_NPS */
1527
1528#define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1529 /* POTPGT delay is bits 24-31, in 2 ms units. */
1530 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1531
1532 /* connect the virtual root hub */
1533 ohci->rh.devnum = 0;
1534
1535 return 0;
1536}
1537
1538/*-------------------------------------------------------------------------*/
1539
1540/* an interrupt happens */
1541
ddf83a2f 1542static int hc_interrupt (void)
3e326ece
MK		 1543{
1544 ohci_t *ohci = &gohci;
1545 struct ohci_regs *regs = ohci->regs;
1546 int ints;
1547 int stat = -1;
1548
ddf83a2f
MK		 1549 if ((ohci->hcca->done_head != 0) &&
1550 !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1551 ints = OHCI_INTR_WDH;
1552 } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1553 ohci->disabled++;
1554 err ("%s device removed!", ohci->slot_name);
1555 return -1;
1556 } else if ((ints &= readl (&regs->intrenable)) == 0) {
1557 dbg("hc_interrupt: returning..\n");
1558 return 0xff;
1559 }
ae79f606 1560
3e326ece
MK		 1561 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1562
1563 if (ints & OHCI_INTR_RHSC) {
1564 got_rhsc = 1;
ddf83a2f 1565 stat = 0xff;
3e326ece
MK		 1566 }
1567
1568 if (ints & OHCI_INTR_UE) {
1569 ohci->disabled++;
1570 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1571 ohci->slot_name);
1572 /* e.g. due to PCI Master/Target Abort */
1573
1574#ifdef DEBUG
1575 ohci_dump (ohci, 1);
1576#else
1577 wait_ms(1);
1578#endif
1579 /* FIXME: be optimistic, hope that bug won't repeat often. */
1580 /* Make some non-interrupt context restart the controller. */
1581 /* Count and limit the retries though; either hardware or */
1582 /* software errors can go forever... */
1583 hc_reset (ohci);
1584 return -1;
1585 }
1586
1587 if (ints & OHCI_INTR_WDH) {
1588 wait_ms(1);
1589 writel (OHCI_INTR_WDH, &regs->intrdisable);
1590 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1591 writel (OHCI_INTR_WDH, &regs->intrenable);
1592 }
1593
1594 if (ints & OHCI_INTR_SO) {
1595 dbg("USB Schedule overrun\n");
1596 writel (OHCI_INTR_SO, &regs->intrenable);
1597 stat = -1;
1598 }
1599
1600 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1601 if (ints & OHCI_INTR_SF) {
1602 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1603 wait_ms(1);
1604 writel (OHCI_INTR_SF, &regs->intrdisable);
1605 if (ohci->ed_rm_list[frame] != NULL)
1606 writel (OHCI_INTR_SF, &regs->intrenable);
1607 stat = 0xff;
1608 }
1609
1610 writel (ints, &regs->intrstatus);
1611 return stat;
1612}
1613
1614/*-------------------------------------------------------------------------*/
1615
1616/*-------------------------------------------------------------------------*/
1617
1618/* De-allocate all resources.. */
1619
1620static void hc_release_ohci (ohci_t *ohci)
1621{
1622 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1623
1624 if (!ohci->disabled)
1625 hc_reset (ohci);
1626}
1627
1628/*-------------------------------------------------------------------------*/
1629
1630/*
1631 * low level initalisation routine, called from usb.c
1632 */
1633static char ohci_inited = 0;
1634
1635int usb_lowlevel_init(void)
1636{
24e37645 1637
ddf83a2f 1638#ifdef CFG_USB_OHCI_CPU_INIT
24e37645
MK		 1639 /* cpu dependant init */
1640 if(usb_cpu_init())
3e326ece 1641 return -1;
24e37645 1642#endif
3e326ece 1643
ddf83a2f 1644#ifdef CFG_USB_OHCI_BOARD_INIT
24e37645
MK		 1645 /* board dependant init */
1646 if(usb_board_init())
1647 return -1;
1648#endif
3e326ece
MK		 1649 memset (&gohci, 0, sizeof (ohci_t));
1650 memset (&urb_priv, 0, sizeof (urb_priv_t));
1651
1652 /* align the storage */
1653 if ((__u32)&ghcca[0] & 0xff) {
1654 err("HCCA not aligned!!");
1655 return -1;
1656 }
1657 phcca = &ghcca[0];
1658 info("aligned ghcca %p", phcca);
1659 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1660 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1661 err("EDs not aligned!!");
1662 return -1;
1663 }
1664 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1665 if ((__u32)gtd & 0x7) {
1666 err("TDs not aligned!!");
1667 return -1;
1668 }
1669 ptd = gtd;
1670 gohci.hcca = phcca;
1671 memset (phcca, 0, sizeof (struct ohci_hcca));
1672
1673 gohci.disabled = 1;
1674 gohci.sleeping = 0;
1675 gohci.irq = -1;
24e37645 1676 gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
3e326ece
MK		 1677
1678 gohci.flags = 0;
301f1aa3 1679 gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
3e326ece
MK		 1680
1681 if (hc_reset (&gohci) < 0) {
1682 hc_release_ohci (&gohci);
1683 err ("can't reset usb-%s", gohci.slot_name);
ddf83a2f 1684#ifdef CFG_USB_OHCI_BOARD_INIT
24e37645 1685 /* board dependant cleanup */
ddf83a2f 1686 usb_board_init_fail();
24e37645
MK		 1687#endif
1688
ddf83a2f 1689#ifdef CFG_USB_OHCI_CPU_INIT
24e37645 1690 /* cpu dependant cleanup */
ddf83a2f 1691 usb_cpu_init_fail();
24e37645 1692#endif
3e326ece
MK		 1693 return -1;
1694 }
1695
1696 /* FIXME this is a second HC reset; why?? */
1697 /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1698 wait_ms(10); */
3e326ece
MK		 1699 if (hc_start (&gohci) < 0) {
1700 err ("can't start usb-%s", gohci.slot_name);
1701 hc_release_ohci (&gohci);
1702 /* Initialization failed */
ddf83a2f 1703#ifdef CFG_USB_OHCI_BOARD_INIT
24e37645
MK		 1704 /* board dependant cleanup */
1705 usb_board_stop();
1706#endif
1707
ddf83a2f 1708#ifdef CFG_USB_OHCI_CPU_INIT
24e37645
MK		 1709 /* cpu dependant cleanup */
1710 usb_cpu_stop();
1711#endif
3e326ece
MK		 1712 return -1;
1713 }
1714
1715#ifdef DEBUG
1716 ohci_dump (&gohci, 1);
1717#else
1718 wait_ms(1);
ddf83a2f 1719 urb_finished = 1;
3e326ece
MK		 1720#endif
1721 ohci_inited = 1;
1722 return 0;
1723}
1724
1725int usb_lowlevel_stop(void)
1726{
1727 /* this gets called really early - before the controller has */
1728 /* even been initialized! */
1729 if (!ohci_inited)
1730 return 0;
1731 /* TODO release any interrupts, etc. */
1732 /* call hc_release_ohci() here ? */
1733 hc_reset (&gohci);
1734
ddf83a2f 1735#ifdef CFG_USB_OHCI_BOARD_INIT
3e326ece
MK		 1736 /* board dependant cleanup */
1737 if(usb_board_stop())
1738 return -1;
24e37645
MK		 1739#endif
1740
ddf83a2f 1741#ifdef CFG_USB_OHCI_CPU_INIT
24e37645
MK		 1742 /* cpu dependant cleanup */
1743 if(usb_cpu_stop())
1744 return -1;
1745#endif
3e326ece
MK		 1746
1747 return 0;
1748}
7b59b3c7 1749#endif /* CONFIG_USB_OHCI_NEW */
"Das U-Boot" Source Tree