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3e38691e 1/* The dpalloc function used and implemented in this file was derieved
a47a12be 2 * from PPCBoot/U-Boot file "arch/powerpc/cpu/mpc8260/commproc.c".
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3 */
4
5/* Author: Arun Dharankar <ADharankar@ATTBI.Com>
6 * This example is meant to only demonstrate how the IDMA could be used.
7 */
8
9/*
a47a12be 10 * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's
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11 * copyright notice:
12 *
13 * General Purpose functions for the global management of the
14 * 8260 Communication Processor Module.
15 * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
16 * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
17 * 2.3.99 Updates
18 *
19 * In addition to the individual control of the communication
20 * channels, there are a few functions that globally affect the
21 * communication processor.
22 *
23 * Buffer descriptors must be allocated from the dual ported memory
24 * space. The allocator for that is here. When the communication
25 * process is reset, we reclaim the memory available. There is
26 * currently no deallocator for this memory.
27 */
28
29
3e38691e 30#include <common.h>
27b207fd 31#include <exports.h>
3e38691e 32
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33DECLARE_GLOBAL_DATA_PTR;
34
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35#define STANDALONE
36
37#ifndef STANDALONE /* Linked into/Part of PPCBoot */
38#include <command.h>
39#include <watchdog.h>
40#else /* Standalone app of PPCBoot */
3e38691e 41#define WATCHDOG_RESET() { \
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42 *(ushort *)(CONFIG_SYS_IMMR + 0x1000E) = 0x556c; \
43 *(ushort *)(CONFIG_SYS_IMMR + 0x1000E) = 0xaa39; \
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44 }
45#endif /* STANDALONE */
46
47static int debug = 1;
48
49#define DEBUG(fmt, args...) { \
50 if(debug != 0) { \
51 printf("[%s %d %s]: ",__FILE__,__LINE__,__FUNCTION__); \
52 printf(fmt, ##args); \
53 } \
54}
55
56#define CPM_CR_IDMA1_SBLOCK (0x14)
57#define CPM_CR_IDMA2_SBLOCK (0x15)
58#define CPM_CR_IDMA3_SBLOCK (0x16)
59#define CPM_CR_IDMA4_SBLOCK (0x17)
60#define CPM_CR_IDMA1_PAGE (0x07)
61#define CPM_CR_IDMA2_PAGE (0x08)
62#define CPM_CR_IDMA3_PAGE (0x09)
63#define CPM_CR_IDMA4_PAGE (0x0a)
64#define PROFF_IDMA1_BASE ((uint)0x87fe)
65#define PROFF_IDMA2_BASE ((uint)0x88fe)
66#define PROFF_IDMA3_BASE ((uint)0x89fe)
67#define PROFF_IDMA4_BASE ((uint)0x8afe)
68
69#define CPM_CR_INIT_TRX ((ushort)0x0000)
70#define CPM_CR_FLG ((ushort)0x0001)
71
72#define mk_cr_cmd(PG, SBC, MCN, OP) \
73 ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
74
75
76#pragma pack(1)
77typedef struct ibdbits {
78 unsigned b_valid:1;
79 unsigned b_resv1:1;
80 unsigned b_wrap:1;
81 unsigned b_interrupt:1;
82 unsigned b_last:1;
83 unsigned b_resv2:1;
84 unsigned b_cm:1;
85 unsigned b_resv3:2;
86 unsigned b_sdn:1;
87 unsigned b_ddn:1;
88 unsigned b_dgbl:1;
89 unsigned b_dbo:2;
90 unsigned b_resv4:1;
91 unsigned b_ddtb:1;
92 unsigned b_resv5:2;
93 unsigned b_sgbl:1;
94 unsigned b_sbo:2;
95 unsigned b_resv6:1;
96 unsigned b_sdtb:1;
97 unsigned b_resv7:9;
98} ibdbits_t;
99
100#pragma pack(1)
101typedef union ibdbitsu {
102 ibdbits_t b;
103 uint i;
104} ibdbitsu_t;
105
106#pragma pack(1)
107typedef struct idma_buf_desc {
108 ibdbitsu_t ibd_bits; /* Status and Control */
109 uint ibd_datlen; /* Data length in buffer */
110 uint ibd_sbuf; /* Source buffer addr in host mem */
111 uint ibd_dbuf; /* Destination buffer addr in host mem */
112} ibd_t;
113
114
115#pragma pack(1)
116typedef struct dcmbits {
117 unsigned b_fb:1;
118 unsigned b_lp:1;
119 unsigned b_resv1:3;
120 unsigned b_tc2:1;
121 unsigned b_resv2:1;
122 unsigned b_wrap:3;
123 unsigned b_sinc:1;
124 unsigned b_dinc:1;
125 unsigned b_erm:1;
126 unsigned b_dt:1;
127 unsigned b_sd:2;
128} dcmbits_t;
129
130#pragma pack(1)
131typedef union dcmbitsu {
132 dcmbits_t b;
133 ushort i;
134} dcmbitsu_t;
135
136#pragma pack(1)
137typedef struct pram_idma {
138 ushort pi_ibase;
139 dcmbitsu_t pi_dcmbits;
140 ushort pi_ibdptr;
141 ushort pi_dprbuf;
142 ushort pi_bufinv; /* internal to CPM */
143 ushort pi_ssmax;
144 ushort pi_dprinptr; /* internal to CPM */
145 ushort pi_sts;
146 ushort pi_dproutptr; /* internal to CPM */
147 ushort pi_seob;
148 ushort pi_deob;
149 ushort pi_dts;
150 ushort pi_retadd;
151 ushort pi_resv1; /* internal to CPM */
152 uint pi_bdcnt;
153 uint pi_sptr;
154 uint pi_dptr;
155 uint pi_istate;
156} pram_idma_t;
157
158
6d0f6bcf 159volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
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160volatile ibd_t *bdf;
161volatile pram_idma_t *piptr;
162
163volatile int dmadone;
164volatile int *dmadonep = &dmadone;
165void dmadone_handler (void *);
166
167int idma_init (void);
168void idma_start (int, int, int, uint, uint, int);
169uint dpalloc (uint, uint);
170
171
172uint dpinit_done = 0;
173
174
175#ifdef STANDALONE
176int ctrlc (void)
177{
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178 if (tstc()) {
179 switch (getc ()) {
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180 case 0x03: /* ^C - Control C */
181 return 1;
182 default:
183 break;
184 }
185 }
186 return 0;
187}
188void * memset(void * s,int c,size_t count)
189{
190 char *xs = (char *) s;
191 while (count--)
192 *xs++ = c;
193 return s;
194}
195int memcmp(const void * cs,const void * ct,size_t count)
196{
197 const unsigned char *su1, *su2;
198 int res = 0;
199 for( su1 = cs, su2 = ct; 0 < count; ++su1, ++su2, count--)
200 if ((res = *su1 - *su2) != 0)
201 break;
202 return res;
203}
204#endif /* STANDALONE */
205
206#ifdef STANDALONE
27b207fd 207int mem_to_mem_idma2intr (int argc, char *argv[])
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208#else
209int do_idma (bd_t * bd, int argc, char *argv[])
210#endif /* STANDALONE */
211{
212 int i;
213
27b207fd 214 app_startup(argv);
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215 dpinit_done = 0;
216
217 idma_init ();
218
219 DEBUG ("Installing dma handler\n");
27b207fd 220 install_hdlr (7, dmadone_handler, (void *) bdf);
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221
222 memset ((void *) 0x100000, 'a', 512);
223 memset ((void *) 0x200000, 'b', 512);
224
225 for (i = 0; i < 32; i++) {
226 printf ("Startin IDMA, iteration=%d\n", i);
227 idma_start (1, 1, 512, 0x100000, 0x200000, 3);
228 }
229
230 DEBUG ("Uninstalling dma handler\n");
27b207fd 231 free_hdlr (7);
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232
233 return 0;
234}
235
236void
237idma_start (int sinc, int dinc, int sz, uint sbuf, uint dbuf, int ttype)
238{
239 /* ttype is for M-M, M-P, P-M or P-P: not used for now */
240
241 piptr->pi_istate = 0; /* manual says: clear it before every START_IDMA */
242 piptr->pi_dcmbits.b.b_resv1 = 0;
243
244 if (sinc == 1)
245 piptr->pi_dcmbits.b.b_sinc = 1;
246 else
247 piptr->pi_dcmbits.b.b_sinc = 0;
248
249 if (dinc == 1)
250 piptr->pi_dcmbits.b.b_dinc = 1;
251 else
252 piptr->pi_dcmbits.b.b_dinc = 0;
253
254 piptr->pi_dcmbits.b.b_erm = 0;
255 piptr->pi_dcmbits.b.b_sd = 0x00; /* M-M */
256
257 bdf->ibd_sbuf = sbuf;
258 bdf->ibd_dbuf = dbuf;
259 bdf->ibd_bits.b.b_cm = 0;
260 bdf->ibd_bits.b.b_interrupt = 1;
261 bdf->ibd_bits.b.b_wrap = 1;
262 bdf->ibd_bits.b.b_last = 1;
263 bdf->ibd_bits.b.b_sdn = 0;
264 bdf->ibd_bits.b.b_ddn = 0;
265 bdf->ibd_bits.b.b_dgbl = 0;
266 bdf->ibd_bits.b.b_ddtb = 0;
267 bdf->ibd_bits.b.b_sgbl = 0;
268 bdf->ibd_bits.b.b_sdtb = 0;
269 bdf->ibd_bits.b.b_dbo = 1;
270 bdf->ibd_bits.b.b_sbo = 1;
271 bdf->ibd_bits.b.b_valid = 1;
272 bdf->ibd_datlen = 512;
273
274 *dmadonep = 0;
275
276 immap->im_sdma.sdma_idmr2 = (uchar) 0xf;
277
278 immap->im_cpm.cp_cpcr = mk_cr_cmd (CPM_CR_IDMA2_PAGE,
279 CPM_CR_IDMA2_SBLOCK, 0x0,
280 0x9) | 0x00010000;
281
282 while (*dmadonep != 1) {
283 if (ctrlc ()) {
284 DEBUG ("\nInterrupted waiting for DMA interrupt.\n");
285 goto done;
286 }
287 printf ("Waiting for DMA interrupt (dmadone=%d b_valid = %d)...\n",
288 dmadone, bdf->ibd_bits.b.b_valid);
289 udelay (1000000);
290 }
291 printf ("DMA complete notification received!\n");
292
293 done:
294 DEBUG ("memcmp(0x%08x, 0x%08x, 512) = %d\n",
295 sbuf, dbuf, memcmp ((void *) sbuf, (void *) dbuf, 512));
296
297 return;
298}
299
300#define MAX_INT_BUFSZ 64
301#define DCM_WRAP 0 /* MUST be consistant with MAX_INT_BUFSZ */
302
303int idma_init (void)
304{
305 uint memaddr;
306
307 immap->im_cpm.cp_rccr &= ~0x00F3FFFF;
308 immap->im_cpm.cp_rccr |= 0x00A00A00;
309
310 memaddr = dpalloc (sizeof (pram_idma_t), 64);
311
312 *(volatile ushort *) &immap->im_dprambase[PROFF_IDMA2_BASE] = memaddr;
313 piptr = (volatile pram_idma_t *) ((uint) (immap) + memaddr);
314
315 piptr->pi_resv1 = 0; /* manual says: clear it */
316 piptr->pi_dcmbits.b.b_fb = 0;
317 piptr->pi_dcmbits.b.b_lp = 1;
318 piptr->pi_dcmbits.b.b_erm = 0;
319 piptr->pi_dcmbits.b.b_dt = 0;
320
321 memaddr = (uint) dpalloc (sizeof (ibd_t), 64);
322 piptr->pi_ibase = piptr->pi_ibdptr = (volatile short) memaddr;
323 bdf = (volatile ibd_t *) ((uint) (immap) + memaddr);
324 bdf->ibd_bits.b.b_valid = 0;
325
326 memaddr = (uint) dpalloc (64, 64);
327 piptr->pi_dprbuf = (volatile ushort) memaddr;
328 piptr->pi_dcmbits.b.b_wrap = 4;
329 piptr->pi_ssmax = 32;
330
331 piptr->pi_sts = piptr->pi_ssmax;
332 piptr->pi_dts = piptr->pi_ssmax;
333
334 return 1;
335}
336
337void dmadone_handler (void *arg)
338{
339 immap->im_sdma.sdma_idmr2 = (uchar) 0x0;
340
341 *dmadonep = 1;
342
343 return;
344}
345
346
347static uint dpbase = 0;
348
349uint dpalloc (uint size, uint align)
350{
6d0f6bcf 351 volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
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352 uint retloc;
353 uint align_mask, off;
354 uint savebase;
355
356 /* Pointer to initial global data area */
357
358 if (dpinit_done == 0) {
359 dpbase = gd->dp_alloc_base;
360 dpinit_done = 1;
361 }
362
363 align_mask = align - 1;
364 savebase = dpbase;
365
366 if ((off = (dpbase & align_mask)) != 0)
367 dpbase += (align - off);
368
369 if ((off = size & align_mask) != 0)
370 size += align - off;
371
372 if ((dpbase + size) >= gd->dp_alloc_top) {
373 dpbase = savebase;
374 printf ("dpalloc: ran out of dual port ram!");
375 return 0;
376 }
377
378 retloc = dpbase;
379 dpbase += size;
380
381 memset ((void *) &immr->im_dprambase[retloc], 0, size);
382
383 return (retloc);
384}