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Reserve secure memory
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1/*
2 * Copyright (c) 2012 The Chromium OS Authors.
3 * (C) Copyright 2002-2010
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
1a459660 6 * SPDX-License-Identifier: GPL-2.0+
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7 */
8
9#ifndef __ASM_GENERIC_GBL_DATA_H
10#define __ASM_GENERIC_GBL_DATA_H
11/*
12 * The following data structure is placed in some memory which is
13 * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
14 * some locked parts of the data cache) to allow for a minimum set of
15 * global variables during system initialization (until we have set
16 * up the memory controller so that we can use RAM).
17 *
18 * Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t)
19 *
20 * Each architecture has its own private fields. For now all are private
21 */
22
23#ifndef __ASSEMBLY__
9854a874 24#include <membuff.h>
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25#include <linux/list.h>
26
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27typedef struct global_data {
28 bd_t *bd;
29 unsigned long flags;
b5bec884 30 unsigned int baudrate;
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31 unsigned long cpu_clk; /* CPU clock in Hz! */
32 unsigned long bus_clk;
33 /* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
34 unsigned long pci_clk;
35 unsigned long mem_clk;
36#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
37 unsigned long fb_base; /* Base address of framebuffer mem */
38#endif
39#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
40 unsigned long post_log_word; /* Record POST activities */
41 unsigned long post_log_res; /* success of POST test */
42 unsigned long post_init_f_time; /* When post_init_f started */
43#endif
44#ifdef CONFIG_BOARD_TYPES
45 unsigned long board_type;
46#endif
47 unsigned long have_console; /* serial_init() was called */
48#ifdef CONFIG_PRE_CONSOLE_BUFFER
49 unsigned long precon_buf_idx; /* Pre-Console buffer index */
50#endif
51#ifdef CONFIG_MODEM_SUPPORT
52 unsigned long do_mdm_init;
53 unsigned long be_quiet;
54#endif
55 unsigned long env_addr; /* Address of Environment struct */
56 unsigned long env_valid; /* Checksum of Environment valid? */
57
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58 unsigned long ram_top; /* Top address of RAM used by U-Boot */
59
60 unsigned long relocaddr; /* Start address of U-Boot in RAM */
61 phys_size_t ram_size; /* RAM size */
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62#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
63#define MEM_RESERVE_SECURE_SECURED 0x1
64#define MEM_RESERVE_SECURE_MAINTAINED 0x2
65#define MEM_RESERVE_SECURE_ADDR_MASK (~0x3)
66 /*
67 * Secure memory addr
68 * This variable needs maintenance if the RAM base is not zero,
69 * or if RAM splits into non-consecutive banks. It also has a
70 * flag indicating the secure memory is marked as secure by MMU.
71 * Flags used: 0x1 secured
72 * 0x2 maintained
73 */
74 phys_addr_t secure_ram;
75#endif
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76 unsigned long mon_len; /* monitor len */
77 unsigned long irq_sp; /* irq stack pointer */
78 unsigned long start_addr_sp; /* start_addr_stackpointer */
79 unsigned long reloc_off;
80 struct global_data *new_gd; /* relocated global data */
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81
82#ifdef CONFIG_DM
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83 struct udevice *dm_root; /* Root instance for Driver Model */
84 struct udevice *dm_root_f; /* Pre-relocation root instance */
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85 struct list_head uclass_root; /* Head of core tree */
86#endif
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87#ifdef CONFIG_TIMER
88 struct udevice *timer; /* Timer instance for Driver Model */
89#endif
6494d708 90
50b1fa39 91 const void *fdt_blob; /* Our device tree, NULL if none */
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92 void *new_fdt; /* Relocated FDT */
93 unsigned long fdt_size; /* Space reserved for relocated FDT */
49cad547 94 struct jt_funcs *jt; /* jump table */
50b1fa39 95 char env_buf[32]; /* buffer for getenv() before reloc. */
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96#ifdef CONFIG_TRACE
97 void *trace_buff; /* The trace buffer */
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98#endif
99#if defined(CONFIG_SYS_I2C)
100 int cur_i2c_bus; /* current used i2c bus */
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101#endif
102#ifdef CONFIG_SYS_I2C_MXC
103 void *srdata[10];
71c52dba 104#endif
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105 unsigned long timebase_h;
106 unsigned long timebase_l;
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107#ifdef CONFIG_SYS_MALLOC_F_LEN
108 unsigned long malloc_base; /* base address of early malloc() */
109 unsigned long malloc_limit; /* limit address */
110 unsigned long malloc_ptr; /* current address */
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111#endif
112#ifdef CONFIG_PCI
113 struct pci_controller *hose; /* PCI hose for early use */
b9da5086 114 phys_addr_t pci_ram_top; /* top of region accessible to PCI */
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115#endif
116#ifdef CONFIG_PCI_BOOTDELAY
117 int pcidelay_done;
d59476b6 118#endif
469a579d 119 struct udevice *cur_serial_dev; /* current serial device */
2212e69b 120 struct arch_global_data arch; /* architecture-specific data */
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121#ifdef CONFIG_CONSOLE_RECORD
122 struct membuff console_out; /* console output */
123 struct membuff console_in; /* console input */
124#endif
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125} gd_t;
126#endif
127
128/*
b0b403d9 129 * Global Data Flags - the top 16 bits are reserved for arch-specific flags
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130 */
131#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
132#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
133#define GD_FLG_SILENT 0x00004 /* Silent mode */
134#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
135#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
136#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
137#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
138#define GD_FLG_ENV_READY 0x00080 /* Env. imported into hash table */
093f79ab 139#define GD_FLG_SERIAL_READY 0x00100 /* Pre-reloc serial console ready */
c9356be3 140#define GD_FLG_FULL_MALLOC_INIT 0x00200 /* Full malloc() is ready */
070d00b8 141#define GD_FLG_SPL_INIT 0x00400 /* spl_init() has been called */
f05ad9ba 142#define GD_FLG_SKIP_RELOC 0x00800 /* Don't relocate */
9854a874 143#define GD_FLG_RECORD 0x01000 /* Record console */
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144
145#endif /* __ASM_GENERIC_GBL_DATA_H */