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powerpc, 5xx: remove support for 5xx
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1/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 *
4 * (C) Copyright 2000 - 2002
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
1a459660 7 * SPDX-License-Identifier: GPL-2.0+
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8 ********************************************************************
9 * NOTE: This header file defines an interface to U-Boot. Including
10 * this (unmodified) header file in another file is considered normal
11 * use of U-Boot, and does *not* fall under the heading of "derived
12 * work".
13 ********************************************************************
14 */
15
16#ifndef __ASM_GENERIC_U_BOOT_H__
17#define __ASM_GENERIC_U_BOOT_H__
18
19/*
20 * Board information passed to Linux kernel from U-Boot
21 *
22 * include/asm-ppc/u-boot.h
23 */
24
25#ifndef __ASSEMBLY__
26
27typedef struct bd_info {
28 unsigned long bi_memstart; /* start of DRAM memory */
29 phys_size_t bi_memsize; /* size of DRAM memory in bytes */
30 unsigned long bi_flashstart; /* start of FLASH memory */
31 unsigned long bi_flashsize; /* size of FLASH memory */
32 unsigned long bi_flashoffset; /* reserved area for startup monitor */
33 unsigned long bi_sramstart; /* start of SRAM memory */
34 unsigned long bi_sramsize; /* size of SRAM memory */
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35#ifdef CONFIG_AVR32
36 unsigned char bi_phy_id[4]; /* PHY address for ATAG_ETHERNET */
37 unsigned long bi_board_number;/* ATAG_BOARDINFO */
38#endif
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39#ifdef CONFIG_ARM
40 unsigned long bi_arm_freq; /* arm frequency */
41 unsigned long bi_dsp_freq; /* dsp core frequency */
42 unsigned long bi_ddr_freq; /* ddr frequency */
43#endif
50258977 44#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
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45 unsigned long bi_immr_base; /* base of IMMR register */
46#endif
e310b93e 47#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
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48 unsigned long bi_mbar_base; /* base of internal registers */
49#endif
50#if defined(CONFIG_MPC83xx)
51 unsigned long bi_immrbar;
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52#endif
53 unsigned long bi_bootflags; /* boot / reboot flag (Unused) */
54 unsigned long bi_ip_addr; /* IP Address */
55 unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */
56 unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
57 unsigned long bi_intfreq; /* Internal Freq, in MHz */
58 unsigned long bi_busfreq; /* Bus Freq, in MHz */
59#if defined(CONFIG_CPM2)
60 unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
61 unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
62 unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
63 unsigned long bi_vco; /* VCO Out from PLL, in MHz */
64#endif
65#if defined(CONFIG_MPC512X)
66 unsigned long bi_ipsfreq; /* IPS Bus Freq, in MHz */
67#endif /* CONFIG_MPC512X */
1313db48 68#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
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69 unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
70 unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
71#endif
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72#if defined(CONFIG_EXTRA_CLOCK)
73 unsigned long bi_inpfreq; /* input Freq in MHz */
74 unsigned long bi_vcofreq; /* vco Freq in MHz */
75 unsigned long bi_flbfreq; /* Flexbus Freq in MHz */
76#endif
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77#if defined(CONFIG_405) || \
78 defined(CONFIG_405GP) || \
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79 defined(CONFIG_405EP) || \
80 defined(CONFIG_405EZ) || \
81 defined(CONFIG_405EX) || \
82 defined(CONFIG_440)
83 unsigned char bi_s_version[4]; /* Version of this structure */
84 unsigned char bi_r_version[32]; /* Version of the ROM (AMCC) */
85 unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */
86 unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
87 unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
88 unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
89#endif
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90
91#ifdef CONFIG_HAS_ETH1
92 unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */
93#endif
94#ifdef CONFIG_HAS_ETH2
95 unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */
96#endif
97#ifdef CONFIG_HAS_ETH3
98 unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */
99#endif
100#ifdef CONFIG_HAS_ETH4
101 unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */
102#endif
103#ifdef CONFIG_HAS_ETH5
104 unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */
105#endif
106
107#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
108 defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \
109 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
110 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
111 defined(CONFIG_460EX) || defined(CONFIG_460GT)
112 unsigned int bi_opbfreq; /* OPB clock in Hz */
113 int bi_iic_fast[2]; /* Use fast i2c mode */
114#endif
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115#if defined(CONFIG_4xx)
116#if defined(CONFIG_440GX) || \
117 defined(CONFIG_460EX) || defined(CONFIG_460GT)
118 int bi_phynum[4]; /* Determines phy mapping */
119 int bi_phymode[4]; /* Determines phy mode */
120#elif defined(CONFIG_405EP) || defined(CONFIG_405EX) || defined(CONFIG_440)
121 int bi_phynum[2]; /* Determines phy mapping */
122 int bi_phymode[2]; /* Determines phy mode */
123#else
124 int bi_phynum[1]; /* Determines phy mapping */
125 int bi_phymode[1]; /* Determines phy mode */
126#endif
127#endif /* defined(CONFIG_4xx) */
128 ulong bi_arch_number; /* unique id for this board */
129 ulong bi_boot_params; /* where this board expects params */
130#ifdef CONFIG_NR_DRAM_BANKS
131 struct { /* RAM configuration */
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132 phys_addr_t start;
133 phys_size_t size;
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134 } bi_dram[CONFIG_NR_DRAM_BANKS];
135#endif /* CONFIG_NR_DRAM_BANKS */
136} bd_t;
137
138#endif /* __ASSEMBLY__ */
139
140#endif /* __ASM_GENERIC_U_BOOT_H__ */