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041b1dea WD |
1 | /* originally from linux source. |
2 | * removed the dependencies on CONFIG_ values | |
3 | * removed virt_to_phys stuff (and in fact everything surrounded by #if __KERNEL__) | |
4 | * Modified By Rob Taylor, Flying Pig Systems, 2000 | |
5 | */ | |
6 | ||
7 | #ifndef _PPC_IO_H | |
8 | #define _PPC_IO_H | |
9 | ||
10 | #include <linux/config.h> | |
11 | #include <asm/byteorder.h> | |
12 | ||
13 | #define SIO_CONFIG_RA 0x398 | |
14 | #define SIO_CONFIG_RD 0x399 | |
15 | ||
16 | ||
17 | #define readb(addr) in_8((volatile u8 *)(addr)) | |
18 | #define writeb(b,addr) out_8((volatile u8 *)(addr), (b)) | |
19 | #if !defined(__BIG_ENDIAN) | |
20 | #define readw(addr) (*(volatile u16 *) (addr)) | |
21 | #define readl(addr) (*(volatile u32 *) (addr)) | |
22 | #define writew(b,addr) ((*(volatile u16 *) (addr)) = (b)) | |
23 | #define writel(b,addr) ((*(volatile u32 *) (addr)) = (b)) | |
24 | #else | |
25 | #define readw(addr) in_le16((volatile u16 *)(addr)) | |
26 | #define readl(addr) in_le32((volatile u32 *)(addr)) | |
27 | #define writew(b,addr) out_le16((volatile u16 *)(addr),(b)) | |
28 | #define writel(b,addr) out_le32((volatile u32 *)(addr),(b)) | |
29 | #endif | |
30 | ||
31 | /* | |
32 | * The insw/outsw/insl/outsl macros don't do byte-swapping. | |
33 | * They are only used in practice for transferring buffers which | |
34 | * are arrays of bytes, and byte-swapping is not appropriate in | |
35 | * that case. - paulus | |
36 | */ | |
37 | #define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns)) | |
38 | #define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns)) | |
39 | #define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) | |
40 | #define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) | |
41 | #define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) | |
42 | #define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) | |
43 | ||
44 | #define inb(port) in_8((u8 *)((port)+_IO_BASE)) | |
45 | #define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val)) | |
46 | #if !defined(__BIG_ENDIAN) | |
47 | #define inw(port) in_be16((u16 *)((port)+_IO_BASE)) | |
48 | #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val)) | |
49 | #define inl(port) in_be32((u32 *)((port)+_IO_BASE)) | |
50 | #define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val)) | |
51 | #else | |
52 | #define inw(port) in_le16((u16 *)((port)+_IO_BASE)) | |
53 | #define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val)) | |
54 | #define inl(port) in_le32((u32 *)((port)+_IO_BASE)) | |
55 | #define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val)) | |
56 | #endif | |
57 | ||
58 | #define inb_p(port) in_8((u8 *)((port)+_IO_BASE)) | |
59 | #define outb_p(val, port) out_8((u8 *)((port)+_IO_BASE), (val)) | |
60 | #define inw_p(port) in_le16((u16 *)((port)+_IO_BASE)) | |
61 | #define outw_p(val, port) out_le16((u16 *)((port)+_IO_BASE), (val)) | |
62 | #define inl_p(port) in_le32((u32 *)((port)+_IO_BASE)) | |
63 | #define outl_p(val, port) out_le32((u32 *)((port)+_IO_BASE), (val)) | |
64 | ||
65 | extern void _insb(volatile u8 *port, void *buf, int ns); | |
66 | extern void _outsb(volatile u8 *port, const void *buf, int ns); | |
67 | extern void _insw(volatile u16 *port, void *buf, int ns); | |
68 | extern void _outsw(volatile u16 *port, const void *buf, int ns); | |
69 | extern void _insl(volatile u32 *port, void *buf, int nl); | |
70 | extern void _outsl(volatile u32 *port, const void *buf, int nl); | |
71 | extern void _insw_ns(volatile u16 *port, void *buf, int ns); | |
72 | extern void _outsw_ns(volatile u16 *port, const void *buf, int ns); | |
73 | extern void _insl_ns(volatile u32 *port, void *buf, int nl); | |
74 | extern void _outsl_ns(volatile u32 *port, const void *buf, int nl); | |
75 | ||
76 | /* | |
77 | * The *_ns versions below don't do byte-swapping. | |
78 | * Neither do the standard versions now, these are just here | |
79 | * for older code. | |
80 | */ | |
81 | #define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) | |
82 | #define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) | |
83 | #define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) | |
84 | #define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) | |
85 | ||
86 | ||
87 | #define IO_SPACE_LIMIT ~0 | |
88 | ||
89 | #define memset_io(a,b,c) memset((void *)(a),(b),(c)) | |
90 | #define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) | |
91 | #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) | |
92 | ||
93 | /* | |
94 | * Enforce In-order Execution of I/O: | |
95 | * Acts as a barrier to ensure all previous I/O accesses have | |
96 | * completed before any further ones are issued. | |
97 | */ | |
98 | #define eieio() __asm__ __volatile__ ("eieio" : : : "memory"); | |
99 | #define sync() __asm__ __volatile__ ("sync" : : : "memory"); | |
100 | ||
101 | /* Enforce in-order execution of data I/O. | |
102 | * No distinction between read/write on PPC; use eieio for all three. | |
103 | */ | |
104 | #define iobarrier_rw() eieio() | |
105 | #define iobarrier_r() eieio() | |
106 | #define iobarrier_w() eieio() | |
107 | ||
108 | /* | |
109 | * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. | |
110 | */ | |
111 | extern inline int in_8(volatile u8 *addr) | |
112 | { | |
113 | int ret; | |
114 | ||
115 | __asm__ __volatile__("lbz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr)); | |
116 | return ret; | |
117 | } | |
118 | ||
119 | extern inline void out_8(volatile u8 *addr, int val) | |
120 | { | |
121 | __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val)); | |
122 | } | |
123 | ||
124 | extern inline int in_le16(volatile u16 *addr) | |
125 | { | |
126 | int ret; | |
127 | ||
128 | __asm__ __volatile__("lhbrx %0,0,%1; eieio" : "=r" (ret) : | |
8bde7f77 | 129 | "r" (addr), "m" (*addr)); |
041b1dea WD |
130 | return ret; |
131 | } | |
132 | ||
133 | extern inline int in_be16(volatile u16 *addr) | |
134 | { | |
135 | int ret; | |
136 | ||
137 | __asm__ __volatile__("lhz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr)); | |
138 | return ret; | |
139 | } | |
140 | ||
141 | extern inline void out_le16(volatile u16 *addr, int val) | |
142 | { | |
143 | __asm__ __volatile__("sthbrx %1,0,%2; eieio" : "=m" (*addr) : | |
8bde7f77 | 144 | "r" (val), "r" (addr)); |
041b1dea WD |
145 | } |
146 | ||
147 | extern inline void out_be16(volatile u16 *addr, int val) | |
148 | { | |
149 | __asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val)); | |
150 | } | |
151 | ||
152 | extern inline unsigned in_le32(volatile u32 *addr) | |
153 | { | |
154 | unsigned ret; | |
155 | ||
156 | __asm__ __volatile__("lwbrx %0,0,%1; eieio" : "=r" (ret) : | |
8bde7f77 | 157 | "r" (addr), "m" (*addr)); |
041b1dea WD |
158 | return ret; |
159 | } | |
160 | ||
161 | extern inline unsigned in_be32(volatile u32 *addr) | |
162 | { | |
163 | unsigned ret; | |
164 | ||
165 | __asm__ __volatile__("lwz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr)); | |
166 | return ret; | |
167 | } | |
168 | ||
169 | extern inline void out_le32(volatile unsigned *addr, int val) | |
170 | { | |
171 | __asm__ __volatile__("stwbrx %1,0,%2; eieio" : "=m" (*addr) : | |
8bde7f77 | 172 | "r" (val), "r" (addr)); |
041b1dea WD |
173 | } |
174 | ||
175 | extern inline void out_be32(volatile unsigned *addr, int val) | |
176 | { | |
177 | __asm__ __volatile__("stw%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val)); | |
178 | } | |
179 | ||
180 | #endif |